CN103095622B - A kind of bpsk signal restoring circuit being applicable to ISO14443 agreement - Google Patents
A kind of bpsk signal restoring circuit being applicable to ISO14443 agreement Download PDFInfo
- Publication number
- CN103095622B CN103095622B CN201110340529.4A CN201110340529A CN103095622B CN 103095622 B CN103095622 B CN 103095622B CN 201110340529 A CN201110340529 A CN 201110340529A CN 103095622 B CN103095622 B CN 103095622B
- Authority
- CN
- China
- Prior art keywords
- signal
- enumerator
- bpsk signal
- depositor
- high level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
The invention discloses a kind of bpsk signal restoring circuit being applicable to ISO14443 agreement, comprise: RF module, the first enumerator, the second enumerator, the first depositor, the second depositor, the first comparator, the second comparator, a MUX, the first d type flip flop and a phase inverter.When the bpsk signal restoring circuit of the present invention works, count by enabling during signal TR1 high level and low level to bpsk signal respectively in input, record high level and low level count value respectively, then passes through recorded high level during non-TR1 and low level count value carries out recovering bpsk signal.The bpsk signal restoring circuit of the present invention can automatically recover a preferable bpsk signal of dutycycle when the bpsk signal dutycycle that RF module is given differs greatly, and improves the correctness of decoding and the redundancy to dutycycle.
Description
Technical field
The present invention relates to contactless card field, particularly relate to a kind of bpsk signal being applicable to ISO14443 agreement extensive
Compound circuit.
Background technology
In the regulation of ISO14443 agreement, TypeB (type B) and high-speed communication are used BPSK (Binary Phase
Shift Keying) coded system, BPSK has 0 or 1 place changed, subcarrier phase generation once inside out the most every time.By
In the difference of loading condition, the dutycycle of BPSK may very great changes have taken place, if dutycycle is very poor, it is easy to cause misidentification
For being the situation of upset point, cause decoding error.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of bpsk signal restoring circuit being applicable to ISO14443 agreement,
Can automatically recover a preferable bpsk signal of dutycycle when the bpsk signal dutycycle that RF module provides differs greatly, carry
The correctness of high decoding and the redundancy to dutycycle.
For solving the bpsk signal restoring circuit of the above-mentioned technical problem present invention, comprise:
One RF module, for receiving radio frequency (RF) signal and the recovered clock signal with data message；
One first enumerator, for counting the high level of the bpsk signal of RF module output；
One second enumerator, for counting the low level of the bpsk signal of RF module output；
One first depositor, for storing the count value of the first enumerator when enabling during signal enables；
One second depositor, for storing the count value of the second enumerator when enabling during signal enables；
One first comparator, during for comparing during non-enable signal, the count value of the first enumerator and the first depositor
Value, if the count value of the first enumerator is more than the value of the first depositor, then set is high level；
One second comparator, during for comparing during non-enable signal, the count value of the second enumerator and the second depositor
Value, if the count value of the second enumerator is more than the value of the second depositor, then set is high level；
One MUX, when the first comparator exports high level, selects high level output, when the second comparator exports
During high level, select low level output, in remaining moment, select the output of the first d type flip flop；
One first d type flip flop, for the output of sampling multiple selector；
One phase inverter, negates for input is enabled signal.
Described RF signal is bpsk signal based on ISO/IEC14443 agreement.
During the bpsk signal restoring circuit work of the present invention, by enabling during signal respectively to bpsk signal in input
High level and low level count, respectively record high level and low level count value, then logical during non-enable signal
Cross recorded high level and low level count value carries out recovering bpsk signal.RF worked as by the bpsk signal restoring circuit of the present invention
Can automatically recover a dutycycle preferable bpsk signal when bpsk signal dutycycle that module provides differs greatly, improve and solve
The correctness of code and the redundancy to dutycycle.
Accompanying drawing explanation
The present invention is further detailed explanation with detailed description of the invention below in conjunction with the accompanying drawings:
Fig. 1 is the electrical block diagram of one embodiment of the invention.
Description of reference numerals
100 be RF module 110 be the first enumerator
120 be the second enumerator 130 be the first depositor
140 be the second depositor 150 be the first comparator
160 be the second comparator 170 be MUX
180 be d type flip flop 190 be phase inverter.
Detailed description of the invention
As it is shown in figure 1, comprise for one embodiment of the invention: RF module the 100, first enumerator the 110, second enumerator
120, first depositor the 130, second depositor the 140, first comparator the 150, second comparator 160, MUX 170, D touch
Send out device 180 and phase inverter 190.
RF module 100, has RF signal and the recovered clock signal of data message, completes demodulation for transmission and reception
After, give the first enumerator 110 and the second enumerator 120 by the signal according to ISO14443 communications protocol coding received.
First enumerator 110, for the high level of the bpsk signal that RF module 100 demodulation produces is counted, and
Clear 0 is carried out during the low level of bpsk signal；
Second enumerator 120, for the low level of the bpsk signal that RF module 100 demodulation produces is counted, and
Clear 0 is carried out during the high level of bpsk signal；
First depositor 130, enables the value of the low N-1 position of the first enumerator between signal TR1 high period for being stored in；
Second depositor 140, enables the value of the low N-1 position of the second enumerator between signal TR1 high period for being stored in；
First comparator 150, for comparing the value and first of the first enumerator 110 during non-enable signal TR1
Depositor 130, if the value of the first enumerator 110 is more than the first depositor 130, then exports high level；
Second comparator 160, for comparing the value and second of the second enumerator 120 during non-enable signal TR1
Depositor 140, if the value of the second enumerator 120 is more than the second depositor 140, then exports high level；
MUX 170, according to the first comparator 150 and output of the second comparator 160, selects output 1 or 0；
If the first comparator 150 is high level, then export high level；If the second comparator 160 is high level, then output low level；No
Then, the value of d type flip flop 180 is exported；
D type flip flop 180, uses the clock signal of RF module 100 to sample the output of MUX 170, obtains
The present invention preferable bpsk signal of the desired dutycycle recovered；
Phase inverter 190, negates for input is enabled signal TR1, and signal of the inverted is as the first comparator 150
Enable signal with the second comparator 160.
Above by detailed description of the invention and embodiment, the present invention has been described in detail, but these not constitute right
The restriction of the present invention.Without departing from the principles of the present invention, those skilled in the art it may also be made that many deformation and changes
Entering, these also should be regarded as protection scope of the present invention.
Claims (2)
1. the bpsk signal restoring circuit being applicable to ISO14443 agreement, it is characterised in that comprise:
One RF module, for receiving radiofrequency signal and the recovered clock signal with data message；
One first enumerator, for counting the high level of the bpsk signal of RF module output；
One second enumerator, for counting the low level of the bpsk signal of RF module output；
One first depositor, for storing the count value of the first enumerator when enabling during signal enables；
One second depositor, for storing the count value of the second enumerator when enabling during signal enables；
One first comparator, during for comparing during non-enable signal, the count value of the first enumerator and the value of the first depositor,
If the count value of the first enumerator is more than the value of the first depositor, then set is high level；
One second comparator, during for comparing during non-enable signal, the count value of the second enumerator and the value of the second depositor,
If the count value of the second enumerator is more than the value of the second depositor, then set is high level；
One MUX, when the first comparator exports high level, selects high level output, when the second high electricity of comparator output
At ordinary times, select low level output, in remaining moment, select the output of the first d type flip flop；
One first d type flip flop, for the output of sampling multiple selector；
One phase inverter, negates for input is enabled signal.
2. bpsk signal restoring circuit as claimed in claim 1, it is characterised in that: radiofrequency signal is based on ISO/IEC14443
The bpsk signal of agreement.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110340529.4A CN103095622B (en) | 2011-11-01 | 2011-11-01 | A kind of bpsk signal restoring circuit being applicable to ISO14443 agreement |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110340529.4A CN103095622B (en) | 2011-11-01 | 2011-11-01 | A kind of bpsk signal restoring circuit being applicable to ISO14443 agreement |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103095622A CN103095622A (en) | 2013-05-08 |
| CN103095622B true CN103095622B (en) | 2016-12-28 |
Family
ID=48207770
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110340529.4A Active CN103095622B (en) | 2011-11-01 | 2011-11-01 | A kind of bpsk signal restoring circuit being applicable to ISO14443 agreement |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103095622B (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104242950B (en) * | 2013-06-21 | 2018-04-27 | 上海华虹集成电路有限责任公司 | The sync decoder of low speed bpsk signal |
| CN104734673B (en) * | 2013-12-19 | 2019-06-11 | 苏州普源精电科技有限公司 | Burst changeable parameters signal generator and the burst signal generator that recurring number is variable |
| CN107078723B (en) * | 2017-01-23 | 2020-08-25 | 深圳市汇顶科技股份有限公司 | Signal processing system and method of signal processing |
| CN110297792B (en) * | 2019-08-02 | 2024-05-17 | 富满微电子集团股份有限公司 | Data high-level width stable forwarding chip and cascading method |
| CN112486883A (en) * | 2020-11-16 | 2021-03-12 | 江苏科大亨芯半导体技术有限公司 | Single wire read-write communication system and method |
| CN112468423B (en) * | 2021-02-04 | 2021-05-18 | 北京紫光青藤微系统有限公司 | Signal decoding method, signal decoding device, electronic equipment and storage medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1767637A (en) * | 2005-09-21 | 2006-05-03 | 康佳集团股份有限公司 | Video signal remote transmitting method |
| CN101217042A (en) * | 2008-01-18 | 2008-07-09 | 中国科学院上海光学精密机械研究所 | Clock signal extraction circuit of red light high-definition optical disk |
| CN101458876A (en) * | 2008-12-05 | 2009-06-17 | 厦门大学 | Wireless communication transceiving module for communication principle experiment teaching system |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6908037B2 (en) * | 2002-09-26 | 2005-06-21 | Samsung Electronics, Co., Ltd. | Circuit for generating clock signal and decoding data signal for use in contactless integrated circuit card |
| JP4887928B2 (en) * | 2006-06-21 | 2012-02-29 | 株式会社デンソー | Receiving device for vehicle communication system |
-
2011
- 2011-11-01 CN CN201110340529.4A patent/CN103095622B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1767637A (en) * | 2005-09-21 | 2006-05-03 | 康佳集团股份有限公司 | Video signal remote transmitting method |
| CN101217042A (en) * | 2008-01-18 | 2008-07-09 | 中国科学院上海光学精密机械研究所 | Clock signal extraction circuit of red light high-definition optical disk |
| CN101458876A (en) * | 2008-12-05 | 2009-06-17 | 厦门大学 | Wireless communication transceiving module for communication principle experiment teaching system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103095622A (en) | 2013-05-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103095622B (en) | A kind of bpsk signal restoring circuit being applicable to ISO14443 agreement | |
| CN103346988B (en) | A kind of FSK digital demodulator | |
| CN103297060B (en) | A kind of decoding circuit being applicable to two-forty correction miller coding signal | |
| CN101441724B (en) | IC card, information processing device, communication type identification device and method, and computer program product | |
| US20080214108A1 (en) | Contactless Communications Method Based On Asynchronous Modulations And Demodulations | |
| CN101833638A (en) | Passive ultrahigh frequency electronic tag chip digital baseband processor and control method thereof | |
| CN101739541B (en) | Decoder suitable for PIE coding | |
| CN104735008B (en) | Apparatus and method for sign off detection | |
| CN103106379B (en) | A kind of non-contact IC card with robustness receives counting method | |
| CN103595421A (en) | A decoder for TYPE A basic data rate signals transmitted by a decoding card | |
| KR100512182B1 (en) | Circuit for generating clock signal and decoding data signals in contactless integrated circuit card | |
| CN101847200B (en) | Groove identification device of RFID (Radio Frequency Identification Device) label chip | |
| CN201392538Y (en) | Decoder suitable for PIE coding | |
| CN103065188A (en) | Decoding circuit of non-contact integrated circuit (IC) card | |
| CN1285019C (en) | Clock signal generating and data signal decoding circuit of contactless integrated circuit card | |
| CN102289640A (en) | RFID reader and method of controlling the same | |
| CN102043936A (en) | Information transmission method and system in radio frequency identification system | |
| CN103595420B (en) | Decode the decoder for the TYPE a-signals that card reader is sent | |
| CN102522998A (en) | TYPEB full rate decoding circuit suitable for NRZ coded signal | |
| CN105718835A (en) | Digital shaping circuit | |
| CN104639483A (en) | Digital correlation demodulation circuit based on 14443-BPSK (binary phase shift keying) subcarriers | |
| CN103595422B (en) | Decode the decoder for the type A high data rate signals that card is sent | |
| CN104637540A (en) | Receiving circuit, realization method of receiving circuit and IC (integrated circuit) card | |
| CN110212933B (en) | Demodulation circuit of wireless receiver | |
| CN103095447B (en) | A kind of bpsk signal synchronous circuit suitable for ISO14443 agreements |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB03 | Change of inventor or designer information |
Inventor after: Qin Junyan Inventor after: Wang Jijian Inventor before: Qin Junyan |
|
| COR | Change of bibliographic data | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |