CN103095291B - Quick phaselocked loop is arranged - Google Patents
Quick phaselocked loop is arranged Download PDFInfo
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- CN103095291B CN103095291B CN201210436456.3A CN201210436456A CN103095291B CN 103095291 B CN103095291 B CN 103095291B CN 201210436456 A CN201210436456 A CN 201210436456A CN 103095291 B CN103095291 B CN 103095291B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/403—Circuits using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/101—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop
- H03L7/102—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop the additional signal being directly applied to the controlled loop oscillator
- H03L7/103—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop the additional signal being directly applied to the controlled loop oscillator the additional signal being a digital signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
Abstract
It relates to quickly phaselocked loop (PLL) is arranged.Disclosing a kind of communicator, described communicator regulates echo signal, thus allowing to lock onto in reference signal with reference to phaselocked loop (PLL), described reference signal is relevant to operation frequency required in the first operator scheme.When echo signal is calibrated to proportional to reference signal, lock onto in reference signal with reference to PLL.Owing to communicator is changed between the first operator scheme and the second operator scheme, so described communicator is to the reference PLL calibration cycle shortened.In this second mode of operation, in response to the calibration cycle shortened, lock onto in reference signal with reference to phaselocked loop (PLL).
Description
Quoting of related application
This application claims the U.S. Provisional Patent Application the 61/556th, 094 submitted on November 4th, 2011 and the priority of the U.S. Patent application the 13/356th, 137 submitted on January 23rd, 2012, its full content is incorporated herein by.
Technical field
The disclosure relates generally to phaselocked loop (PLL) and the calibration of the voltage controlled oscillator (VCO) in particular to cell phone.
Background technology
Cell phone develops into, from the main equipment being merely capable of being simulated voice communication, the relatively skinny device that can carry out Digital Speech Communication and digital data communications, such as, for example, for the short message service (SMS) of text message, Email, the packet switch of access the Internet, game, bluetooth and multimedia information service (MMS).Except these functions, cell phone of today also has the extra function relevant to non-communicating, such as, for example, can the video camera of video record, MPEG-1 audio layer 3(MP3) player and software application (such as, calendar and telephone directory).Even with these functions, the manufacturer of cell phone also puts into more function in cell phone and the cell phone sizes that makes these with better function is less.
There is a phaselocked loop (PLL) at the center of every cell phone.PLL is responsible for, before proceeding by transmission operator scheme, providing suitable transmission frequency for cell phone.PLL also is responsible for, before proceeding by reception operator scheme, providing suitable reception frequency for cell phone.In order to suitably provide suitable transmission to cell phone and/or receive frequency, calibration is positioned at the voltage controlled oscillator (VCO) of PLL, in order to cell phone has suitable transmission and/or receives frequency.Once the frequency that is initially calibrated to reference frequency of VCO and/or phase place are proportional fully, then PLL by the frequency lock of VCO be the frequency to reference frequency and/or phase place proportional, thus providing suitable transmission and/or receiving frequency.It is often necessary to carry out additional calibration VCO after carrying out initially calibration, to guarantee for suitable transmission and/or to receive frequency, VCO is proportional fully to the frequency of reference frequency and/or phase place.Such as, once cell phone becomes to receive operator scheme from sending mode transitions and/or becomes to send operator scheme from receiving mode transitions, then need to carry out extra calibration.
Communication standard provides regular hour window to carry out the initial calibration of VCO.But, some communication standard usually not provides the sufficient time to carry out extra calibration, at cell phone from when sending mode transitions one-tenth reception operator scheme and/or become to send operator scheme from reception mode transitions, it usually needs carry out this extra calibration.Result, for instance at cell phone from when sending mode transitions one-tenth reception operator scheme, cell phone can not be adjusted the reception frequency that (align) is extremely suitable.
Therefore, from when sending mode transitions one-tenth reception operator scheme and/or become to send operator scheme from reception mode transitions, after carrying out initial calibration, need to be distributed in the time of (allot) at each communication standard, calibration VCO, in order to cell phone has suitable transmission and/or receives frequency.By description in detail below, other aspects of the disclosure and advantage are apparent.
Summary of the invention
One aspect of the present invention relates to a kind of communicator, comprising: with reference to phaselocked loop (PLL), be configured to provide echo signal；And controller, it is configured to calibration with reference to phaselocked loop, thus when described communicator becomes the second operator scheme from the first mode transitions, described echo signal tracking reference signal；Wherein, described controller is further configured to be calibrated described with reference to phaselocked loop by target frequency regulates scheduled volume, described scheduled volume represents that the tuning signal bias of precognition, described tuning signal bias are caused by the conversion between described first operator scheme and described second operator scheme.
In above-mentioned communicator, it is preferable that described first operator scheme is for receiving operator scheme, and described second operator scheme is for sending operator scheme.
In above-mentioned communicator, it is preferable that described first operator scheme is for sending operator scheme, and described second operator scheme is for receiving operator scheme.
In above-mentioned communicator, it is preferable that described reference phaselocked loop includes: voltage controlled oscillator (VCO), is configured in response to tuning signal and provides described echo signal；Wherein, controller module is configured to couple described scheduled volume on described tuning signal to regulate described echo signal.
In above-mentioned communicator, it is preferable that described controller is further configured to by regulating described target frequency further with compensating operation condition, thus calibrating described with reference to phaselocked loop further.
In above-mentioned communicator, preferred described reference phaselocked loop includes: voltage controlled oscillator (VCO), it is configured in response to described tuning signal and frequency control signal and described echo signal is provided, wherein, controller module is configured to couple described scheduled volume on described tuning signal and frequency control signal is regulated the amount based on described operating condition, thus regulating described echo signal.
In above-mentioned communicator, it is preferable that described communicator is configured to be operated according to communication standard.
In above-mentioned communicator, it is preferable that described controller be further configured to communication standard distribute for becoming from described first mode transitions described in the time internal calibration of described second operator scheme with reference to phaselocked loop.
In above-mentioned communicator, it is preferable that the described communication standard choosing group that freely following standard is constituted: second generation cordless phone technology (2G)；Third generation radiotelephony (3G)；Long Term Evolution FDD (LTEFDD)；Long-term advancing time division duplex (LTETDD)；And TD SDMA (TD-SCDMA).
In above-mentioned communicator, it is preferable that controller module is configured to use searching algorithm described with reference to phaselocked loop to calibrate when described communicator takies communication channel.
Another aspect of the present invention relates to the method for calibration reference phaselocked loop (PLL) when communicator becomes the second operator scheme from the first mode transitions, comprising: (a) provides tuning signal；And (b) regulates described tuning signal until echo signal tracking reference signal, described adjustment includes: target frequency is regulated scheduled volume, described scheduled volume represents that the tuning signal bias of precognition, described tuning signal bias are caused by the conversion between the first operator scheme and the second operator scheme.
In above-mentioned method, it is preferable that described first operator scheme is for receiving operator scheme, and described second operator scheme is for sending operator scheme.
In above-mentioned method, it is preferable that described first operator scheme is for sending operator scheme, and described second operator scheme is for receiving operator scheme.
In above-mentioned method, it is preferable that step (b) including: (b) (i) couples described scheduled volume to regulate described tuning signal on the tuning signal of voltage controlled oscillator (VCO).
In above-mentioned method, it is preferable that described adjustment farther includes: regulate described target frequency with compensating operation condition.
In above-mentioned method, it is preferable that step (b) including: (b) (i) couples described scheduled volume to regulate described echo signal on the tuning signal of voltage controlled oscillator (VCO)；And (b) (ii) regulates the frequency control signal of voltage controlled oscillator (VCO) based on the change of described operating condition by the scale smaller version of searching algorithm, thus regulating described echo signal.
In above-mentioned method, it is preferable that described communicator is configured to be operated according to communication standard.
In above-mentioned method, it is preferable that step (b) including: (b) (i) described communication standard distribute for become the second operator scheme from the first mode transitions time in regulate described tuning signal until described echo signal follow the tracks of described reference signal.
In above-mentioned method, it is preferable that the described communication standard choosing group that freely following standard is constituted: second generation cordless phone technology (2G)；Third generation radiotelephony (3G)；Long Term Evolution FDD (LTEFDD)；Long-term advancing time division duplex (LTETDD)；And TD SDMA (TD-SCDMA).
In above-mentioned method, it is preferable that farther include: (c), when described communicator takies communication channel, uses described searching algorithm to regulate described tuning signal until described echo signal tracking reference signal.
Accompanying drawing explanation
Describe embodiment of the present disclosure with reference to the accompanying drawings.In the accompanying drawings, similar reference number represents identical or functionally similar parts.Additionally, the leftmost numeral of reference number represents accompanying drawing reference number first occur.
Fig. 1 is the block diagram of the communicator of the illustrative embodiments according to the disclosure；
Fig. 2 is the block diagram of the reference PLL that can be used in communicator of the illustrative embodiments according to the disclosure；
Fig. 3 represents the form operating spendable various calibrations that communicator to carry out according to communication standard and communicator；
Fig. 4 is the block diagram of the VCO of the illustrative embodiments according to the disclosure；
The Fig. 5 flow chart according to the exemplary operation step of the communicator of the illustrative embodiments of the disclosure.
Referring now to accompanying drawing, the disclosure is described.In the drawings, the parts that similar reference number ordinary representation is identical, functionally similar and/or similar in structure.First occur that the accompanying drawing of parts is represented by numeral leftmost in reference number.
Detailed description of the invention
Embodiment of the present disclosure includes communicator can calibrate three kinds of type of calibration of phaselocked loop (PLL).These three type of calibration includes calibration, fine adjustment and bias calibration completely.The first time of the communication channel carried out at communicator take (engagement) and/or any subsequently take period, use is calibrated by communicator completely.But when have of short duration be sufficient for the time that communicator is changed between operator scheme time, communicator will use fine adjustment.Generally, it is provided that determine by communication standard to the time of communicator.Fine adjustment includes the scale smaller version (scaleddownversion) calibrated completely and optionally applies predetermined bias with the conversion between compensating operation pattern.When being supplied to the limited time that communicator is changed between operator scheme, communicator will use bias calibration.Bias calibration includes applying predetermined bias with the conversion between compensating operation pattern.
The following specifically describes and with the disclosure consistent illustrative embodiments is described with reference to the attached figures." illustrative embodiments ", " illustrative embodiments ", " example illustrative embodiments " mentioned in illustrating etc. represent that described illustrative embodiments can include specific feature, structure or characteristic, but not all illustrative embodiments must include these specific features, structure or characteristic.And, this phrase is not necessarily referring to same illustrative embodiments.And, when describing specific feature, structure or characteristic in conjunction with illustrative embodiments, regardless of whether be clearly described, such feature, structure or characteristic can both be used for other illustrative embodiments by the technical staff in association area.
Illustrative embodiments specifically described herein is used for illustrating, and nonrestrictive.Can there be other illustrative embodiments, and in the spirit and scope of the disclosure, these illustrative embodiments can be modified.Therefore, detailed description of the invention is not intended to limit the disclosure.More precisely, only according to claims and its equivalents the scope of the present disclosure.
Embodiment of the present disclosure can be embodied as hardware, firmware, software or its combination in any row.Embodiment of the present disclosure be also implemented as on machine readable media store instruction, these instructions can be read by one or more processors and be performed.Machine readable media can include any mechanism, and this mechanism stores or the information of transmission with the form that machine (such as, calculation element) is readable.Such as, machine readable media can include transmitting signal (such as, carrier wave, infrared signal, digital signal etc.) of read only memory (ROM), random-access memory (ram), magnetic disk storage medium, optical storage media, flash memory device, electric, optics, sound or other forms etc..And, can become perform some action by firmware, software, program, instruction description herein.However, it should be understood that this description is just to conveniently, and this action is actually by calculation element, processor, controller or perform other devices of firmware, software, program, instruction etc. and produce.
The detailed description below of illustrative embodiments very intactly demonstrates the overall permanence of the disclosure, so when without departing substantially from the spirit and scope of the disclosure, by applying the knowledge of those skilled in the relevant art, people can easily revise and/or adjust this illustrative embodiments, for various application, without carrying out excessive experiment.Therefore, according to the instruction carried out herein and guidance, this adjustment and amendment include in the intension and multiple equivalent of illustrative embodiments.It being understood that wording herein or term are for descriptive purposes, and nonrestrictive, so the wording of description or term are explained according to instruction herein by those skilled in the relevant art.
Exemplary communication devices
Fig. 1 is the block diagram of the communicator of the illustrative embodiments according to the disclosure.Communicator 100 calibration is with reference to phaselocked loop (PLL) 108, with the echo signal 156 that offer is proportional fully to reference signal 154.In this case, showing as with reference to PLL108 and be in the lock state in (lockedcondition), thus echo signal 156 substantially follows the tracks of (track) reference signal 154.Such as, the phase place of echo signal 156 substantially tracking reference signal 154 in the locked state.But, if echo signal 156 is not proportional fully to reference signal 154, then echo signal 156 not tracking reference signal 154.In this case, reference PLL108 shows as and is in unlocked state.
Echo signal 156 is used as the reference signal of receptor 118 by communicator 100 in receiving operator scheme, and echo signal is used as to send the reference signal of synthesizer 116 in sending operator scheme.In receiving operator scheme, receptor 118 is used as to receive the device of signal of communication from communication channel.And in sending operator scheme, transmitter 116 is used as to send over the communication channels the device of signal of communication.
Communicator 100 is receiving operator scheme or is sending in operator scheme, and calibration is with reference to PLL108.What be just discussed further below is such, switches to transmission operator scheme and/or from sending after operator scheme switches to reception operator scheme from receiving operator scheme, and communicator 100 regulates with reference to the calibration of PLL108, to promote to enter lock-out state with reference to PLL108.At the communication standard of such as second generation cordless phone technology (2G), third generation radiotelephony (3G), Long Term Evolution FDD (LTEFDD), long-term advancing time division duplex (LTETDD) and TD SDMA (TD-SCDMA) and/or without departing substantially from the spirit and scope of the disclosure, in the time that any other suitable communication standard apparent allows for those skilled in the relevant art, communicator 100 regulates the calibration of echo signal 156.
As shown in fig. 1, communicator 100 includes reference oscillator 102, reference PLL108, handover module 110, transmitter 116, receptor 118 and controller module 120.Reference oscillator 102 is given and is provided reference signal 154 with reference to PLL108.Operation frequency required for reference signal 154 and communicator 100 is relevant.Such as, the frequency of reference signal 154 can be substantially equal to the operation frequency required for communicator 100 or for the integral multiple of this frequency or mark times.Reference oscillator 102 includes agitator 104 and optional Zoom module 106.Agitator 104 provides reference signal 150.Optional Zoom module 106 is multiplied by and/or divided by reference signal 150, to generate reference signal 154.
As it has been described above, provide echo signal 156 with reference to PLL108, this signal substantially tracking reference signal 154 in lock-out state.Such as, the frequency of echo signal 156 and/or phase place is made to be substantially equal to frequency and/or the phase place of echo signal 156 with reference to PLL108.As another example, make the phase place of echo signal 156 be substantially equal to the phase place of echo signal 156 with reference to PLL108, and make the frequency of echo signal 156 proportional to the frequency of echo signal 156, i.e. for its integer or mark again.
Echo signal 156 can be supplied to transmitter 116 as sending reference signal 162 by handover module 110 in sending operator scheme, and as receiving reference signal 164, echo signal 156 can be supplied to receptor 118 in receiving operator scheme.There is provided transmission signal 162 to the transmitter 116 of synthesis with reference to PLL108, transmitter 116 can be used for the signal transmitted over the communication channels is upconverted, modulates and/or encoded.Similarly, providing reception signal 164 to the receptor 118 of synthesis with reference to PLL108, receptor 118 can be used for the signal that receives from communication channel to down coversion, demodulation and/or decoding.
In the first operator scheme (such as, to receive operator scheme) in, when communicator 100 takies communication channel, controller module 120 calibration is with reference to PLL108, and communicator 100 switches to the second operator scheme (such as from the first operator scheme, send operator scheme) time, the calibration of this controller module is with reference to PLL108.Controller module 120 monitoring is with reference to the suitable tuning signal 168 of PLL108, and this tuning signal represents the difference between reference signal 154 and echo signal 156.In the period carrying out various calibration to be discussed below, controller module 120 regulable control signal 166.
When communicator 100 takies communication channel, controller module 120 is initially calibrated with reference to PLL108 to provide echo signal 156, and this signal is proportional to the frequency of reference signal 154 and/or phase place.In this initially calibration or completely calibration (fullcalibration) period, controller module 120 carries out widely that calibration cycle is calibrate with reference to PLL108, thus reference PLL108 locks onto in reference signal 154.Generally, this calibrates the frequency and/or phase place that relate to adjusting (align) echo signal 156 completely, with proportional to the frequency of reference signal 154 and/or phase place fully, thus being lockable in reference signal 154 with reference to PLL108.For suitably calibration target signal 156, the calibration completely with reference to PLL108 may use the substantial amounts of time.Such as, when communicator 100 takies communication channel, TD-SCDMA communication standard allows to multiplex 120 microseconds to calibrate completely.
Generally, when communicator 100 is operated in the first operator scheme (such as, receive operator scheme as an example), controller module 120 is calibrated completely.But, those skilled in the relevant art are it will be recognized that when without departing substantially from the spirit and scope of the disclosure, when communicator 100 is operated in sending operator scheme, controller module 120 also can be calibrated completely.In the first mode of operation, communicator 100 is after initially taking communication channel, and communicator 100 can become the second operator scheme from the first mode transitions, such as, for example, sends operator scheme.It is desirable that receptor 118 loading of reference PLL108 and transmitter 116 in receiving operator scheme is substantially similar with reference to the loading of PLL108 in sending reception operator scheme.But, it practice, the input impedance of transmitter 116 is different from the input impedance of receptor 118.Communicator 100 from the first mode transitions become the second operator scheme time, the difference between the input impedance of transmitter 116 and receptor 118 is likely to make enter unlocked state with reference to PLL108.In unlocked state, the non-tracking reference signal 154 of echo signal 156, unless controller module 120 performs another calibration with reference to PLL108, so that being again locked in reference signal 154 with reference to PLL108.
But, from the first mode transitions become the second operator scheme time, controller module 120 is likely to no longer to have time of abundance and performs to calibrate completely with reference to another of PLL108.Communicator 100 can carry out the time quantum of this conversion and generally be specified by various communication standards.Within the time of these regulations, reference PLL108 must be carried out this other calibration by controller module 120, and this time is generally significantly less calibrates the required time completely.Such as, TD-SCDMA communication standards mandate communicator 100, in about 12.5 microseconds, becomes to receive operator scheme from sending mode transitions；Therefore, after sending mode transitions one-tenth reception operator scheme, any calibration with reference to PLL108 must complete in 12.5 microseconds, and allowing the time calibrated completely is 120 microseconds.Therefore, from the first mode transitions become the second operator scheme time, need to carry out the calibration of time shortening with reference to PLL108.
From the first mode transitions become the second operator scheme time, controller module 120 carries out the calibration of time shortening.The calibration permission that time shortens quickly regulates echo signal 156, gives the time leaving abundance with reference to PLL108 entrance lock-out state simultaneously.Compared with other communicators, some communication standard provides the longer persistent period, to become the second operator scheme from the first mode transitions.Such as, from when sending mode transitions one-tenth reception operator scheme, TD-SCDMA communication standard allows calibration 12.5 microseconds, and when changing between these operator schemes, LTETDD communication standard allows to calibrate 47 microseconds.
Regulation longer duration is become to those communication standards of the second operator scheme from the first mode transitions, controller module 120 can perform fine adjustment (finecalibration), and for specifying that the shorter persistent period becomes those communication standards of the second operator scheme from the first mode transitions, controller module can perform bias calibration (offsetcalibration).Controller module 120 performs bias calibration by control signal 166 is regulated scheduled volume.In the exemplary embodiment, this scheduled volume represents the skew of the control signal 166 of precognition, and it is caused that the skew of control signal 166 carries out conversion between the first operator scheme and the second operator scheme.By the initial product evaluation of communicator 100, it may be determined that the skew (shift) of the control signal 166 of this precognition, so that it is determined that the skew of control signal 166 during communicator conversion.
Such as, when calibrating completely, controller module 120 calibration reference PLL108 to provide target frequency 156 with first frequency in receiving operator scheme.In this example, communicator 100 from the first mode transitions become the second operator scheme time, target frequency 156 skew is for second frequency.In this example, controller module 120 is biased calibration, in order to from second frequency, target frequency 156 is adjusted to first frequency.After echo signal 156 is regulated scheduled volume, within the persistent period of communication standard defined, enter lock-out state with reference to PLL108.
Fine adjustment includes bias calibration as above, and for compensating the another kind of adjustment of the target frequency 156 of the operating condition (such as, for temperature) of communicator 100.Generally, compared with carrying out calibration completely, this different adjustment has clearly a need for less time.After using fine adjustment to regulate echo signal 156, within the persistent period of communication standard defined, enter (settle) lock-out state with reference to PLL108.
Generally, bias calibration is accurate with fine adjustment not as calibrating completely, but compared with calibration completely and fine adjustment, it is necessary to less time.Such as, from when receiving mode transitions one-tenth transmission operator scheme, TD-SCDMA communication standard allows calibration 75 microseconds.Fine adjustment can be completed in 75 microseconds allowed.As a result, owing to 75 microseconds have been enough to fine adjustment, fine adjustment simultaneously provides and calibrates more accurately than bias calibration, so controller module 120 may select fine adjustment, but not bias calibration.As another example.From when sending mode transitions one-tenth reception operator scheme, between TD-SCDMA communication standard high-ranking officers are punctual, it is limited to 12.5 microseconds.Fine adjustment can not be completed in 12.5 microseconds allowed, but bias calibration can be completed in 12.5 microseconds.As a result, controller module 120 may select bias calibration, but not fine adjustment.
Exemplary reference PLL
Fig. 2 is the block diagram of the reference PLL that can be used in communicator of the illustrative embodiments according to the disclosure.Representing closed-loop feedback control system with reference to PLL200, this system generates echo signal 156 relative to frequency and the phase place of reference signal 154.In other words, with reference to PLL200 by negative feedback mechanism, frequency multiplication and/or frequency dividing are carried out, in order to generate echo signal 156 relative to reference signal 154.Phase/frequency detector (PFD) 202, electric charge pump 204, loop filter 206, voltage controlled oscillator (VCO) 208, optional integer frequency divider 210, optional tremor module (ditheringmodule shakes module) 212 and controller 214 can be used to realize with reference to PLL200.The illustrative embodiments with reference to PLL108 can be represented with reference to PLL200.
Difference between frequency and/or the phase place of the feedback signal 258 of the frequency of PFD202 Reference Signal 154 and/or phase place and segmentation converts error signal 250 to.Specifically, PFD202 passes through to compare the frequency of feedback signal 258 of segmentation and/or the frequency of phase place and reference signal 154 and/or phase place to detect the deviation between reference signal 154 and the feedback signal (dividedfeedbacksignal) 258 split, thus producing error signal 250.When the frequency of the frequency of error signal 250 and the feedback signal 258 of phase place and segmentation and phase place are of substantially equal, it is in the lock state with reference to PLL200.In lock-out state, the phase contrast between error signal 250 to the feedback signal 258 of reference signal 154 and segmentation is proportional.
Error signal 250 is converted to voltage/current domain representation (being expressed as electric charge pump output 252) by electric charge pump 204, to control the frequency of VCO208.When being in unlocked state with reference to PLL200, electric charge pump 204 increases or reduces electric charge pump output 252 according to error signal 250.When being in the lock state with reference to PLL200, error signal 250 is minimized, and electric charge pump is exported 252 and remains substantially stationary value by electric charge pump 204.
Loop filter 206 can be used for exporting 252 from electric charge pump removing unwanted noise, thus producing tuning signal 254.Loop filter 206 can be embodied as low pass filter, in order to suppresses the high fdrequency component in electric charge pump output 252, thus allowing direct current (DC) component of electric charge pump output 252 or nearly DC component to control VCO208.Loop filter 206 also maintains the stability with reference to PLL200.
VCO208 is voltage-frequency converter.Specifically, VCO208 produces echo signal 156 according to tuning signal 254 and frequency control signal 268.Generally, in the process calibrated completely, controller 214 regulating frequency control signal 268, until echo signal 156 is relevant to reference signal 154 fully.Such as, use searching algorithm (such as binary trie tree algorithm, recursive algorithm, Stern-Brocot algorithm and/or any other suitable retrieval apparent for those skilled in the relevant art when without departing substantially from the spirit and scope of the disclosure), controller 214 can be circulated by the various combination of frequency control signal 268, until echo signal 156 is relevant to reference signal 154 fully.Tuning signal 254 is for regulating echo signal 156 further, until being substantially equal to reference signal 154 or for the integral multiple of this reference signal or mark times.In the exemplary embodiment, by using tuning signal 254 accurately to handle (steer) echo signal 156, frequency control signal 268 is for manipulation of objects signal 156 roughly, so that it is relevant to reference signal 154 fully to control echo signal, thus allowing to be locked in reference signal 154 VCO208.
Optional integer frequency divider 210 is positioned at the feedback path with reference to PLL200.Optional integer frequency divider 210 by echo signal 156 divided by Integer N, in order to provide segmentation feedback signal 258.Optional integer frequency divider 210 may be in response to channel transmission signal 262, regulates Integer N.
Optional tremor module 212 allows with reference to PLL200 by the time between two or more integer values, tremor (dither) partition value, thus obtaining effective time average fractional Frequency Dividing Factor.More specifically, optional tremor module 212 is in response to frequency dividing code (divisioncode) 260, select between plural integer value, for each iteration with reference to PLL200, thus the fractional frequency division factor (fractionaldivisionfactor) can be represented fifty-fifty.Optional tremor module 212, in response to frequency dividing ratio control signal (divideratiocontrolsignal) 262, generates frequency dividing code 260.
When the calibration carrying out calibration, fine adjustment and/or bias calibration completely, controller module 214 calibration is with reference to PLL200.Controller module 214 illustrates the exemplary enforcement of above-mentioned calibration, fine adjustment and/or bias calibration completely.When communicator (such as, for example, communicator 100) takies communication channel, controller module 214 is initially calibrated with reference to PLL200 to provide echo signal 156, and this echo signal is proportional to the frequency of reference signal 154 and/or phase place.
Controller module 214 can provide channel transmission signal 262, and this channel transmission signal makes optional tremor module 212 provide the frequency dividing ratio control signal 262 corresponding to communication channel.Controller module 214 provides the first value of frequency control signal 268, so that VCO208 provides the echo signal 156 of first frequency.Once echo signal 156 has arrived at first frequency, then controller module 214 monitoring tuning signal 254.Whether controller module 214 compares tuning signal 254 and predetermined tuning signal, be in the lock state with reference to PLL200 to determine.When being in the lock state with reference to PLL200, predetermined tuning signal represents the tuning signal being positioned at the precognition with reference to PLL200.Such as, when being in the lock state with reference to PLL200, the tuning signal of precognition can represent DC voltage.Controller module 214 compares the extent between the tuning signal of tuning signal 254 and precognition and lock threshold.When extent is less than or equal to lock threshold, echo signal 156 is relevant to reference signal 154 fully.In this case, the state of locking is entered with reference to PLL200, with tracking reference signal 154.
But, when extent is more than lock threshold, echo signal 156 is not relevant to reference signal 154 fully.In this case, it is in unlocked state with reference to PLL200.Then, controller module 214 provides the second value for frequency control signal 268, so that VCO208 provides the echo signal 156 of second frequency.Controller module 214 determines whether second frequency makes to enter lock-out state with reference to PLL200.If being introduced into lock-out state, then controller module 214 continues regulating frequency control signal 268, until VCO208 enters lock-out state.But, this example is also nonrestrictive, and various equivalent modifications is understood that, additive method can also be used for tuning with reference to PLL200, so that entering lock-out state with reference to PLL200.
In receiving operator scheme, receiving after signal of communication from communication channel, communicator can become send operator scheme from receiving mode transitions.Over the communication channels after transmission signal of communication, communicator can be brought drill to an end operation mode from sending mode transitions tieback, or takies another communication channel.As it has been described above, when communicator is changed between these operator schemes, controller module 214 can use fine adjustment and/or bias calibration to calibrate with reference to PLL200.Generally, the communication standard being operated according to communicator selects fine adjustment and/or bias calibration.
Such as, as shown in Figure 3, communicator can LTETDD standard be operated.Communicator is from when receiving mode transitions one-tenth transmission operator scheme, and LTETDD standard allows controller module 214 to calibrate VCO208 by 71.3 microseconds so that will be locked in reference signal 154 with reference to PLL200.In this case, communicator is from when receiving mode transitions one-tenth transmission operator scheme, and controller module 214 selects fine adjustment.
As another example, equally as shown in Figure 3, communicator can be operated under TD-SCDMA standard.Communicator is from when sending mode transitions one-tenth reception operator scheme, and TD-SCDMA standard allows controller module 214 to calibrate VCO208 by 12.5 microseconds so that locking reference PLL200 in reference signal 154.In this case, communicator is from when sending mode transitions one-tenth reception operator scheme, and controller module 214 selects bias calibration, this is because LTETDD standard provides the sufficient time to complete bias calibration, but does not provide the sufficient time to complete fine adjustment.
By echo signal 156 regulates scheduled volume, controller module 214 can be biased calibration, and this scheduled volume is relevant to the skew of echo signal 156, and the skew of echo signal 156 is relevant caused by changing between operator scheme.Generally, scheduled volume is shown coupled to the skew of the predetermined voltage on tuning signal 254 and/or electric current and/or VCO tuned cell.This predetermined voltage x current and/or VCO tuned cell offset target signal 156, in order to produced difference when mediation is changed between operator scheme.After echo signal 156 is regulated scheduled volume, within the persistent period of communication standard defined, enter lock-out state with reference to PLL200.
Fine adjustment includes bias calibration as above, and the another kind of adjustment of target frequency 156, in order to compensate the operating condition of communicator, such as, for example, and temperature and/or power supply.Echo signal 156 is regulated scheduled volume by controller module 214, and its regulative mode is substantially similar with bias calibration.Controller module 214 additionally regulates echo signal 156 with compensating operation condition.Generally, this operation adjustment show as to calibrate completely similar, but scale smaller.Controller module 214 provides the different value of predetermined quantity for frequency control signal 268, so that VCO208 provides the echo signal 156 of different frequency.In the exemplary embodiment, the different value of predetermined quantity represents two various combinations of searching algorithm.But, this example is also nonrestrictive, those skilled in the relevant art will appreciate that, when without departing substantially from the spirit and scope of the disclosure, as long as completing fine adjustment within the time that communication standard distributes, then the different value of predetermined quantity just can represent any an appropriate number of various combination of searching algorithm.
Example calibration requirement for different communication standards
Fig. 3 is the form representing various types of calibrations, and these calibrations can be used for distinct communication standards by communicator according to the illustrative embodiments of the disclosure.Fig. 3 includes the example communication standard that communicator (such as, for example, communicator 100) can be operated；But, those skilled in the relevant art are it will be recognized that when without departing substantially from the spirit and scope of the disclosure, communicator can be operated according to other communication standards.
For each communication standard, Fig. 3 describes each respective communication standard to controller module (such as, for example, controller module 120 or controller module 214) calibration with reference to PLL(such as, for example, with reference to PLL108 or with reference to PLL200) time of allowing.Such as, Fig. 3 describes communicator when taking communication channel, and TD-SCDMA communication standard allows controller module 200 microseconds suitably to calibrate reference PLL.200 microseconds that TD-SCDMA communication standard provides can be sufficiently carried out calibrating completely.But, the calibration time (calibrationperiod) from reception mode transitions one-tenth transmission operator scheme that TD-SCDMA provides is 75 microseconds.75 microseconds are enough to carry out fine adjustment, but are not enough to calibrate completely.And, the calibration time from transmission mode transitions one-tenth reception operator scheme that TD-SCDMA provides is 12.5 microseconds.12.5 microsecond is enough to be biased calibration, but is not enough to carry out calibration and/or fine adjustment completely.
Exemplary voltage controlled oscillator (VCO)
Fig. 4 is the block diagram according to exemplary voltage controlled oscillator (VCO) spendable in the communicator of the illustrative embodiments of the disclosure.During a calibration in carrying out calibration completely, fine adjustment and/or bias calibration, controller module (such as, for example, controller module 120 or controller module 214) calibration VCO400, thus providing target output 452.1 and 452.2.The illustrative embodiments of target output 452.1 and 452.2 expression target output 156.VCO400 includes fine frequency element 402 and coarse frequency element (coarsefrequencycomponent) 404, and these frequency elements are operated providing echo signal 156 in conjunction.
Fine frequency element 402 includes the first fine fine capacitor 406.2 of capacitor 406.1, second and varactor 408.As shown in Figure 4, tuning signal 254 is applied to varactor 408.Varactor 408 represents variable capacitance, and its electric capacity is the function of tuning signal 254.First fine capacitor 406.1 and the second fine capacitor 406.2 couple varactor 408 to separate tuning signal 254 from coarse frequency element 404.Generally, time compared with varactor 408, the first fine capacitor 406.1 and the second fine capacitor 406.2 represent large capacitor so that the electric capacity of fine frequency element 402 is subject to the control of varactor 408.
Coarse frequency element 404 includes transistor switch 410.1 and arrives 414.n, the first inducer 416.1 and the second inducer 416.2 to 410.n, the first capacitor 412.1 to 412.n, the second capacitor 414.1.When being activated by corresponding frequency control signal 450.1 to 450.n, switch 410.1 to 410.n makes its corresponding first capacitor 412.1 facilitate the electric capacity of coarse frequency element 404 to 412.n and the second capacitor 414.1 to 414.n.Frequency control signal 450.1 represents the illustrative embodiments of frequency control signal 268 to 450.n.In other words, the first capacitor 412.1 is switched on and off in coarse frequency element 404 by its corresponding switch 410.1 to 410.n to 412.n and the second capacitor 414.1 to 414.n.In the exemplary embodiment, coarse frequency element 404 can include the first capacitor 412.1 to 412.8 and the second capacitor 414.1 to 414.8.Those capacitors connected in coarse frequency element 404 constitute the electric capacity of coarse frequency element 404, and those capacitors broken at coarse frequency element 404 do not constitute this electric capacity.It is configured and disposed to form resonance circuit to 414.n to 412.n and the second capacitor 414.1 by first inducer the 416.1, second inducer 416.2 connected in coarse frequency element 404 and the first capacitor 412.1.
VCO400 can include the oscillator core and the bias current sources 420 that are made up of transistor 418.1 and transistor 418.2.
Controller module provides various frequency control signal 450.1 to arrive 450.n, in order in the process calibrated completely, switches on and off various first capacitor 412.1 and arrive 414.n to 412.n and various second capacitor 414.1 in coarse frequency element 404.Determine that various frequency control signal 450.1 arrives 450.n according to searching algorithm.So switch on and off the first capacitor 412.1 and arrive 414.n to 412.n and the second capacitor 414.1, thus regulating the frequency of target output 452.1 and 452.2.Generally, the frequency of target output 452.1 and 452.2 is reversely relevant to the electric capacity of coarse frequency element 404.Controller module switches the first capacitor 412.1 continuously and arrives 414.n to 412.n and the second capacitor 414.1 according to searching algorithm, until target output 452.1 and 452.2 is relevant to reference signal 154 fully, thus allowing by using the electric capacity that tuning signal 254 accurately regulates fine frequency element 402 to be locked in reference signal 154 by VCO400.
When being biased calibrating, electric capacity and/or frequency control signal 450.1 to the 450.n of fine frequency element 402 are regulated scheduled volume by controller module.
When carrying out fine adjustment, controller module is by the capacitance adjustment scheduled volume of fine frequency element 402, and by allowing the scale smaller version regulating frequency control signal 450.1 of complete calibration cycle (fullcalibrationcycle) to arrive 450.n, thus regulating the electric capacity of coarse frequency element 404.
The exemplary operation control flow of communicator
Fig. 5 is the flow chart of the exemplary operation step of the communicator of the illustrative embodiments according to the disclosure.The disclosure is not limited to this operability and retouches explanation.More precisely, by instruction herein, for those skilled in the relevant art, other operation control flows are obviously within the scope and spirit of this.Following discussion describes the step in Fig. 5.
In step 510, operation control flow determines a communication channel from multiple communication channels, and this communication channel of use is sent and/or receives signal of communication by communicator.
In step 520, operation control flow is calibrated completely, thus being communication channel calibration communicator.Specifically, operation control flow regulates the reference PLL(in communicator such as, with reference to PLL108 or reference PLL200 as few examples), to be locked in reference signal (such as, reference signal 154 is exemplarily).
In step 530, operation the control flow communication channel receiving step 510 from step 510 signal of communication, and/or in the communication channel of step 510 signal of communication of forwarding step 510.
In step 540, operation control flow determines whether communicator selects another communication channel from multiple communication channels or become to send operator scheme from receiving mode transitions or become to receive operator scheme from sending mode transitions.Such as, after the signal of communication of the communication channel receiving step 510 of step 510, operation control flow determines whether communicator sends another communication subsequently in the communication channel of step 510.As another example, in the communication channel of step 510 after the signal of communication of forwarding step 510, operation control flow determines whether communicator receives another communication from the communication channel of step 510 subsequently.
Operation control flow advances to step 550, to change between these operator schemes, or returns step 510 to select another communication channel.
In step 540, operation control flow determines whether communicator is changed between the operator scheme of step 530.If carried out conversion, operation control flow advances to step 550, and otherwise, operation control flow returns step 510, to determine another signal of communication.
In step 550, operation control flow determines the operation conversion time that communication standard allows.Such as, when being operated under TD-SCDMA communication standard, operation control flow becomes to receive operator scheme from sending mode transitions.In this example, operation control flow determines the conversion time that TD-SCDMA communication standard allows, with from sending mode transitions one-tenth reception operator scheme, this conversion time substantially 12.5 microsecond.
In step 560, operation control flow determines whether communication standard provides the sufficient time to use fine adjustment calibration communicator.If any, operation control flow advances to step 570.Otherwise, operation control flow advances to step 580.
In step 570, operation control flow carries out fine adjustment, is then back to step 540.
In step 580, operation control flow is biased calibration, is then back to step 540.
Conclusion
It being understood that and illustrate part but not summary part for explaining claims.Summary part is it is proposed that one or more illustrative embodiments of the disclosure, but not all of illustrative embodiments, therefore under any circumstance, all it is not intended to the disclosure and appending claims.
Describing the disclosure by means of functional component block above, these functional component blocks set forth the enforcement of specific function and its relation.For the ease of illustrating, at random limit the boundary of these functional component blocks in this article.As long as being appropriately performed specific function and its relation, so that it may limit other boundary.
For those skilled in the relevant art, when without departing substantially from the spirit and scope of the disclosure, it is clear that the disclosure can be carried out the change on various forms and in details.Therefore, the disclosure should not be restricted by the restriction of any of above illustrative embodiments, and should only by claims and its equivalents.
Claims (8)
1. a communicator, including:
With reference to phaselocked loop (PLL), it is configured to provide echo signal；And
Controller, it is configured to calibration with reference to phaselocked loop, thus when described communicator enters the first operator scheme, reference phaselocked loop performs the first alignment routine to regulate echo signal, and when described communicator becomes the second operator scheme from described first mode transitions, the second alignment routine is performed to regulate described echo signal tracking reference signal with reference on phaselocked loop described
Wherein, described first alignment routine is complete alignment routine, described second alignment routine is fine adjustment routine or bias calibration routine, wherein said communicator is further configured to, relative to described second alignment routine, distribute the more time to perform described first alignment routine for described controller.
2. communicator according to claim 1, wherein, described first operator scheme is for receiving operator scheme, and described second operator scheme is for sending operator scheme.
3. communicator according to claim 1, wherein, described first operator scheme is for sending operator scheme, and described second operator scheme is for receiving operator scheme.
4. communicator according to claim 1, wherein, described reference phaselocked loop includes:
Voltage controlled oscillator (VCO), is configured in response to tuning signal and provides described echo signal,
Wherein, described controller is configured on described tuning signal to couple scheduled volume to regulate described echo signal.
5. communicator according to claim 1, wherein, described communicator is configured to be operated according to communication standard.
6. communicator according to claim 5, wherein, described controller be further configured to communication standard distribute for becoming from described first mode transitions described in the time internal calibration of described second operator scheme with reference to phaselocked loop.
7. communicator according to claim 5, wherein, the described communication standard choosing group that freely following standard is constituted:
Second generation cordless phone technology (2G)；
Third generation radiotelephony (3G)；
Long Term Evolution FDD (LTEFDD)；
Long-term advancing time division duplex (LTETDD)；And
TD SDMA (TD-SCDMA).
8. for the calibration when communicator becomes the second operator scheme from the first mode transitions with reference to a method for phaselocked loop (PLL), including:
A (), relative to performing the second alignment routine, distributes the more time to perform the first alignment routine；And
B (), when described communicator enters described first operator scheme, performs described first alignment routine to regulate tuning signal until echo signal tracking reference signal,
When described communicator is from described first mode transitions to described second operator scheme, described with reference to phaselocked loop performing described second alignment routine to adjust described tuning signal until the described echo signal described reference signal of tracking, and wherein,
Described first alignment routine is complete alignment routine, and described second alignment routine is fine adjustment routine or bias calibration routine.
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| US201161556094P | 2011-11-04 | 2011-11-04 | |
| US61/556,094 | 2011-11-04 | ||
| US13/356,137 US8611842B2 (en) | 2011-11-04 | 2012-01-23 | Apparatus and method for fast phase locked loop (PLL) settling for cellular time-division duplex (TDD) communications systems |
| US13/356,137 | 2012-01-23 |
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| CN103095291A CN103095291A (en) | 2013-05-08 |
| CN103095291B true CN103095291B (en) | 2016-06-29 |
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| EP (1) | EP2590263B1 (en) |
| KR (1) | KR101436979B1 (en) |
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| KR102481291B1 (en) | 2016-09-12 | 2022-12-26 | 삼성전자 주식회사 | Method and apparatus for calibrating phase of antenna in wireless communication system using unlicensed band |
| KR102520406B1 (en) | 2016-12-23 | 2023-04-12 | 삼성전자 주식회사 | Method and apparatus for calibrating phase of antenna in a massive antenna system |
| GB201810760D0 (en) * | 2018-06-29 | 2018-08-15 | Nordic Semiconductor Asa | Calibration of a synthersiser in a radio receiver |
| JP7104407B2 (en) * | 2018-07-25 | 2022-07-21 | ザインエレクトロニクス株式会社 | Voltage controlled oscillator, PLL circuit and CDR device |
| KR20210078965A (en) | 2019-12-19 | 2021-06-29 | 삼성전자주식회사 | Apparatus for preventing burn in a electronic device and thereof method |
| CN111900978B (en) * | 2020-08-07 | 2021-11-23 | 上海橙群微电子有限公司 | Phase-locked loop circuit, transmitter and wireless transceiving system |
| KR20220153172A (en) | 2021-05-10 | 2022-11-18 | 삼성전자주식회사 | Phase locked loop and operating method of phase locked loop |
| CN114401001B (en) * | 2021-12-30 | 2022-11-15 | 北京力通通信有限公司 | Phase-locked loop rapid phase locking method |
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| KR100219709B1 (en) * | 1994-03-15 | 1999-09-01 | 윤종용 | Signal processing circuits for digital radio communication system |
| JP2929984B2 (en) * | 1995-11-28 | 1999-08-03 | 関西日本電気株式会社 | PLL synthesizer circuit |
| US7546097B2 (en) * | 2002-03-06 | 2009-06-09 | Qualcomm Incorporated | Calibration techniques for frequency synthesizers |
| GB2413019B (en) * | 2002-05-31 | 2006-03-29 | Renesas Tech Corp | Semiconductor integrated circuit device for communication |
| CN1849744A (en) * | 2003-09-10 | 2006-10-18 | 皇家飞利浦电子股份有限公司 | Variable impedance circuit using cell arrays |
| US7498888B2 (en) * | 2003-12-19 | 2009-03-03 | Nxp B.V. | Method and arrangement for interference compensation in a voltage-controlled frequency generator |
| EP1716634B1 (en) * | 2004-02-20 | 2020-03-04 | GCT Semiconductor, Inc. | Improvement of the coarse tuning time in pll with lc oscillator |
| KR100793988B1 (en) * | 2006-04-21 | 2008-01-16 | 삼성전자주식회사 | System and Method for Self Calibrating Voltage-Controlled Oscillator |
| US8010072B1 (en) * | 2008-06-18 | 2011-08-30 | Atheros Communications, Inc. | Charge pump current compensation for phase-locked loop frequency synthesizer systems |
| US8130046B2 (en) * | 2009-03-19 | 2012-03-06 | Qualcomm Incorporated | Frequency calibration of radio frequency oscillators |
| US8098110B2 (en) * | 2009-11-20 | 2012-01-17 | Qualcomm Incorporated | Phase locked loop apparatus with selectable capacitance device |
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| US8611842B2 (en) | 2013-12-17 |
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| EP2590263A3 (en) | 2017-08-02 |
| EP2590263B1 (en) | 2018-09-19 |
| HK1180464A1 (en) | 2013-10-18 |
| KR101436979B1 (en) | 2014-11-03 |
| TWI462498B (en) | 2014-11-21 |
| CN103095291A (en) | 2013-05-08 |
| US20130113535A1 (en) | 2013-05-09 |
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