JP2929984B2 - PLL synthesizer circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a charge pump type PLL synthesizer circuit used for a wireless LAN of a frequency hopping spread spectrum (FH-SS) type.

[0002]

2. Description of the Related Art A PLL synthesizer circuit 10 used for a frequency hopping spread spectrum (FH-SS) type wireless LAN is represented by a functional block diagram as shown in FIG. (PD) 30 and low-pass filter (LPF) 40,
Voltage controlled oscillator (VCO) 50, microcomputer (MPU) 6
Oscillation frequency of the voltage controlled oscillator 50
In the control range, the phase of the signal divided from the reference oscillator 20 and the signal of the voltage controlled oscillator 50
A comparison is made with 0, the oscillation frequency of the voltage controlled oscillator 50 is changed in a following manner, and the operation of confirming the change is repeatedly performed sequentially to search for a signal of the target frequency from the voltage controlled oscillator 50 . As the frequency deviation from the search start frequency to the target frequency increases, it takes more time (lock-up time) to determine the frequency of the target signal and tune the voltage-controlled oscillator.
It is currently required that the control range of the wave number be 100 MHz and a time of 100 microseconds or less.

[0003]

In particular, the target frequency is slightly before the search direction of the search start frequency,
As shown in FIG. 4, the target frequency is set to a frequency near both ends of the control range.
If the wave number fL and the search start frequency fs are present, the lock-up time ts from the search start frequency fs to the search for the target frequency fL takes a long time, and the voltage control generation is actually started.
It was also difficult to guarantee a lock-up time of 150 microseconds or less when the oscillation frequency control range of the vibrator 50 was 100 MHz. In view of such a situation, the present invention
A wireless LA adopting a frequency hopping spread spectrum (FH-SS) system in which the control range is 100 MHz and a lock-up time of 100 microseconds or less is satisfied.
It is an object to provide a PLL synthesizer circuit used for N.

[0004]

In order to achieve the above object , an electric power is controlled within a control range of an oscillation frequency of a voltage controlled oscillator.
Switching the frequency of the target frequency signal from the pressure controlled oscillator
Output, the voltage controlled oscillation when switching the target frequency
The frequency of the initial output signal of the
Reference oscillation corresponding to output signal and target signal of pressure controlled oscillator
The phase difference from the reference signal from the detector is detected by the phase comparator.
Through the loop filter until the phase difference disappears.
And supply it as the control voltage of the voltage controlled oscillator.
A frequency hopper that controls the output signal of the oscillator to the target frequency
Used for wireless LAN with spreading spectrum method
A charge pump type PLL synthesizer circuit,
An offset voltage source for outputting a offset voltage, the system
The control voltage is either the detection output or the offset voltage.
Switching means for switching between the initial
The switching as the control voltage for outputting a force signal.
Start the search by applying the offset voltage by means
Offsetting the frequency to the median of the control range.
A charge pump type PLL synthesizer circuit is provided.

[0005]

FIG. 1 is a block diagram showing a circuit configuration of an embodiment of a charge pump type PLL synthesizer used in a wireless LAN of a frequency hopping spread spectrum (FH-SS) type according to the present invention. . The charge pump type PLL synthesizer circuit 1 of the present invention includes a reference oscillator (RefG) 2 and a phase comparator (PD) 3,
It comprises a loop filter (LPF) 4, a voltage controlled oscillator (VCO) 5, a microcomputer (MPU) 6, a switching means (SW) 7, and an offset voltage source (vc) 8.

[0006] This PLL synthesizer circuit 1 has a voltage control.
A divided output obtained by dividing an output signal from the control oscillator 5 by a dividing counter built in the phase comparator 3 and an MPU 6
Oscillation of the reference oscillator 2 corresponding to the target frequency given by
The output is calculated by another frequency dividing counter built in the phase comparator 3.
The phase difference between the reference signal generated by dividing is detected by the phase comparator 3. The detection output is supplied to the loop filter 4 to generate a control voltage for controlling the voltage controlled oscillator 5. This is repeated until the phase difference in the phase comparator 3 disappears, and the output signal from the voltage controlled oscillator 5 is controlled to the target frequency . When the continuous search is designated, the microcomputer 6 generates a reference sound.
To update sequentially at a predetermined period an oscillation output of oscillator 2 from the frequency division ratio of Ah <br/> Ru dividing ratio of the dividing counter for dividing. This allows
The target frequency from the voltage controlled oscillator 5 is sequentially switched, and a continuous search is performed.

The target frequency from the voltage controlled oscillator 5 is sequentially
When switching, the voltage controlled oscillator 5 at the time of switching is controlled.
The control voltage controlled by the loop filter 4 and the voltage controlled oscillator 5
The switching means 7 provided between the
It switched to the offset voltage from the pressure source (vc) 8, this
Time of the initial output signal output from the voltage controlled oscillator 5
The search start frequency fs, which is the wave number, is fm as shown in FIG.
Offset to the constant frequency fc at the center of the control range from ax to fmin.

The voltage starting from the offset frequency fc is
Search for signal of target frequency from controlled oscillator 5 and control voltage
Tuning the output signal from the oscillator 5 to the target frequency
Therefore, since a half area without a signal in the control range is not needlessly searched, the time corresponding to the area is shortened and the lock-up time ts is shortened. Therefore, in the embodiment, even if the control range is 100 MHz, the conventional PLL synth
Control range sizer circuit 10 becomes equal to the lock-up time ts of 50 MHz could be 100 microseconds or less.

[0009]

According to the present invention, the target frequency from the voltage controlled oscillator is sequentially determined.
Controls the voltage-controlled oscillator when switching
Control voltage to be switched
Switch to the offset voltage from the source (vc)
The search start frequency output from the voltage controlled oscillator is
In order to offset the oscillation frequency of the control oscillator to the center frequency of the control range, the phase comparison operation is started from the center frequency.
Even when there is a target frequency, the time is half of the conventional search time, and the lock-up time is less than 100 microseconds in a control range of 100 MHz.

[Brief description of the drawings]

FIG. 1 is a functional block diagram of a PLL synthesizer circuit of the present invention.

FIG. 2 is an output pattern of a voltage controlled oscillator based on the PLL synthesizer circuit of the present invention.

FIG. 3 is a functional block diagram of a conventional PLL synthesizer circuit.

FIG. 4 is an output pattern of a voltage controlled oscillator based on a conventional PLL synthesizer circuit.

[Explanation of symbols]

 Reference Signs List 1 PLL synthesizer circuit 2 Reference oscillator (RefG) 3 Phase comparator (PD) 4 Loop filter (LPF) 5 Control voltage oscillator (VCO) 6 Microcomputer (MPU) 7 Switching means (SW) 8 Offset voltage source (vc)

Claims (1)

(57) [Claims] 1. A control range of an oscillation frequency of a voltage controlled oscillator.
Signal of the target frequency from the voltage-controlled oscillator
Output voltage when switching the target frequency
The frequency of the initial output signal of the controlled oscillator is determined as the search start frequency.
Corresponding to the output signal of the voltage controlled oscillator and the target signal.
The phase difference from the reference signal from the reference oscillator is detected by the phase comparator.
The detection output is loop-filtered until the phase difference disappears.
As a control voltage of the voltage controlled oscillator through the filter,
The frequency that controls the output signal of the voltage controlled oscillator to the target frequency
Used for several hopping spread spectrum wireless LAN
Used charge pump type PLL synthesizer circuit
Offset voltage source that outputs an offset voltage
And the control voltage is changed to the detection output and the offset voltage.
And switching means for switching to either
The switch is used as the control voltage for outputting the initial output signal.
Before applying the offset voltage by the switching means.
Offset the search start frequency to the median of the control range
Charge pump PLL synth
Sizer circuit.