CN103094291A - Image sensor packaging structure having double layers of substrates - Google Patents
Image sensor packaging structure having double layers of substrates Download PDFInfo
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- CN103094291A CN103094291A CN2012102204080A CN201210220408A CN103094291A CN 103094291 A CN103094291 A CN 103094291A CN 2012102204080 A CN2012102204080 A CN 2012102204080A CN 201210220408 A CN201210220408 A CN 201210220408A CN 103094291 A CN103094291 A CN 103094291A
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- double layer
- crystal grain
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
The invention provides an image sensor packaging structure having double layers of substrates. The image sensor packaging structure comprises a first substrate which has a grain reception opening and multiple first penetration holes that penetrate through the first substrate, a second substrate which is formed on the first substrate and includes a grain opening window and multiple penetration holes that penetrate through the second substrate. A part of a second wiring diagram is coupled with a part of a third wiring diagram. An image grain contains a conductive pad and a receiving sensing array, wherein the grain reception opening and a sensing array window are exposed to the grain opening window; and penetration hole conductive material is used for filling the multiple second penetration holes, wherein part of the holes of the second penetration holes are coupled with the conductive pad of the image grain.
Description
Technical field
The present invention relates to a kind of encapsulation structure for image sensor, particularly a kind of encapsulation structure for image sensor that contains crystal grain embedding double layer substrate.
Background technology
In the field of semiconductor element, along with component size is constantly dwindled, component density also constantly improves.Also must improve to meet above-mentioned situation in the technical need aspect encapsulation or interconnector.Traditionally, in covering brilliant method of attachment (flip-chip attachment method), a solder bump array is formed at the surface of above-mentioned crystal grain.The formation of above-mentioned solder projection can be by using a soldering composite material (solder composite material), and (solder mask) produces desired solder projection pattern through a pad shade.The function of wafer package comprises power and transmits (power distribution), signal transmission (signal distribution), heat radiation (heat dissipation), protection and support etc.More complicated when semiconductor variable, traditional encapsulation technology, for example leaded package (lead frame package), contraction type encapsulation (flex package), rigid encapsulation technology (rigid package technique), can't satisfy the demand of making high density components on a less wafer.More complicated when semiconductor variable, traditional encapsulation technology, for example leaded package (lead frame package), contraction type encapsulation (flex package), rigid encapsulation technology (rigid package technique), can't satisfy the demand of making high density components on a less wafer.The development trend of the encapsulation technology of today is towards ball grid array (BGA, ball grid array), cover crystalline substance (FC-BGA, flip-chip), chip-size package (CSP, chip scale package) and wafer-level packaging (WL-CSP, wafer level chip scale package).
Image sensor is widely used in digital still camera, mobile phone, mobile phone and other application now.Making the technical of image sensor, particularly the CMOS image sensor, all have greatly improved.For example, for the demand of high-res and low power consumption, all impel image sensor towards minimizing and the integration aspect strides forward.
At a kind of photoelectricity diode that is called hole bundle formula photoelectricity diode (pinned photodiode) and embedded photoelectric diode (buried photodiode) of the normal use of the image sensor of the overwhelming majority, because this photoelectricity diode has lower noise performance.
The anodal layer of this photoelectricity diode structure normally embeds the surface of this photoelectricity diode or below and near a transmission lock (transfer gate), negative electrode layer is that embedding one silicon is the darker position of substrate, this embedded layer can store electric charge and away from surf zone, it is the defective of substrate surface that meaning can be avoided this silicon, and the purpose of anodal layer is that the storage volume that is to provide the photoelectricity diode that increase is arranged and passivation are in the defective on photoelectricity diode surface.
There are many image sensor wafers to use the crystal covering type packing structure, all attempt to develop the image sensor encapsulation architecture is oversimplified.United States Patent (USP) 6,144,507 exposure are a kind of directly with the technology of image sensor wafer sealing on printed circuit board (PCB) (PCB, printed circuit board).
One image sensing wafer is locked on a hole in PCB by the crystal covering type packing structure, and a transparent cover body also directly is attached to the surface, master end of this wafer or being bonded in this image sensing wafer is locked in the opposite side on hole in this PCB.
Although these methods are all omitted the difficulty place of wire bonds, however this PCB in order to meet the size of this image sensing wafer and this transparent cover body, the size of this PCB usually can be very large.
United States Patent (USP) 5,786,589 disclose a kind of Adhesive Label tablets on glass substrate and a gluing image sensing wafer and a conductive film to this labei sheet.Because the cause of labei sheet wire, so this design needs a kind of special substrate attach technology.Moreover this conductive film may disturb the sensing circuit on this image sensing wafer and needs form a virtual distribution or dam structure makes up this problem.
United States Patent (USP) 6,885,107 disclose a kind of traditional encapsulation structure of image sensing chip.It adopts a kind ofly has at the substrate bottom BGA encapsulation that a plurality of solder ball and this crystal grain expose to substrate.
The making of the encapsulation structure for image sensor that provides according to this invention has aforementioned and other favourable characteristics and method.One image sensing wafer utilizes a conductive trace that covers on the first surface that crystal type is arranged on a transparency carrier.The active surface of this image chip is protected by the surrounding space deposition sealing pearl of this first surface that rear active surface at this image chip and this substrate are installed and is avoided polluting, and has therefore omitted prior art required dam structure or spacing frame in addition.The transport element that disperses such as solder ball and column stick to this conductive trace end and form an array figure, and the transport element of this dispersion laterally extends out to a surperficial common plane of the back of the body that surpasses haply this image sensing wafer from this conductive trace on this first surface.Such structure has comprised a kind of BOC(board-on-chip) encapsulation arrange.But because the solder ball height of this structure and this extrusion mould are accepted structure and are allowed this substrate thickness can't reduce to have limited the dwindling of size of encapsulating structure.
Prior art forms this image sensing chip package and has complicated process, and this encapsulating structure is too high and can't be reduced.In addition, the encapsulation that only discloses single-chip of these prior arts there is no the structure of explanation multi-wafer.
Summary of the invention
In view of this, main purpose of the present invention is to provide a kind of encapsulation structure for image sensor with double layer substrate, and it has to be pre-formed and penetrates the double layer substrate that hole and crystal grain are accepted opening.
Another object of the present invention is to provide a kind of encapsulation structure for image sensor with double layer substrate of crystal grain openning, in order to the reliability of improving device and the size of reduction device.
Another purpose of the present invention is to provide a kind of to be had the alloying metal that utilizes copper clad laminate and electro-coppering gold or copper nickel gold and can increase the encapsulation structure for image sensor that wiring diagram that electrical conduction forms is positioned at double layer substrate below and top.
For achieving the above object, technical scheme of the present invention is achieved in that
A kind of encapsulation structure for image sensor with double layer substrate comprises one and has crystal grain and accept the first substrate and a plurality of first of opening and penetrate hole, and it penetrates this first substrate; One second substrate, it is formed on this first substrate, wherein this first substrate has one first wiring diagram and one second wiring diagram, it is formed at below and the surface, top of this first substrate, and this second substrate has one the 3rd wiring diagram and one the 4th wiring diagram, it is formed at below and the surface, top of this second substrate, and the second wiring diagram of part is coupled with the 3rd wiring diagram of part; It comprises a conductive pad and a reception sensing array one image crystal grain, wherein this crystal grain is accepted opening and this sensing array window and is exposed to this crystal grain openning and one and penetrates the hole electric conducting material, a plurality of second penetrate hole in order to be filled in this, wherein this a plurality of second penetrates part hole in hole and the conductive pad coupling of this image crystal grain.
One optical glass substrate, it is formed on this second substrate and this crystal grain openning.One lens fixed mount comprises lens, and it is formed on this optical glass substrate, reaches wherein these lens and this image sensing grain alignment.One infrared filter is within it is formed at this lens fixed mount.One passive type crystal grain and/or an active crystal grain, it is formed on this second substrate, and wherein this active crystal grain comprises: chip-size package, circle level chip-size package, ball grid array and cover the Jingjing grain.In addition, this a plurality of first at least one sidewall that penetrates hole comprises conductive metal.This penetrates the hole electric conducting material, comprises metal or alloy, as scolding tin and anisotropic conducting membrance.
One contains the lens fixed mount of lens, and it is formed on this second substrate, wherein these lens and this image sensing grain alignment.One infrared filter is within it is formed at this lens fixed mount.One passive type crystal grain, it is formed on this second substrate.One active crystal grain, it is formed on this second substrate.
This active crystal grain comprises: chip-size package, circle level chip-size package, ball grid array and cover the Jingjing grain.This a plurality of first at least one sidewall that penetrates hole comprises a conductive metal.This penetrates the hole electric conducting material, comprises metal or alloy or anisotropic conductive film.This first substrate and this second substrate material comprise fire resistant epoxy glass mat (FR5) or FR4.In addition, this first substrate and this second substrate material comprise bismaleimides triazine resin, silicon system, printed circuit board material, glass, pottery, metal or alloy.
Encapsulation structure for image sensor with double layer substrate provided by the present invention has the following advantages: it has to be pre-formed and penetrates the double layer substrate that hole and crystal grain are accepted opening.Encapsulation structure for image sensor with double layer substrate of crystal grain openning can improve the reliability of encapsulating structure and the size of reduction encapsulating structure.Utilize the alloying metal of copper clad laminate and electro-coppering gold or copper nickel gold can increase the encapsulation structure for image sensor that wiring diagram that electrical conduction forms is positioned at double layer substrate below and top.
Description of drawings
Fig. 1 is for illustrating the sectional view before a first substrate, a second substrate and image sensor link according to the present invention.
The sectional view that Fig. 2 makes up for illustrate first substrate and the second substrate with crystal grain opening according to the present invention.
Fig. 3 is for illustrating the sectional view that first substrate is accepted crystal grain according to the present invention.
Fig. 4 forms solder ball in the sectional view that penetrates hole for illustrating according to the present invention.
Fig. 5 is the sectional view that illustrates the attached glass substrate of second substrate according to the present invention.
Fig. 6 is formed at sectional view on this second substrate for illustrate the lens fixed mount according to the present invention.
Fig. 7 is for illustrating the sectional view of another embodiment according to the present invention.
[primary clustering symbol description]
100 first substrates
101 first wiring diagrams
102 second wiring diagrams
103 conduction through holes
104 second substrates
105 crystal grain are accepted opening
106 the 3rd wiring diagrams
106a the 4th wiring diagram
107 crystal grain opennings
120 crystal grain (wafer)
121 conductive pads
122 sensing arrays
159 conduction through holes
159a conducts through hole
160 optical glass devices
162 electric conducting materials
164 pasting materials
180 active (passive) elements
182 lens fixed mounts
184 optical lenses
186 bendable printed circuit board (PCB)s
188 infrared filters.
Embodiment
Below in conjunction with accompanying drawing and embodiments of the invention, encapsulation structure for image sensor and the method with double layer substrate of the present invention is described in further detail.
as Figure 6 and Figure 7, the present invention discloses the embedded board structure of a kind of crystal grain (or multi-wafer) and reaches at both side surface construction double-decker, and the profile of explanation one system packaging structure, it comprises one and has double layer substrate and the passive device that crystal grain embeds, and according to the present invention at top construction layer and at the pin of opposite side, with ball grid array (BGA, ball grid array), cover crystalline substance (FC-BGA, flip-chip), chip-size package (CSP, chip scale package) and wafer-level packaging (WL-CSP, wafer level chip scale package) etc. do surface mount.
One encapsulation structure for image sensor, it comprises a first substrate 100, wherein this first substrate 100 more comprise one first the wiring Figure 101 be positioned at this first substrate upper surface, and one second the wiring Figure 102 be positioned at this second substrate lower surface.One penetrable this first substrate 100 of conduction through hole 103 is in order to link with this first wiring Figure 101 and this second wiring Figure 102.This first substrate 100 has a crystal grain and accepts opening 105 in order to accept one crystal grain/wafer 120, and this one crystal grain/wafer 120 has a sensing array 122 and is formed at wherein.This crystal grain (image sensor) 120 comprises conduction (as an aluminium or gold) pad 121(input and output pad) be formed at wherein.The crystal grain that this crystal grain 120 is exposed to this first substrate 100 is accepted in opening 105.It is formed at one second substrate 104 on this first substrate 100, and this second substrate 104 comprises a crystal grain openning 107, one the 3rd wiring Figure 106 is positioned at these second substrate 104 upper surfaces and one the 4th wiring diagram 106a is positioned at this second substrate 104 lower surfaces.The 3rd wiring Figure 106 is linked to this first wiring Figure 101.One conducts penetrable this second substrate 104 of through hole 159 and links this first wiring Figure 101.Another conduction penetrates penetrable this second substrate 104 of hole 159a and links conduction (as aluminium or the gold) pad 121 of this image sensor 120.
This conduction through hole 159,159a can fill by conductive material, as metal or alloy.Can scolding tin or anisotropic conducting membrance formation in an example.At an embodiment, this conduction penetrates hole 159a and is linked to this crystal grain conductive pad 121.One optical glass substrate 160 adheres on this second substrate 104 by a pasting material 164.At least one active or passive device 180 are welded in the 4th wiring diagram 106a of these second substrate 104 upper surfaces.Aforesaid system packaging construct construction the encapsulating structure of a grid array (land grid array package-LGA) form, it omits the thickness that solder ball is reduced encapsulating structure.
The material of this first substrate 101 and this second substrate 104 take organic substrate for example epoxy resin (refractory glass fibre plate (FR5), bismaleimides triazine resin (BT)) and printed circuit board (PCB) as good.The thermal coefficient of expansion of this first substrate 100 and this second substrate 104 is the same with motherboard (printed circuit board (PCB)) is good.Above-mentioned organic substrate is take epoxy resin (fire resistant epoxy glass mat, bismaleimides triazine resin) with high glass transition temperature (Tg) as good, and above-mentioned material can form in circuit pattern and interconnector perforation easily.The thermal coefficient of expansion of metallic copper is approximately 16, also can be applicable among first and second baseplate material.And glass, pottery and silicon also can be used to be used as substrate.Above-mentioned sticky material 122 is take silicone rubber based elastomeric material as good.
The thermal coefficient of expansion of the organic substrate of above-mentioned epoxy resin (refractory glass fibre plate, bismaleimides triazine resin) is about 14 ~ 17 in X, Y-direction, is about 30 ~ 60 in the Z direction and so can reduces sticky material crystal grain displacement problem in the temperature-curable process.
In one of the present invention embodiment, the material of wiring layer 102,101,106,106a comprises: the alloy of copper nickel gold reaches, or, the alloy of copper nickel; This wiring layer thickness is 5 um to 25 um (if necessary time, its thickness can surpass 25um).
Copper clad laminate (copper clad laminated) also as metal seed layer with stacked formation, and this copper/nickel alloy and copper/nickel/billon is electroplate to form; Utilize the wiring layer of electroplating process formed thereby that enough thickness and better mechanical property are arranged, can bear the unmatched problem of thermal coefficient of expansion in temperature cycles and mechanical bend.This conductive pad can be gold or copper/gold or aluminium or and combination.
In one of the present invention embodiment, as shown in Figure 1, a first substrate 100 comprises the upper surface that a conduction wiring Figure 101 is formed at this first substrate, and a conduction wiring Figure 102 is formed at the lower surface of this first substrate 100.This wiring Figure 101 and this wiring Figure 102 comprise with copper clad laminate and electroplate the electro-coppering of formation or the alloying metal of copper nickel gold.This crystal grain 120 has conduction (aluminium or gold) pad 121(input and output pad) be formed at wherein.The crystal grain that this crystal grain 120 is exposed to this first substrate 100 is accepted in opening 105.It is formed at one second substrate 104 on this first substrate 100, and this second substrate 104 comprises a crystal grain openning 107, one the 3rd wiring Figure 106 is positioned at these second substrate 104 upper surfaces and one the 4th wiring diagram 106a is positioned at this second substrate 104 lower surfaces.
The present invention forms the method for packing of image sensor encapsulation, as shown in Figure 1, comprise and prepare the organic substrate that a first substrate 100 and a second substrate 104(are preferably the FR4/FR5/BT series material) and this first substrate have wired circuit 102 and 101, be formed at respectively upper surface and the lower surface of this first substrate 100.This wiring diagram 106a and 106 upper surface and lower surfaces that are formed at respectively this second substrate 104.In this substrate 101,102,106a and 106 layers of electro-coppering or the copper/nickel/billon metal that can electroplate formation form.This link conduction through hole 103 can penetrate this first substrate 100 and form.As shown in Figures 1 and 2, this first substrate 100 has a preformed crystal grain and accepts opening 105 and this crystal grain openning 107 also for being pre-formed, this crystal grain is accepted opening 105 by laser cutting or mechanical stamping (many dices punch press), its opening size is greater than this crystal grain, and its opening every limit increases approximately 100um ~ 200um than the size of crystal grain.As shown in Figure 2, this second substrate 104 sticks (tack glued membrane) at this first substrate 100.
Next step as shown in Figure 3, is this image sensor 120 to be arranged at this crystal grain accept opening 105 and this and by crystal grain/substrate truing tool, sensing region 122 is exposed to crystal grain openning 107 on this second substrate 104.And next step is to form this electric conducting material 162(such as welding compound) in this conduction through hole 159, the 159a of this second substrate 104.This filling step can be formed at before this second substrate 104 adheres to this first substrate 100.The IR back welding process is to flow in this welding compound to carry out after the through hole bed is newly filled welding compound, and is connected to this conductive pad 121 in through hole 159a.
When welding compound 162 is backfilled to this this through hole 159,159a again, this glass substrate 160 is formed on this second substrate 104 as other one selectable method for packing by this adhesion material 164 subsequently.
This initiatively or passive device 180 also adheres to that (surface mount SMT) on layer as shown in Figure 5, is followed as shown in Figure 6, has the lens fixed mount 182 of lens 184, and it adheres on this second substrate 104 and with this image sensing crystal grain 120 and aligns.This first substrate 100 can stick on flexible circuit board 186 by welding compound or anisotropic conducting membrance (ACF).This optical lens height depending on its optical appearance and physical parameter.As shown in Figure 7, within an infrared filter 188 can be formed at this lens fixed mount 182 (this infrared filter 188 can 160 displacements of this glass substrate).
This passive device 180 can be electric capacity or resistance, and separately with wafer-level packaging (WL-CSP, wafer level chip scale package), chip-size package (CSP, chip scale package), cover crystalline substance (FC-BGA, flip-chip) and the crystal grain of ball grid array (BGA, ball grid array) also can be arranged on the top circuit of this second substrate 104.Therefore construction at least two plates can embed together the inside, and have the conduction through hole in order to as the electric signal interior bonds.All conduction through holes 159,159a and 103 can CNC or Laser drill form.
Native system encapsulation structure of image sensing chip and processing procedure are all than being short of simple that exposure multi-wafer and double-deck traditional image sensing chip package come.And native system encapsulation structure of image sensing chip thickness can easily be controlled, and can eliminate the problem that can cause wafer shift in processing procedure.And can omit the ejection formation instrument; Must not import cmp processing procedure and this processing procedure yet and can not produce warpage yet.This substrate is one to have the substrate of preparing in advance that is pre-formed crystal grain openning, interior bonds through hole; This crystal grain openning size equals the about 100um to 200um of the every limit increase of this crystallite dimension; By filling the elastic core colloid, above-mentioned opening can be used as the stress buffer release areas, absorbs and is not mated by thermal coefficient of expansion between silicon crystal grain and substrate (refractory glass fibre plate/bismaleimides triazine resin), the thermal stress that causes.In addition, also can fill the elastomeric dielectric material between crystal grain and substrate sidewall spacers, not mate by thermal coefficient of expansion mechanical bend and/or the thermal stress that is caused to absorb.Owing to applying the above-mentioned layer that simply increases at upper surface and basal surface simultaneously, therefore can increase encapsulation productivity ratio (reducing the manufacturing cycle).This crystal grain and substrate (i.e. this first substrate and this second substrate) are bonded together.The reliability of above-mentioned encapsulation and motherboard (motherboard) level encapsulation is also better than in the past.Especially for motherboard level package temperature loop test, because substrate is consistent with the thermal coefficient of expansion of printed circuit board (PCB) (motherboard), therefore do not have any thermal and mechanical stress that puts on solder bump/ball; For motherboard level packaging machinery crooked test, the grained region that the substrate bottom side of supported mechanical intensity can the absorptive substrate upside and the stress of borderline region.
The above is only preferred embodiment of the present invention, is not for limiting protection scope of the present invention.
Claims (15)
1. the encapsulation structure for image sensor with double layer substrate, is characterized in that, it comprises:
One first substrate, it comprises: a crystal grain is accepted opening, reaches a plurality of first and penetrates hole, and it penetrates this first substrate;
One second substrate is formed on this first substrate, and it comprises: a crystal grain openning, and reach a plurality of second and penetrate hole, it penetrates this second substrate;
This first substrate comprises: one first wiring diagram, and it is formed at the lower surface of this first substrate, and
One second wiring diagram, it is formed at the upper surface of this first substrate;
This second substrate comprises: one the 3rd wiring diagram, and it is positioned at the lower surface of this second substrate, and one the 4th wiring diagram, and it is positioned at the upper surface of this second substrate;
This second wiring diagram part and the 3rd wiring diagram partial coupling; One image sensing crystal grain, it comprises: a conductive pad, and a reception sensing array; Opening accepted by this crystal grain and this reception sensing array is exposed to this crystal grain openning; One penetrates the hole electric conducting material, a plurality of second penetrates hole in order to be filled in this, wherein this a plurality of second part hole and coupling of this conductive pad that penetrates in hole.
2. the encapsulation structure for image sensor with double layer substrate as claimed in claim 1, is characterized in that, more comprises:
One optical glass substrate, it is formed on this second substrate and this crystal grain openning.
3. the encapsulation structure for image sensor with double layer substrate as claimed in claim 2, is characterized in that, more comprises:
One lens fixed mount, it comprises:
One lens, it is formed on this optical glass substrate, and
Wherein these lens and this image sensing grain alignment.
4. the encapsulation structure for image sensor with double layer substrate as claimed in claim 3, is characterized in that, more comprises:
One infrared filter is within it is formed at this lens fixed mount.
5. the encapsulation structure for image sensor with double layer substrate as claimed in claim 1, is characterized in that, more comprises:
One contains the lens fixed mount of lens, and it is formed on this second substrate, wherein these lens and this image sensing grain alignment.
6. the encapsulation structure for image sensor with double layer substrate as claimed in claim 5, is characterized in that, more comprises:
One infrared filter is within it is formed at this lens fixed mount.
7. the encapsulation structure for image sensor with double layer substrate as claimed in claim 1, is characterized in that, more comprises: a passive type crystal grain, it is formed on this second substrate.
8. the encapsulation structure for image sensor with double layer substrate as claimed in claim 7, is characterized in that, more comprises: an active crystal grain, it is formed on this second substrate.
9. the encapsulation structure for image sensor with double layer substrate as claimed in claim 8, is characterized in that, wherein:
This active crystal grain comprises: chip-size package, circle level chip-size package, ball grid array and cover the Jingjing grain.
10. the encapsulation structure for image sensor with double layer substrate as claimed in claim 1, is characterized in that, wherein:
This a plurality of first at least one sidewall that penetrates hole comprises a conductive metal.
11. the encapsulation structure for image sensor with double layer substrate as claimed in claim 1 is characterized in that, wherein:
This penetrates the hole electric conducting material, comprises metal or alloy or anisotropic conductive film.
12. the encapsulation structure for image sensor with double layer substrate as claimed in claim 11 is characterized in that, wherein:
This penetrates the hole electric conducting material, comprises scolding tin.
13. the encapsulation structure for image sensor with double layer substrate as claimed in claim 1 is characterized in that, wherein:
This first substrate and this second substrate material comprise FR4 or fire resistant epoxy glass mat FR5.
14. the encapsulation structure for image sensor with double layer substrate as claimed in claim 1 is characterized in that, wherein:
This first substrate and this second substrate material comprise bismaleimides triazine resin, silicon system, printed circuit board material, glass, pottery, metal or alloy.
15. the encapsulation structure for image sensor with double layer substrate as claimed in claim 1 is characterized in that, wherein:
This first wiring diagram, this second wiring diagram, the 3rd wiring diagram and the 4th wiring diagram comprise with copper clad laminate and electroplate the electro-coppering of formation or the alloying metal of copper nickel gold.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/289,864 US8232633B2 (en) | 2008-09-25 | 2011-11-04 | Image sensor package with dual substrates and the method of the same |
| US13/289,864 | 2011-11-04 |
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| Publication Number | Publication Date |
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| CN103094291A true CN103094291A (en) | 2013-05-08 |
| CN103094291B CN103094291B (en) | 2015-08-26 |
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| TW (1) | TWI482271B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105742253A (en) * | 2014-12-10 | 2016-07-06 | 旭景科技股份有限公司 | Printed circuit board assembly with image sensor |
| CN106033753A (en) * | 2015-03-12 | 2016-10-19 | 恒劲科技股份有限公司 | Packaging module and substrata structure |
| TWI639880B (en) * | 2017-11-10 | 2018-11-01 | 群光電子股份有限公司 | Lens structure and method for correcting thermal drift |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI559464B (en) * | 2015-03-12 | 2016-11-21 | 恆勁科技股份有限公司 | Package module and its substrate structure |
| TWI619389B (en) * | 2016-07-13 | 2018-03-21 | 許志行 | Portable electronic device and image capturing module thereof |
| US9860431B1 (en) | 2016-10-11 | 2018-01-02 | Chi-Hsing Hsu | Portable electronic device and image capturing module thereof |
| KR101942740B1 (en) * | 2017-10-19 | 2019-01-28 | 삼성전기 주식회사 | Fan-out sensor package and optical-type fingerprint sensor module |
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| CN101859752A (en) * | 2009-04-06 | 2010-10-13 | 杨文焜 | Stack package structure and manufacture method thereof with chip embedded and silicon through hole crystal grain |
| US20110096223A1 (en) * | 2009-10-22 | 2011-04-28 | Hon Hai Precision Industry Co., Ltd. | Camera module and manufacturing method thereof |
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| US20080191335A1 (en) * | 2007-02-08 | 2008-08-14 | Advanced Chip Engineering Technology Inc. | Cmos image sensor chip scale package with die receiving opening and method of the same |
| TWI484237B (en) * | 2007-12-19 | 2015-05-11 | Heptagon Micro Optics Pte Ltd | Optical module for a camera device, baffle substrate, wafer scale package, and manufacturing methods therefor |
| TWI409923B (en) * | 2009-12-02 | 2013-09-21 | King Dragon Internat Inc | Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same |
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- 2012-06-26 TW TW101122738A patent/TWI482271B/en not_active IP Right Cessation
- 2012-06-29 CN CN201210220408.0A patent/CN103094291B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101859752A (en) * | 2009-04-06 | 2010-10-13 | 杨文焜 | Stack package structure and manufacture method thereof with chip embedded and silicon through hole crystal grain |
| US20110096223A1 (en) * | 2009-10-22 | 2011-04-28 | Hon Hai Precision Industry Co., Ltd. | Camera module and manufacturing method thereof |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105742253A (en) * | 2014-12-10 | 2016-07-06 | 旭景科技股份有限公司 | Printed circuit board assembly with image sensor |
| CN106033753A (en) * | 2015-03-12 | 2016-10-19 | 恒劲科技股份有限公司 | Packaging module and substrata structure |
| CN106033753B (en) * | 2015-03-12 | 2019-07-12 | 恒劲科技股份有限公司 | Package module and its board structure |
| TWI639880B (en) * | 2017-11-10 | 2018-11-01 | 群光電子股份有限公司 | Lens structure and method for correcting thermal drift |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI482271B (en) | 2015-04-21 |
| CN103094291B (en) | 2015-08-26 |
| TW201320314A (en) | 2013-05-16 |
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