CN103094097A - Manufacturing method for semiconductor device - Google Patents
Manufacturing method for semiconductor device Download PDFInfo
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- CN103094097A CN103094097A CN2011103328175A CN201110332817A CN103094097A CN 103094097 A CN103094097 A CN 103094097A CN 2011103328175 A CN2011103328175 A CN 2011103328175A CN 201110332817 A CN201110332817 A CN 201110332817A CN 103094097 A CN103094097 A CN 103094097A
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- aluminium lamination
- metal aluminium
- etching
- insulating barrier
- plasma
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Abstract
The invention provides a manufacturing method for a semiconductor device. The manufacturing method comprises that a semiconductor substrate is provided with an insulating layer is formed on the semiconductor substrate and a metal aluminum layer is formed in the insulating layer. A bottom anti-reflective coating and optical resist are formed on the metal aluminum layer successively. The metal aluminum layer is dealt with a graphical processing. Plasmas with continuous waves are adopted to conduct the main etching on the metal aluminum layer which is dealt with the graphical processing. Pulsed plasmas are adopted to etch the metal aluminum layer, and the bottom anti-reflective coating and the optical resist are wiped out. According to the manufacturing method for semiconductor device, the plasma induced damage can be avoided caused by the plasma etching during the forming process of the aluminum substrate.
Description
Technical field
The present invention relates to semiconductor fabrication process, in particular to the engraving method of a kind of aluminium liner (Al-pad).
Background technology
In semiconductor fabrication process, the etch process that adopts when forming the aluminium liner is considered to one of source that causes plasma-induced damage (plasma induced damage).In described etching process, when near etching end point, it is very thin that etched aluminium becomes, and it has accumulated the positive charge of a large amount of generations that described etching plasma is induced.Under the effect of the electric field that etching process produces, the electronics in Semiconductor substrate moves to described very thin aluminum metal layer, thereby causes puncturing of gate oxide, i.e. described plasma-induced damage.
Therefore, need to propose a kind of method, to address the above problem.
Summary of the invention
For the deficiencies in the prior art, the invention provides a kind of manufacture method of semiconductor device, comprising: Semiconductor substrate is provided, forms insulating barrier on described Semiconductor substrate, and form a metal aluminium lamination in described insulating barrier; Form successively bottom antireflective coating and photoresist on described metal aluminium lamination, described metal aluminium lamination is carried out graphical treatment; Adopt the persistent wave plasma to carry out main etching to described through patterned metal aluminium lamination; Adopt pulsed plasma to carry out etching to described through patterned metal aluminium lamination; Remove described bottom antireflective coating and photoresist.
Further, described insulating barrier is the material layer with low-k.
Further, when the thickness of described etched metal aluminium lamination reaches the control point of described persistent wave plasma etching terminal point, described main etch-stop.
Further, the pulse frequency of described pulsed plasma and pulse duty factor all can be adjusted according to the actual conditions of manufacturing process.
Further, described etching excessively is until expose described insulating barrier.
According to the present invention, the plasma-induced damage that the etching plasma that can avoid adopting in the process that forms the aluminium liner causes.
Description of drawings
Following accompanying drawing of the present invention is used for understanding the present invention at this as a part of the present invention.Shown in the drawings of embodiments of the invention and description thereof, be used for explaining principle of the present invention.
In accompanying drawing:
Figure 1A-Fig. 1 E is the schematic cross sectional view of each step of the engraving method of the aluminium liner that proposes of the present invention;
Fig. 2 is the flow chart of the engraving method of the aluminium liner that proposes of the present invention.
Embodiment
In the following description, a large amount of concrete details have been provided in order to more thorough understanding of the invention is provided.Yet, it is obvious to the skilled person that the present invention can need not one or more these details and be implemented.In other example, for fear of obscuring with the present invention, be not described for technical characterictics more well known in the art.
In order thoroughly to understand the present invention, detailed step will be proposed, so that the engraving method of the aluminium liner that explaination the present invention proposes in following description.Obviously, execution of the present invention is not limited to the specific details that the technical staff of semiconductor applications has the knack of.Preferred embodiment of the present invention is described in detail as follows, yet except these were described in detail, the present invention can also have other execution modes.
Should be understood that, when using in this manual term " to comprise " and/or when " comprising ", it indicates and has described feature, integral body, step, operation, element and/or assembly, does not exist or additional one or more other features, integral body, step, operation, element, assembly and/or their combination but do not get rid of.
Below, the detailed step of the engraving method of the aluminium liner that the present invention proposes is described with reference to Figure 1A-Fig. 1 E and Fig. 2.
With reference to Figure 1A-Fig. 1 E, wherein show the schematic cross sectional view of each step of the engraving method of the aluminium liner that the present invention proposes.
At first, as shown in Figure 1A, provide Semiconductor substrate 100, the constituent material of described Semiconductor substrate 100 can adopt unadulterated monocrystalline silicon, the monocrystalline silicon doped with impurity, silicon-on-insulator (SOI) etc.As example, in the present embodiment, Semiconductor substrate 100 selects single crystal silicon material to consist of.Be formed with isolation channel in Semiconductor substrate 100, buried regions, and various trap (well) structure in order to simplify, are omitted in diagram.
On described Semiconductor substrate 100, be formed with various elements, in order to simplify, omitted in diagram, an insulating barrier 101 only is shown here, it typically is the material layer with low-k, adopt silicon oxide layer in the present embodiment.
Next, form a groove in described insulating barrier 101, and deposit a metal aluminium lamination 102 on described insulating barrier 101, to fill described groove.
Then, as shown in Figure 1B, form successively bottom antireflective coating (BARC) and photoresist 103 on described metal aluminium lamination 102, described metal aluminium lamination 102 is carried out graphical treatment.
Then, as shown in Fig. 1 C, adopt persistent wave plasma (continuous wave plasma) 104 etchings described through patterned metal aluminium lamination 102.When the thickness of described etched metal aluminium lamination reached the control point 105 of described persistent wave plasma etching terminal point, described persistent wave plasma etching stopped.For distinguishing mutually with following etching process, above-mentioned etching process is referred to as main etching.
Then, as shown in Fig. 1 D, adopt pulsed plasma (pulsed plasma) 106 to continue etching described through patterned metal aluminium lamination 102, until expose described insulating barrier 101, this etching process was referred to as etching.The pulse frequency of described pulsed plasma (pulse frequency) and pulse duty factor (pulse duty cycle) all can be adjusted according to the actual conditions of manufacturing process.
Then, as shown in Fig. 1 E, remove described bottom antireflective coating (BARC) and photoresist 103 on etched metal aluminium lamination 102, complete the making of aluminium liner.
So far, whole processing steps of method enforcement have according to an exemplary embodiment of the present invention been completed.Next, can complete by subsequent technique the making of whole semiconductor device, described subsequent technique and traditional process for fabricating semiconductor device are identical.According to the present invention, the plasma-induced damage that the etching plasma that can avoid adopting in the process that forms the aluminium liner causes.
With reference to Fig. 2, wherein show the flow chart of the engraving method of the aluminium liner that the present invention proposes, be used for schematically illustrating the flow process of whole manufacturing process.
In step 201, Semiconductor substrate is provided, form insulating barrier on described Semiconductor substrate, and form a metal aluminium lamination in described insulating barrier;
In step 202, form successively bottom antireflective coating and photoresist on described metal aluminium lamination, described metal aluminium lamination is carried out graphical treatment;
In step 203, adopt the persistent wave plasma to carry out main etching to described through patterned metal aluminium lamination;
In step 204, adopt pulsed plasma to carry out etching to described through patterned metal aluminium lamination;
In step 205, remove described bottom antireflective coating and photoresist.
The present invention is illustrated by above-described embodiment, but should be understood that, above-described embodiment just is used for for example and the purpose of explanation, but not is intended to the present invention is limited in described scope of embodiments.It will be appreciated by persons skilled in the art that in addition the present invention is not limited to above-described embodiment, can also make more kinds of variants and modifications according to instruction of the present invention, these variants and modifications all drop in the present invention's scope required for protection.Protection scope of the present invention is defined by the appended claims and equivalent scope thereof.
Claims (5)
1. the manufacture method of a semiconductor device comprises:
Semiconductor substrate is provided, forms insulating barrier on described Semiconductor substrate, and form a metal aluminium lamination in described insulating barrier;
Form successively bottom antireflective coating and photoresist on described metal aluminium lamination, described metal aluminium lamination is carried out graphical treatment;
Adopt the persistent wave plasma to carry out main etching to described through patterned metal aluminium lamination;
Adopt pulsed plasma to carry out etching to described through patterned metal aluminium lamination;
Remove described bottom antireflective coating and photoresist.
2. method according to claim 1, is characterized in that, described insulating barrier is the material layer with low-k.
3. method according to claim 1, is characterized in that, when the thickness of described etched metal aluminium lamination reaches the control point of described persistent wave plasma etching terminal point, and described main etch-stop.
4. method according to claim 1, is characterized in that, the pulse frequency of described pulsed plasma and pulse duty factor all can be adjusted according to the actual conditions of manufacturing process.
5. method according to claim 1, is characterized in that, described etching excessively is until expose described insulating barrier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103328175A CN103094097A (en) | 2011-10-28 | 2011-10-28 | Manufacturing method for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103328175A CN103094097A (en) | 2011-10-28 | 2011-10-28 | Manufacturing method for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103094097A true CN103094097A (en) | 2013-05-08 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011103328175A Pending CN103094097A (en) | 2011-10-28 | 2011-10-28 | Manufacturing method for semiconductor device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104465322A (en) * | 2014-11-26 | 2015-03-25 | 上海华力微电子有限公司 | Method for reducing damage to grain boundary of aluminum liner |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5877407A (en) * | 1997-07-22 | 1999-03-02 | Lucent Technologies Inc. | Plasma etch end point detection process |
| CN1467821A (en) * | 2002-06-10 | 2004-01-14 | ��ʽ���綫֥ | Manufacturing method of semiconductor device and semiconductor device |
| CN1672240A (en) * | 2002-07-24 | 2005-09-21 | 优利讯美国有限公司 | Notch-free etching of high aspect SOI structures using alternating deposition and etching and pulsed plasma |
| CN101631897A (en) * | 2007-02-21 | 2010-01-20 | 应用材料股份有限公司 | The pulsed plasma system that is used for etching semiconductor structures with pulsed sample bias |
-
2011
- 2011-10-28 CN CN2011103328175A patent/CN103094097A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5877407A (en) * | 1997-07-22 | 1999-03-02 | Lucent Technologies Inc. | Plasma etch end point detection process |
| CN1467821A (en) * | 2002-06-10 | 2004-01-14 | ��ʽ���綫֥ | Manufacturing method of semiconductor device and semiconductor device |
| CN1672240A (en) * | 2002-07-24 | 2005-09-21 | 优利讯美国有限公司 | Notch-free etching of high aspect SOI structures using alternating deposition and etching and pulsed plasma |
| CN101631897A (en) * | 2007-02-21 | 2010-01-20 | 应用材料股份有限公司 | The pulsed plasma system that is used for etching semiconductor structures with pulsed sample bias |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104465322A (en) * | 2014-11-26 | 2015-03-25 | 上海华力微电子有限公司 | Method for reducing damage to grain boundary of aluminum liner |
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Application publication date: 20130508 |