CN103066900A - Pipeline compressor synchronous motor digital control system based on integrated Gate Commutated Thyristor (IGCT) five-level technology - Google Patents
Pipeline compressor synchronous motor digital control system based on integrated Gate Commutated Thyristor (IGCT) five-level technology Download PDFInfo
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- CN103066900A CN103066900A CN2013100022928A CN201310002292A CN103066900A CN 103066900 A CN103066900 A CN 103066900A CN 2013100022928 A CN2013100022928 A CN 2013100022928A CN 201310002292 A CN201310002292 A CN 201310002292A CN 103066900 A CN103066900 A CN 103066900A
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Abstract
The invention discloses a pipeline compressor synchronous motor digital control system based on integrated gate commutated thyristor (IGCT) five-level technology. The pipeline compressor synchronous motor digital control system comprises a main control board, an optical fiber board, a virtual machine environment (VME) bus case and a plurality of bottom layer units. The main control board and the optical fiber board are inserted on a back board of the VME bus case, communication between the main control board and the optical fiber board is achieved through a VME bus, the optical fiber board and the main control board exchange data, and the data are converted into data needed by each bottom layer unit. The optical fiber board is connected with the bottom layer units through optical fibers, the optical fiber board is provided with an optical fiber receiver to receive data sent from the bottom layer units, and the optical fiber board analyzes the data sent by the main control board and the data sent by the bottom layer units to ensure that corresponding data are distributed for each bottom layer unit. The pipeline compressor synchronous motor digital control system overcomes the defects that existing technology is poor in expandability and can not meet demands of high speed and high precision of complicated operation.
Description
Technical field
The present invention relates to a kind of driven by power numerical control system, especially, relate to a kind of pipeline compressor synchronous machine numerical control system based on integrated gate commutated thyristor (Intergrated Gate Commutated Thyristors, IGCT) five Level Technology.
Background technology
The basic thought of many level is to synthesize staircase waveform by a plurality of level steps, to approach sine output voltage.Level number is more, and resulting ladder level step is more, thereby more approaches sine wave, and harmonic components is fewer.Theoretically, multi-level converter can be by synthetic infinite a plurality of level steps, the final output that realizes zero harmonic wave.But in actual applications, owing to be subject to the restriction of hardware condition and control complexity, usually satisfying under the prerequisite of performance index, do not pursue too high level number.
From present development trend, in oil and gas industry, the full driven by power of pipeline compressor will substitute combustion gas turbine and drive.The high-power compressor of tens of MW needs large capacity, the transmission of high speed alternating current machine.Based on the five-electrical level inverter (frequency converter) of IGCT in pipeline compressor electric motor transmission application, can realize at a high speed, the target of large capacity, efficient, high reliability, smooth output voltage waveform.The control signal of traditional inverter control system and feedback signal adopt analog signal transmission usually, and there are the shortcomings such as hardware circuit complexity, debug difficulties, programming complexity and anti-interference be poor in it.For the five-electrical level inverter control system based on the IGCT technology, traditional control system all can't meet the demands on control precision or response speed.
Summary of the invention
Because the defects of prior art, technical problem to be solved by this invention provides a kind of pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology, it overcomes the deficiency of existing control system, be difficult to reach at a high speed and the defective of high-precision requirement for complex calculation, provide a kind of and programmed conveniently, respond the numerical control system fast, that antijamming capability is strong and precision is high.
For achieving the above object, the invention provides a kind of pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology, it comprises master control borad, fibre optic plate, VME bus cabinet and several bottom floor units, wherein said master control borad and described fibre optic plate are inserted on the backboard of described VME bus cabinet, realize communication by the VME bus between the two, described fibre optic plate and master control borad carry out exchanges data, and data transaction are become the data of described each bottom floor units needs; Described fibre optic plate is connected by optical fiber with described bottom floor units, described fibre optic plate has fiber optic receiver, the data that send to receive described bottom floor units, the data that described fibre optic plate sends by the data analyzing described master control borad and send and described bottom floor units are defined as described each bottom floor units and distribute corresponding data.
According to the above-mentioned pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology, wherein, described fibre optic plate sends to described bottom floor units by optical fiber head with data.
According to the above-mentioned pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology, wherein, described master control borad comprises DSP and FPGA, carries out communication by VME bus and other integrated circuit board.
According to the above-mentioned pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology, wherein, described fibre optic plate and described bottom floor units swap data adopt two Optical Fiber Transmission, wherein, the transmission of optical fiber control data, the reception of another root optical fiber control data.
According to the above-mentioned pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology, wherein, described bottom floor units is by forming from controller, IGCT and dc bus capacitor.
Further, according to the above-mentioned pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology, wherein, described from controller by FPGA, optical fiber transmits and receives circuit, the voltage and current testing circuit, A/D convertor circuit, temperature sensing circuit, IGCT drives and fault return circuit and IO drive circuit composition, wherein, described voltage and current testing circuit, described A/D convertor circuit, described FPGA be connected IGCT and drive to be connected with the fault return circuit and connect, described optical fiber transmits and receives circuit, described temperature sensing circuit and described IO drive circuit all are connected on the described FPGA.
Therefore, pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology of the present invention provides a kind of novel modularized reactive compensation control system based on FPGA, master control borad adopts the framework of DSP+FPGA, carries out communication by VME bus and fibre optic plate.Fibre optic plate is connected by optical fiber with bottom floor units, by optical fiber head data are sent to bottom floor units, this control system adopts modularization idea, can expand according to actual needs, overcome existing technical deficiency, be difficult to reach at a high speed and the defective of high-precision requirement for complex calculation, control performance meets the requirement of five-electrical level inverter equipment.
Description of drawings
Fig. 1 is the structural representation of the pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology of the present invention;
Fig. 2 is the structural representation from controller of bottom floor units among the present invention.
Embodiment
Be described further below with reference to the technique effect of accompanying drawing to design of the present invention, concrete structure and generation, to understand fully purpose of the present invention, feature and effect.
As shown in Figure 1, according to the pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology of the present invention, it comprises master control borad 1, fibre optic plate 2, VME bus cabinet 3 and several bottom floor units 4.Wherein master control borad 1 and fibre optic plate 2 are inserted on VME bus cabinet 3 backboards, and the two realizes communication by the VME bus.Fibre optic plate 2 carries out exchanges data with master control borad 1, and data transaction is become the data of each bottom floor units 4 needs; Fibre optic plate 2 and bottom floor units 4 are connected by optical fiber, and by optical fiber head data are sent to bottom floor units, and fibre optic plate 2 adopts the fiber optic receiver with optical fiber receiving function simultaneously, the data that send to receive bottom floor units 4.The data that fibre optic plate 2 sends by the data analyzing master control borad 1 and send and bottom floor units 4 are defined as each bottom floor units and distribute corresponding data.
Master control borad 1 adopts the framework of DSP+FPGA, carries out communication by VME bus and other integrated circuit board.The algorithm of the DSP completion system in the master control borad 1, with the FPGA exchanges data, with the function such as upper machine communication; FPGA mainly finish pulse distribution, with the functions such as protection of DSP exchanges data and system.Place memory in master control borad 1, it can be used as the buffer of exchanges data, can also deposit significant data when data volume is larger.DSP and FPGA work in coordination, and master control borad 1 is finished the functions such as the control of protection, submodule of top layer algorithm, system and protection.Master control borad 1 is behind the voltage that receives line voltage, electric current and each bottom floor units, current signal, the set-point of computing system, by the fibre optic plate 2 in the control system signal is sent in the bottom floor units 4, after bottom floor units 4 receives signal, at the balanced voltage from controller of bottom floor units 4 and export corresponding response current.Master control borad 1 adopts the stronger fpga chip of calculation function, embeds several soft nuclears in fpga chip, can the computing complicated algorithm and with the bottom floor units swap data.Master control borad 1 after finishing algorithm, with the data communication device that calculates cross fibre optic plate pass in the bottom floor units 4 from controller.Fibre optic plate 2 adopts two Optical Fiber Transmission with bottom floor units 4 swap datas, the transmission of optical fiber control data, the reception of optical fiber control data.
Fibre optic plate 2 adopts the mode of FPGA control, by VME bus and other integrated circuit board communication.FPGA in the fibre optic plate 2 mainly finish and master control borad 1 between exchanges data, and the data that become each bottom floor units to need data transaction, by optical fiber head data are sent to bottom floor units 4, fibre optic plate 2 has the optical fiber reception facilities simultaneously, can receive the data that bottom floor units 4 sends, be defined as each bottom floor units and distribute corresponding data by analyzing data that data that master control borad 1 sends and bottom floor units 4 send.
VME bus cabinet 3 adopts VME bus communication agreement, and the data transfer mode adopts parallel transmission in the VME communications protocol, has effectively guaranteed the speed of transmission, adopts a plurality of control lines to guarantee real-time and the accuracy of the transmission of data in the VME communications protocol.The connected mode of backboard is adopted in the realization of VME bus protocol.
Bottom floor units 4 is by forming from controller, IGCT and dc bus capacitor.Bottom floor units 4 is mainly finished the control command that master control borad 1 sends.Wherein adopt FPGA and master control borad 1 swap data from controller 5, thereby reach the purpose of accurate control reactive power compensator.Bottom floor units 4 is minimum step of output sinusoidal voltage waveform, must contain protective circuit in the bottom floor units 4 simultaneously, can automatically excise bottom floor units, the normal operation of protection whole system at the capacitance short-circuit of bottom floor units 4 or when opening circuit.
As shown in Figure 2, transmit and receive by FPGA6, optical fiber that circuit 7, voltage and current testing circuit 8, A/D convertor circuit 9, temperature sensing circuit 10, IGCT drive and fault return circuit 11 and IO drive circuit 12 form from controller 5 in the bottom floor units 4.Wherein, voltage and current testing circuit 8, A/D convertor circuit 9, FPGA6 are connected with IGCT to be connected with the fault return circuit and connect successively, and optical fiber transmits and receives circuit 7, temperature sensing circuit 10 and IO drive circuit and all is connected on the FPGA6.Optical fiber transmit and receive circuit 7 be used for receiving the data that master control borad 1 sends and send from controller 5 gather and computing after data.A/D convertor circuit 9 gathers the direct voltage of dc bus capacitor in each bottom floor units 4.Temperature sensing circuit 10 gathers the temperature of IGCT, is used for excision driving signal when the IGCT excess temperature.The fault-signal that IGCT drives and fault return circuit 11 is used for driving the turn-on and turn-off of IGCT and receives IGCT.The thyristor of IO drive circuit 12 control bottom modules.Bottom floor units 4 from controller 5 mainly finish control, the submodule of bottom IGCT module switch protection, detect and control capacitance on magnitude of voltage, finish simultaneously the interface with fibre optic plate 2.Need control IGCT conducting, the adhesive of control by-pass switch, control thyristor, Detection capacitance voltage, detect IGCT temperature, IGCT overcurrent, overvoltage protection from controller 5, finish simultaneously and master control borad 1 communication.
Novel modularized reactive compensation control system based on FPGA of the present invention, master control borad 1 adopts the framework of DSP+FPGA, carries out communication by VME bus and fibre optic plate 2.Fibre optic plate 2 and bottom floor units 4 are connected by optical fiber, by optical fiber head data are sent to bottom floor units 4, this control system adopts modularization idea, can expand according to actual needs, it is relatively poor to have overcome existing technology extensibility, be difficult to reach at a high speed and the defective of high-precision requirement for complex calculation, control performance meets the requirement of five-electrical level inverter equipment.
More than describe preferred embodiment of the present invention in detail.The ordinary skill that should be appreciated that this area need not creative work and just can design according to the present invention make many modifications and variations.Therefore, all in the art technical staff all should be in the determined protection range by claims under this invention's idea on the basis of existing technology by the available technical scheme of logical analysis, reasoning, or a limited experiment.
Claims (6)
1. pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology, it is characterized in that, comprise master control borad, fibre optic plate, VME bus cabinet and several bottom floor units, wherein said master control borad and described fibre optic plate are inserted on the backboard of described VME bus cabinet, realize communication by the VME bus between the two, described fibre optic plate and master control borad carry out exchanges data, and data transaction are become the data of described each bottom floor units needs; Described fibre optic plate is connected by optical fiber with described bottom floor units, described fibre optic plate has fiber optic receiver, the data that send to receive described bottom floor units, the data that described fibre optic plate sends by the data analyzing described master control borad and send and described bottom floor units are defined as described each bottom floor units and distribute corresponding data.
2. the pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology according to claim 1 is characterized in that described fibre optic plate sends to described bottom floor units by optical fiber head with data.
3. the pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology according to claim 1 is characterized in that described master control borad comprises DSP and FPGA, carries out communication by VME bus and other integrated circuit board.
4. the pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology according to claim 1, it is characterized in that, described fibre optic plate and described bottom floor units swap data adopt two Optical Fiber Transmission, wherein, the transmission of optical fiber control data, the reception of another root optical fiber control data.
5. the pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology according to claim 1 is characterized in that described bottom floor units is by forming from controller, IGCT and dc bus capacitor.
6. the pipeline compressor synchronous machine numerical control system based on IGCT five Level Technology according to claim 5, it is characterized in that, described from controller by FPGA, optical fiber transmits and receives circuit, the voltage and current testing circuit, A/D convertor circuit, temperature sensing circuit, IGCT drives and fault return circuit and IO drive circuit composition, wherein, described voltage and current testing circuit, described A/D convertor circuit, described FPGA be connected IGCT and drive to be connected with the fault return circuit and connect, described optical fiber transmits and receives circuit, described temperature sensing circuit and described IO drive circuit all are connected on the described FPGA.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0566297A1 (en) * | 1992-04-13 | 1993-10-20 | SMITH & NEPHEW DYONICS INC | Brushless motor control system |
| CN101620428A (en) * | 2009-07-28 | 2010-01-06 | 中国科学院电工研究所 | VME bus motor controller based on FPGA chip |
| CN102270842A (en) * | 2010-06-01 | 2011-12-07 | 上海电气集团股份有限公司 | Active power filter control system based on digital signal processing (DSP) chip and field programmable gate array (FPGA) chip |
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- 2013-01-05 CN CN201310002292.8A patent/CN103066900B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0566297A1 (en) * | 1992-04-13 | 1993-10-20 | SMITH & NEPHEW DYONICS INC | Brushless motor control system |
| CN101620428A (en) * | 2009-07-28 | 2010-01-06 | 中国科学院电工研究所 | VME bus motor controller based on FPGA chip |
| CN102270842A (en) * | 2010-06-01 | 2011-12-07 | 上海电气集团股份有限公司 | Active power filter control system based on digital signal processing (DSP) chip and field programmable gate array (FPGA) chip |
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