CN103066094B - Image sensor manufacturing method through adoption of metal hard mask - Google Patents
Image sensor manufacturing method through adoption of metal hard mask Download PDFInfo
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- CN103066094B CN103066094B CN201310012319.1A CN201310012319A CN103066094B CN 103066094 B CN103066094 B CN 103066094B CN 201310012319 A CN201310012319 A CN 201310012319A CN 103066094 B CN103066094 B CN 103066094B
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Abstract
The invention relates to the manufacturing field of image sensors, in particular to an image sensor manufacturing method through adoption of a metal hard mask. The image sensor manufacturing method includes a first step of carrying out etching to oxide on the surface of a wafer until a tetraethoxy-silicane layer is exposed, a second step of depositing a layer of isolation oxide layer on the surface, a third step of depositing a layer of metal hard mask, a fourth step of forming an opening through etching to the metal hard mask, a fifth step of coating photoresist on the metal hard mask and removing the photoresist on the upper portion of the opening of the metal hard mask through etching, a sixth step of carrying out etching from a deep through hole to a silicon nitride layer covered on top layer metal of the logic wafer, a seventh step of removing the remaining metal hard mask after etching of the deep through hole, an eighth step of carrying out bottom anti-reflection medium filling to the through hole and carrying out etching to the bottom anti-reflection medium, a ninth step of confirming the etching size of a groove through photoetching, and a tenth step of carrying out groove etching until the top layer metal of a device wafer and the top layer metal of the logic wafer are exposed. Through utilization of the metal hard mask method, the image sensor manufacturing method effectively solves the problem in the prior art that a back-lighting type image sensor is difficult to manufacture due to the fact that the back-lighting type image sensor is small in size.
Description
Technical field
The present invention relates to image sensor and manufacture field, be specifically related to a kind of method that metal hard mask manufactures image sensor.
Background technology
Backside illuminated image transducer because of its outstanding imaging effect development in recent years swift and violent, based on the market demand, the present invention changes circuit design, be intended to manufacture chip less, the transducer that image quality is higher, new structure does not have new process to support temporarily, because chip is less, there is less critical size, need to control manufacture process more accurately.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of metal hard mask and manufactures the problem that the method for image sensor solves backside illuminated image sensor production difficulty in prior art.
The technical scheme that the present invention solves the problems of the technologies described above is as follows: a kind of metal hard mask manufactures the method for image sensor, comprises step one, after device wafers and logic wafer bonding, etches, to exposing tetraethoxy silicon layer to wafer surface oxidation thing;
Step 2, deposit one deck isolating oxide layer on surface after etching;
Step 3, the hard mask of deposit layer of metal on isolating oxide layer;
Step 4, etches opening by metal hard mask;
Step 5, metal hard mask smears photoresist, and etches away the photoresist of metal hard mask overthe openings;
Step 6, carries out deep via by the opening etched and is etched to the silicon nitride layer that logic wafer top-level metallic covers;
Step 7, removes the rear hard mask of residual metallic of deep via etching;
Step 8, carries out bottom anti-reflective Filled Dielectrics to through hole, and etches described bottom anti-reflective medium;
Step 9, uses the groove dimensions of photoetching determination etching groove;
Step 10, carries out etching groove, to exposing device wafers top-level metallic and logic wafer top-level metallic.
The invention has the beneficial effects as follows: effectively solve backside illuminated image transducer in prior art using the inventive method by metal hard mask method and cause the problem making difficulty because its size is little.
On the basis of technique scheme, the present invention can also do following improvement.
Further, described metal hard mask is titanium nitride film;
Further, the barrier layer etching tetraethoxy silicon layer, interlevel oxidation nitride layer and be made up of carbon containing silicon nitride layer and black diamond layer is needed in described deep via etching process
Further, be plasma etching to the etching mode of crystal column surface in described step one;
The beneficial effect of above-mentioned further scheme is adopted to be: plasma etching is easy to control, and can improve etching precision further.
Further, the metal hard mask thickness of described deposit is more than 1000 dusts;
Further, the photoresist thickness smeared before described deep via is more than 6000 dusts.
The beneficial effect of above-mentioned further scheme is adopted to be: can when deep via etches as barrier layer protected device below it.
Further, described metal hard mask is titanium nitride film, and in described barrier layer, black diamond is 20 to one with the etching selection ratio of titanium nitride;
Further, described interlevel oxidation nitride layer is six to one with the etching selection ratio of photoresist, and described silicon nitride is six to one with the etching selection ratio of photoresist;
Further, described etching selection ratio is under equal conditions, etches bi-material, etches away the ratio of the degree of depth of bi-material after etching same time.
Adopt the beneficial effect of above-mentioned further scheme to be: accurately can be determined the degree of depth needing etching by etching selection ratio, improve the quality of backside illuminated image transducer further.
Accompanying drawing explanation
Fig. 1 is the inventive method flow chart;
Fig. 2 is crystal circle structure figure after bonding of the present invention;
Fig. 3 is crystal circle structure figure after deposit isolating oxide layer of the present invention;
Fig. 4 is crystal circle structure figure after the hard mask of depositing metal of the present invention;
Fig. 5 is that the present invention is by crystal circle structure figure after metal hard mask opening;
Fig. 6 is that the present invention carries out the rear crystal circle structure figure of deep via etching;
Fig. 7 is crystal circle structure figure after deep via of the present invention filling bottom anti-reflective medium;
Fig. 8 is crystal circle structure figure before etching groove of the present invention;
Fig. 9 is crystal circle structure figure after etching groove of the present invention.
In accompanying drawing, the list of parts representated by each label is as follows:
1, substrate silicon layer, 2, interlevel oxidation nitride layer, 3, logic wafer top-level metallic, 4, silicon nitride layer, 5, device wafers top-level metallic, 6, barrier layer, 7, tetraethoxy silicon layer, 8, oxide layer, 9, isolating oxide layer, 10, metal hard mask, 11, deep via, 12, bottom anti-reflective medium, 13, photoresist, 14, groove.
Embodiment
Be described principle of the present invention and feature below in conjunction with accompanying drawing, example, only for explaining the present invention, is not intended to limit scope of the present invention.
As shown in Figure 1, be the inventive method flow chart, comprise the following steps:
Step 101, device wafers and logic wafer key and after, wafer surface oxidation thing is etched, to exposing tetraethoxy silicon layer 7;
Step 102, deposit one deck isolating oxide layer 9 on surface after etching;
Step 103, the hard mask 10 of deposit layer of metal on isolating oxide layer;
Step 104, etches opening by metal hard mask 10;
Step 105, metal hard mask 10 smears photoresist, and etches away the photoresist of metal hard mask overthe openings;
Step 106, carries out deep via by the opening etched and is etched to the silicon nitride layer 4 that logic wafer top-level metallic 3 covers;
Step 107, removes the rear hard mask 10 of residual metallic of deep via etching;
Step 108, carries out bottom anti-reflective medium 12 to through hole and fills, and etches described bottom anti-reflective medium 12;
Step 109, uses the groove dimensions that photoetching determination groove 14 etches;
Step 110, carries out groove 14 and etches, to exposing device wafers top-level metallic 5 and logic wafer top-level metallic 3.
Fig. 2 is crystal circle structure figure after bonding of the present invention, comprise substrate silicon layer 1, described substrate silicon layer 1 is coated with interlevel oxidation nitride layer 2, described interlevel oxidation nitride layer 2 is provided with silicon nitride layer 4, interlevel oxidation nitride layer 2 is provided with on silicon nitride layer 4, described logic wafer top-level metallic 3 is established and to be embedded among interlevel oxidation nitride layer 2 and to contact with silicon nitride layer 4, described device wafers top-level metallic 5 to be embedded among interlevel oxidation nitride layer 2 and to contact with silicon nitride layer 4, barrier layer 6 is provided with on described device wafers top-level metallic 5 place interlevel oxidation nitride layer 2, tetraethoxy silicon layer 7 is provided with on described barrier layer 6, described tetraethoxy silicon layer 7 is provided with oxide layer 8.
Fig. 3 is crystal circle structure figure after deposit isolating oxide layer of the present invention, and on the basis of Fig. 2 structure, effects on surface oxide layer 8 is carried out being etched to and exposed tetraethoxy silicon layer 7, deposit one deck isolating oxide layer 9 on crystal column surface after etching.
Fig. 4 is crystal circle structure figure after the hard mask of depositing metal of the present invention, on the basis of Fig. 3 structure, and the hard mask 10 of deposit layer of metal on isolating oxide layer 9.
Fig. 5 be the present invention by crystal circle structure figure after metal hard mask opening, on the basis of Fig. 4 structure, use photolithographicallpatterned on metal hard mask 10, open an opening.
Fig. 6 is that the present invention carries out the rear crystal circle structure figure of deep via etching, on the basis of Fig. 5 structure, carries out deep via etching until expose the silicon nitride layer 4 on logic wafer top-level metallic 3, has etched rear formation deep via 11.
Fig. 7 is crystal circle structure figure after deep via of the present invention filling bottom anti-reflective medium, on the basis of Fig. 6 structure, is removed by remaining metal hard mask 10 after deep via etching, and fill bottom anti-reflective medium 12 in deep via 11.
Fig. 8 is crystal circle structure figure before etching groove of the present invention, on the basis of Fig. 7 structure, bottom anti-reflective medium is determined by photoresist 13 size of the groove 14 of etching groove.
Fig. 9 is crystal circle structure figure after etching groove of the present invention, on the basis of Fig. 8 structure, carries out etching groove to exposing logic wafer top-level metallic 3 and device wafers top-level metallic 5, forms groove 14 after etching.
Described metal hard mask 10 is the hard mask of titanium nitride, needs to etch tetraethoxy-silicane in described deep via etching process, 7, interlevel oxidation nitride layer 2 and by the barrier layer 6 formed containing carbonitride of silicium and black diamond layer.Be plasma etching to the etching mode of crystal column surface in described step one, metal hard mask 10 thickness of described deposit is more than 1000 dusts, and the photoresist thickness smeared before described deep via 11 is more than 6000 dusts.Described black diamond is 20 to one with the etching selection ratio of titanium nitride, described oxide is six to one with the etching selection ratio of photoresist 13, described silicon nitride layer 4 is six to one with the etching selection ratio of photoresist 13, described etching selection ratio is under equal conditions, bi-material is etched, the ratio of the degree of depth of bi-material is etched away after etching same time, the etching depth of described deep via etching is 44000 dust to 47000 dusts, and the etching depth of described etching groove is 20000 dust to 22000 dusts.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. manufacture a method for image sensor with metal hard mask, it is characterized in that: comprise the following steps,
Step one, after device wafers and logic wafer bonding, etches wafer surface oxidation thing, to exposing tetraethoxy silicon layer;
Step 2, deposit one deck isolating oxide layer on surface after etching;
Step 3, the hard mask of deposit layer of metal on isolating oxide layer;
Step 4, etches opening by metal hard mask;
Step 5, metal hard mask smears photoresist, and etches away the photoresist of metal hard mask overthe openings;
Step 6, carries out deep via by the opening etched and is etched to the silicon nitride layer that logic wafer top-level metallic covers;
Step 7, removes the rear hard mask of residual metallic of deep via etching;
Step 8, carries out bottom anti-reflective Filled Dielectrics to through hole, and etches described bottom anti-reflective medium;
Step 9, uses the groove dimensions of photoetching determination etching groove;
Step 10, carries out etching groove, to exposing device wafers top-level metallic and logic wafer top-level metallic.
2. a kind of metal hard mask according to claim 1 manufactures the method for image sensor, it is characterized in that: described metal hard mask is titanium nitride film.
3. a kind of metal hard mask according to claim 1 manufactures the method for image sensor, it is characterized in that: need the barrier layer etching tetraethoxy silicon layer, interlevel oxidation nitride layer and be made up of carbon containing silicon nitride layer and black diamond layer in described deep via etching process.
4. a kind of metal hard mask according to claim 3 manufactures the method for image sensor, and it is characterized in that: described metal hard mask is titanium nitride film, in described barrier layer, black diamond is 20 to one with the etching selection ratio of titanium nitride.
5. a kind of metal hard mask according to claim 4 manufactures the method for image sensor, and it is characterized in that: described interlevel oxidation nitride layer is six to one with the etching selection ratio of photoresist, described silicon nitride is six to one with the etching selection ratio of photoresist.
6. a kind of metal hard mask according to claim 4 manufactures the method for image sensor, it is characterized in that: described etching selection ratio is under equal conditions, etches bi-material, etches away the ratio of the degree of depth of bi-material after etching same time.
7. a kind of metal hard mask according to claim 1 manufactures the method for image sensor, it is characterized in that: be plasma etching to the etching mode of crystal column surface in described step one.
8. a kind of metal hard mask according to claim 1 manufactures the method for image sensor, it is characterized in that: the metal hard mask thickness of described deposit is more than 1000 dusts.
9. a kind of metal hard mask according to claim 1 manufactures the method for image sensor, it is characterized in that: the photoresist thickness smeared before described deep via is more than 6000 dusts.
10. a kind of metal hard mask according to claim 1 manufactures the method for image sensor, it is characterized in that: the etching depth of described deep via etching is 44000 to 47000 dusts, and the etching depth of described etching groove is 20000 to 22000 dusts.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1779922A (en) * | 2004-11-26 | 2006-05-31 | 上海华虹Nec电子有限公司 | Etching method for contact hole for imaging sensor |
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| JP2003282851A (en) * | 2002-03-27 | 2003-10-03 | Sony Corp | Method for manufacturing charge-coupled device |
| KR20040093788A (en) * | 2003-04-30 | 2004-11-09 | 매그나칩 반도체 유한회사 | Method of manufacturing redundancy module for cmos image sensor |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1779922A (en) * | 2004-11-26 | 2006-05-31 | 上海华虹Nec电子有限公司 | Etching method for contact hole for imaging sensor |
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