CN103066030A - High reliability encapsulation - Google Patents

High reliability encapsulation Download PDF

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Publication number
CN103066030A
CN103066030A CN2011103252034A CN201110325203A CN103066030A CN 103066030 A CN103066030 A CN 103066030A CN 2011103252034 A CN2011103252034 A CN 2011103252034A CN 201110325203 A CN201110325203 A CN 201110325203A CN 103066030 A CN103066030 A CN 103066030A
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CN
China
Prior art keywords
chip
high reliability
pending material
wet film
plasma treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2011103252034A
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Chinese (zh)
Inventor
不公告发明人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
WUXI SHIYI ELECTRIC POWER MACHINERY EQUIPMENT CO Ltd
Original Assignee
WUXI SHIYI ELECTRIC POWER MACHINERY EQUIPMENT CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by WUXI SHIYI ELECTRIC POWER MACHINERY EQUIPMENT CO Ltd filed Critical WUXI SHIYI ELECTRIC POWER MACHINERY EQUIPMENT CO Ltd
Priority to CN2011103252034A priority Critical patent/CN103066030A/en
Publication of CN103066030A publication Critical patent/CN103066030A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

The invention discloses high reliability encapsulation. The high reliability encapsulation is characterized by comprising the following steps: cutting a chip and bonding the chip on a leading wire frame or a base plate; bonding a guide line and putting the leading wire frame into wet film solutions to carry out electrofacing, wherein the concentration of the wet film solutions is 60%-70%, electrofacing time is 5-10 seconds, and the temperature of electrofacing is 50-55 DEG C; washing by clear water and carrying out plasma cleaning process after the leading wire frame is dried off; applying adhesion promoter solutions to the surfaces of materials to be processed and then performing air drying or drying off to the adhesion promoter solutions at the normal temperature; implementing a later process which is wrapping the chip and a chip seat by epoxy resins. According to the high reliability encapsulation, the availability of products is improved, the service life of the products is prolonged, and the problem of retention time after the products are processed is resolved.

Description

A kind of high reliability packaging
Technical field
The present invention relates to the semiconductor die package technical field.
Background technology
Chip encapsulation technology wraps up memory chip exactly, contacts with extraneous to avoid chip, prevents a kind of technology of the infringement of outer bound pair chip.Airborne impurity and bad air, so steam all can corrode the precision circuit on the chip, and then cause electric property to descend.Different encapsulation technologies is widely different in manufacturing process and process aspect, after the encapsulation vital effect is also played in the performance of memory chip self performance.Along with the develop rapidly of photoelectricity, little electric manufacturing process technology, electronic product is all the time towards less, lighter, more cheap future development, so the packing forms of chip component also constantly is improved.The encapsulation technology of chip is varied, and DIP, POFP, TSOP, BGA, QFP, CSP etc. are arranged, and not lower 30 kinds of kinds have experienced the development course from DIP, TSOP to BGA.The encapsulation technology of chip has experienced the change of several generations, and performance is day by day advanced, and the ratio of chip area and package area is more and more near 1, and applicable frequency is more and more higher, heat resistance is become better and better, and number of pins increases, and pin-pitch reduces, weight reduces, and Reliability Enhancement uses convenient.
Extensive use along with surface mounting technology, a kind of more serious failure mode is exactly that packaging body is when client is carried out surface mount SMT, chip packing-body is from ftractureing at the interface, wire bonding at the interface is subject to the easy open circuit of separation stresses effect and causes product failure, chip has at the interface been set up the moisture path with the external world, its failure mechanism is exactly owing to temperature in some operation is higher, the moisture that the interface absorbs at high temperature volume expands rapidly, and the stress of generation is higher than the cracking that the adhesion at interface causes.JEDEC solid state technology association has announced the standard for the moisture susceptibility of SMT device for this reason, this has been given the clear and definite definition of moisture susceptibility, experimental technique, grade classification.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of high reliability packaging, and it can improve the bond strength of a plurality of key sequence boundaries in the chip package, reduces the moisture number of degrees; Prolong product useful life; Solve the holding time problem after processing.
For solving the problems of the technologies described above, the invention provides following technical scheme: a kind of high reliability packaging, wherein, may further comprise the steps, chip cutting, chip bonding are on lead frame or substrate; Wire bonding is put into wet film solution with lead frame and is electroplated, and described wet film solution concentration is 60%-70%, and electroplating time is 5-10 second, and temperature is 50-55 degree centigrade, then cleans with clear water, carries out plasma cleaning after the oven dry and processes; Then pending material surface is used adhesion promoter solution, normal temperature air-dry or the oven dry, then carry out later process, epoxy resin coating chip, chip carrier.
As one of preferred version of high reliability packaging of the present invention, wherein: described wet film solution concentration is 65%-68%, electroplating time is 5-8 second, temperature is 50-53 degree centigrade, then clean with clear water, after the oven dry, use first argon gas that pending material is carried out plasma treatment, re-use nitrogen and carry out the processing of plasma treatment plasma cleaning; Then pending material surface is used adhesion promoter solution, described active component is the mixture of 3-aminopropyl silanetriol and isopropyl tri titanate and vinyltrimethoxy silane, and three's ratio is: 1-2: 1-2: 6-8.
As one of preferred version of high reliability packaging of the present invention, wherein: described wet film solution concentration is 67%, electroplating time is 7 seconds, temperature is 50 degrees centigrade, then clean with clear water, after the oven dry, use first argon gas that pending material is carried out plasma treatment, re-use nitrogen and carry out the processing of plasma treatment plasma cleaning; Then pending material surface is used the adhesion promoter mixed solution of 3% concentration, described active component is 3-aminopropyl silanetriol and isopropyl tri titanate, and both ratios are 9: 1.
As one of preferred version of high reliability packaging of the present invention, wherein: described wet film solution concentration is 68%, electroplating time is 6 seconds, temperature is 55 degrees centigrade, then clean with clear water, after the oven dry, use first argon gas that pending material is carried out plasma treatment, re-use nitrogen and carry out the processing of plasma treatment plasma cleaning; Then pending material surface is used the adhesion promoter mixed solution of 5% concentration, described active component is 3-aminopropyl silanetriol and isopropyl tri titanate, and both ratios are 8: 2.
Adopt the useful technique effect of the present invention to comprise: can improve the bond strength of a plurality of key sequence boundaries, prevent the appearance of layering, cracking, avoid full inspection and substandard products unnecessary in the technical process; Can reduce the moisture number of degrees of product, eliminate product potential defective when client is used, cost own is very low, has reduced to encapsulate overall cost; Can prolong the useful life of product more than one times, improve the competitiveness of product in market.
Embodiment
A kind of embodiment, first to chip cutting, chip bonding on lead frame or substrate; Wire bonding is put into wet film solution with lead frame and is electroplated, and described wet film solution concentration is 60%-70%, and electroplating time is 5-10 second, and temperature is 50-55 degree centigrade, then cleans with clear water, after the oven dry.In its reaction chamber of packing into, can many tilings, automatic or manual all can.The surface of pending material is exposed in the plasma incident scope, connects vacuum pump and vacuumize, carry out plasma treatment; Then pending material surface is used adhesion promoter solution, normal temperature air-dry or the oven dry, then carry out later process, epoxy resin coating chip, chip carrier.
In the another kind of execution mode, wherein said wet film solution concentration is 65%-68%, and electroplating time is 5-8 second, and temperature is 50-53 degree centigrade, then clean with clear water, and after the oven dry, in its reaction chamber of packing into, can many tilings, automatic or manual all can.The surface of pending material is exposed in the plasma incident scope, connects vacuum pump and vacuumize, carry out plasma treatment.Use first argon gas that pending material is carried out plasma treatment, re-use nitrogen and carry out the processing of plasma treatment plasma cleaning; Then pending material surface is used adhesion promoter solution, described active component is the mixture of 3-aminopropyl silanetriol and isopropyl tri titanate and vinyltrimethoxy silane, and three's ratio is: 1-2: 1-2: 6-8.
In the another kind of execution mode, described wet film solution concentration is 67%, and electroplating time is 7 seconds, and temperature is 50 degrees centigrade, then clean with clear water, and after the oven dry, in its reaction chamber of packing into, can many tilings, automatic or manual all can.The surface of pending material is exposed in the plasma incident scope, connects vacuum pump and vacuumize, carry out plasma treatment.Use first argon gas that pending material is carried out plasma treatment, re-use nitrogen and carry out the processing of plasma treatment plasma cleaning; Then pending material surface is used the adhesion promoter mixed solution of 3% concentration, described active component is 3-aminopropyl silanetriol and isopropyl tri titanate, and both ratios are 9: 1.
It should be noted that, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although with reference to preferred embodiment the present invention is had been described in detail, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not breaking away from the spirit and scope of technical solution of the present invention, it all should be encompassed in the middle of the claim scope of the present invention.

Claims (4)

1. a high reliability packaging is characterized in that, may further comprise the steps, and chip cutting, chip bonding are on lead frame or substrate; Wire bonding is put into wet film solution with lead frame and is electroplated, and described wet film solution concentration is 60%-70%, and electroplating time is 5-10 second, and temperature is 50-55 degree centigrade, then cleans with clear water, carries out plasma cleaning after the oven dry and processes; Then pending material surface is used adhesion promoter solution, normal temperature air-dry or the oven dry, then carry out later process, epoxy resin coating chip, chip carrier.
2. high reliability packaging according to claim 1, it is characterized in that: described wet film solution concentration is 65%-68%, electroplating time is 5-8 second, temperature is 50-53 degree centigrade, then clean with clear water, after the oven dry, use first argon gas that pending material is carried out plasma treatment, re-use nitrogen and carry out the processing of plasma treatment plasma cleaning; Then pending material surface is used adhesion promoter solution, described active component is the mixture of 3-aminopropyl silanetriol and isopropyl tri titanate and vinyltrimethoxy silane, and three's ratio is: 1-2: 1-2: 6-8.
3. high reliability packaging according to claim 1, it is characterized in that: described wet film solution concentration is 67%, electroplating time is 7 seconds, temperature is 50 degrees centigrade, then clean with clear water, after the oven dry, use first argon gas that pending material is carried out plasma treatment, re-use nitrogen and carry out the processing of plasma treatment plasma cleaning; Then pending material surface is used the adhesion promoter mixed solution of 3% concentration, described active component is 3-aminopropyl silanetriol and isopropyl tri titanate, and both ratios are 9: 1.
4. high reliability packaging according to claim 1, it is characterized in that: described wet film solution concentration is 68%, electroplating time is 6 seconds, temperature is 55 degrees centigrade, then clean with clear water, after the oven dry, use first argon gas that pending material is carried out plasma treatment, re-use nitrogen and carry out the processing of plasma treatment plasma cleaning; Then pending material surface is used the adhesion promoter mixed solution of 5% concentration, described active component is 3-aminopropyl silanetriol and isopropyl tri titanate, and both ratios are 8: 2.
CN2011103252034A 2011-10-22 2011-10-22 High reliability encapsulation Pending CN103066030A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011103252034A CN103066030A (en) 2011-10-22 2011-10-22 High reliability encapsulation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011103252034A CN103066030A (en) 2011-10-22 2011-10-22 High reliability encapsulation

Publications (1)

Publication Number Publication Date
CN103066030A true CN103066030A (en) 2013-04-24

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011103252034A Pending CN103066030A (en) 2011-10-22 2011-10-22 High reliability encapsulation

Country Status (1)

Country Link
CN (1) CN103066030A (en)

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Application publication date: 20130424