CN102412166B - Surface nanofilm processing method prior to plastic packaging in semiconductor packaging - Google Patents
Surface nanofilm processing method prior to plastic packaging in semiconductor packaging Download PDFInfo
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- CN102412166B CN102412166B CN2011103096430A CN201110309643A CN102412166B CN 102412166 B CN102412166 B CN 102412166B CN 2011103096430 A CN2011103096430 A CN 2011103096430A CN 201110309643 A CN201110309643 A CN 201110309643A CN 102412166 B CN102412166 B CN 102412166B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
The invention discloses a surface nanofilm processing method prior to plastic packaging in semiconductor packaging. The surface nanofilm processing method is characterized in that the surface nanofilm processing method includes the following steps: step a: a small amount of adhesion promoter solution is uniformly applied on the surface of a material to be processed and attached on the surface to be reinforced; step b: the solvent in the adhesion promoter solution is volatilized and air-dried under the normal temperature or dried by way of baking, the thickness of an adhesion promoter active ingredient coating after volatilization is controlled at nanometer-grade thickness, and the adhesion promoter active ingredient coating and the surface to be reinforced on the material to be processed are chemically bonded; step c: the subsequent plastic packaging process is carried out, and the functional group of the other side of the nanometer-grade thickness adhesion promoter active ingredient coating already chemically bonded with the surface of the material to be processed is chemically bonded with epoxy resin used in the plastic packaging process. The surface nanofilm processing method can enhance the bonding strength of a plurality of key interfaces in chip packaging to a certain degree, prevent layering and cracking in the technological process and decrease the moisture level.
Description
Technical field
The present invention relates to the semiconductor chip field, relate in particular to the semiconductor die package technical field.
Background technology
Common semiconductor packages flow process is: the cutting of chip disk; Chip bonding is on lead frame or substrate; Wire bonding, make chip be connected conducting with external circuit; The epoxy resin coating chip, chip carrier, the inside pin of the lead frame that wire and wire connect or the weld pad on substrate; Be divided into single and external pin moulding.
Epoxy resin enclosed Main Function is the chip to its inside, and wire and wire connect provides mechanical support, heat radiation, electric insulation, the corrosion that opposing moisture or soda acid cause.The epoxy encapsulated member is the synthesis that multiple material intersects, and has the combination interface of epoxy and multiple material, if the bond strength at interface is inadequate, will layering in abominable situation, and the reliability decrease of product.
Particularly since the eighties in 20th century, extensive use along with surface mounting technology, a kind of more serious failure mode is exactly that packaging body is when client is carried out surface mount SMT, chip packing-body is from ftractureing at the interface, wire bonding at the interface is subject to the separation stresses effect and easily opens a way and cause product failure, chip has at the interface been set up the moisture path with the external world, its failure mechanism is exactly because temperature in some operation is higher, the moisture that interface absorbs at high temperature volume expands rapidly, the cracking that the stress of generation causes higher than the adhesion at interface.JEDEC solid state technology association has announced the moisture susceptibility standard for the SMD device for this reason, this has been given the clear and definite definition of moisture susceptibility, experimental technique, grade classification.
Since the eighties in 20th century, the work that how to improve the moisture susceptibility did not just stop.With Sumitomo Bakelite (Sumitomo Bakelite), eastern electrician of day (Nitto Denko) adjusts by formula for the epoxy resin supplier of representative, but the adjustment of formula will be with respect to moulding, breast the tape, release property, and release property and caking property contradict, thereby the effect that produces is limited, and they are usually take the standard of the MSL3 that meets JSTD020D as target.And moisture resistance gas grade as one of core competitiveness of product, for example the epoxy resin of nominal MSL2 is higher more than 50% than the price of MSL3, nominal MSL2 in actual use,, due to the difference of packaging body, has some can not reach MSL2 after actual measurement.
the research that the frame material surface coarsening that lead frame supplier take ASM as representative carries out is processed, because alligatoring acts on the framework surface, its main live part is the interface that acts on framework and epoxy resin, inoperative for chip and wire, usually framework is in order to adapt to the requirement of wire bonding, done silver-plated or Nickel Plating Treatment to the pin weld pad, the effect of alligatoring does not often reach the effect as base material on the surface of coating, and interface debonding herein plays to the life-span of product the important effect of closing of putting usually, be exactly that the more common framework of framework cost increase of processing increases very large on the impact of whole packaging cost in addition.
Plasma treatment is also a kind of comparatively common processing method, the product that impacts before plastic packaging by plasma gas obtains cleaning, the surface of activation, usually comparatively effective to shallow-layer pollutant or the oxidation of clean surface, but produce can increase bond effect the active group function ratio a little less than, and due to pollutants such as some oil gas of existence in air, its effect can decay with the time of placing after processing, usually can not be over 12 hours.
Summary of the invention
The technical problem to be solved in the present invention is to provide the nano surface membrane processing method before a kind of semiconductor package is contained in plastic packaging, and the bond strength that it can improve a plurality of key sequence boundaries in chip package to a certain extent, prevent layering in technical process, cracking; Reduce the moisture number of degrees; Extend product useful life; Solve the holding time problem after processing.
For solving the problems of the technologies described above, the invention provides following technical scheme: a kind of semiconductor package is contained in the nano surface membrane processing method before plastic packaging, comprising following steps, step a: pending material surface is evenly used a small amount of adhesion promoter solution, make it to be attached to the surface that needs reinforcement; Step b: the solvent normal temperature volatilization in adhesion promoter solution is air-dry, perhaps by the mode of baking, dry, adhesion promoter active component coating layer thickness after volatilization is controlled at nanometer grade thickness, and the surface that adhesion promoter active component coating and pending material need be strengthened forms chemical bonding; Step c: carry out rear road plastic packaging operation, with pending material surface, form the epoxy resin formation chemical bonding that uses in functional group and the plastic packaging process of adhesion promoter active component opposite side of nanometer grade thickness of chemical bonding.
Be contained in a kind of preferred version of the nano surface membrane processing method before plastic packaging as semiconductor package of the present invention, wherein: in described step a, pending material surface has been used adhesion promoter solution, solvent is organic solvent, and solute is for helping sticking active matter.
Be contained in a kind of preferred version of the nano surface membrane processing method before plastic packaging as semiconductor package of the present invention, wherein: in described step a, adhesion promoter solution is sprayed on the surface that pending material require strengthens with cordless by little spraying equipment.
Be contained in a kind of preferred version of the nano surface membrane processing method before plastic packaging as semiconductor package of the present invention, wherein: in described step a, the adhesion promoter active component that uses while helping sticking the processing is titanate coupling agent or silane coupler.
Be contained in a kind of preferred version of the nano surface membrane processing method before plastic packaging as semiconductor package of the present invention, wherein: in described step b, the liquid coating that little spraying forms can adopt the mode of normal temperature volatilization, the time of volatilization is 5 minutes to 72 hours, or the mode of employing heated baking is to accelerate the formation of nano-scale coating, the baking temperature be 60 the degree to 150 the degree, the time of baking is 5 to 60 minutes.
Be contained in a kind of preferred version of the nano surface membrane processing method before plastic packaging as semiconductor package of the present invention, wherein: adhesion promoter solution in described step a, solvent is 95%-99.9%, active coupling agent content is 0.1%-5%, then evenly be sprayed on pending material surface with little spraying equipment, the use amount of solution is 5ml/m
2-100ml/m
2, the thickness of the adhesion promoter active component of the active nano level thickness that retains after solvent evaporates is 5-100nm.
Be contained in a kind of preferred version of the nano surface membrane processing method before plastic packaging as semiconductor package of the present invention, wherein: in the adhesion promoter solution of described step a, organic solvent content is 97%-99.7%, and the adhesion promoter active component content is 0.3%-3%.
Be contained in a kind of preferred version of the nano surface membrane processing method before plastic packaging as semiconductor package of the present invention, wherein: in described step a, adhesion promoter solution evenly is sprayed on pending material surface, and the thickness of the adhesion promoter active component coating that retains after solvent evaporates is 20-60nm.
Be contained in a kind of preferred version of the nano surface membrane processing method before plastic packaging as semiconductor package of the present invention, wherein: help the inner pin of the sticking regional leaded framework of processing, lead frame chip pad in described step a, connect wire, chip, or wherein some parts are processed.
Be contained in a kind of preferred version of the nano surface membrane processing method before plastic packaging as semiconductor package of the present invention, wherein: help sticking zone of processing that PCB substrate package zone is arranged in described step a, connect wire, chip, or certain part is wherein processed.
Be contained in a kind of preferred version of the nano surface membrane processing method before plastic packaging as semiconductor package of the present invention, wherein: in described step a, the active component of adhesion promoter solution is three isostearic acid base isopropyl titanates or 3-aminopropyl silanetriol, or vinyltrimethoxy silane.
Present plasma treatment flow process before the plastic packaging that generally uses of institute, the effect that its cohesive force is strengthened only is embodied in the opposing subsequent technique, as, electroplate, Trim Molding, the stress in cutting, and can not reach the effect of reduction moisture grade; And the limited time of depositing, be generally in 12 hours.The surface coarsening of lead frame, it provides the interface of lead frame and epoxy resin to strengthen, and does not improve chip and wire and combination interface epoxy resin.And the expense of lead frame is to account for more than 50% of whole packaging body cost, and the increase of its price is large on the impact of product holistic cost.
The present invention, at first utilize little spraying equipment adhesion promoter to be sprayed on cordless on the interface of need strengthening, natural air drying or heating, drying, at the interface formation for the treatment of plastic packaging stable and firmly coupling agent in conjunction with coating; After plastic packaging, another group active group of coupling agent and epoxy resin form crosslinked, finally reach required high strength bond interface.
Adopt the useful technique effect of the present invention to comprise: lead frame, the PCB substrate, chip, all strengthened in the interface of wire and epoxy resin, and the effect of reinforcement both had been embodied in and has guaranteed in technique to be embodied in again and to improve on reliability step without layering.Because the material usage that uses in little spraying coating process is very low, cost own is very low, has reduced and has encapsulated overall quality cost.
One can improve the bond strength of the clad materials such as epoxy resin and lead frame, PCB substrate, chip, the formed a plurality of key sequence boundaries of wire, prevent the layering that machinery in technical process or thermal stress cause, the appearance of cracking, avoid full inspection and substandard products unnecessary in technical process; Its two moisture number of degrees that can reduce product, eliminate product potential defect when client is used, avoids the customer complaint of being correlated with, and product recall, compensate; Avoid due to high moisture number of degrees high required technology controlling and process cost and damp-prrof packing expense; Make packaging body reach industry, automobile etc. are to the product humidity, the customer requirement of high temperature resistant requirement harshness; More than one times, improve the competitiveness of product in market its three useful life that can extend product; It four can solve as the timeliness problem of depositing after plasma treatment, and the resting period up to one month makes it to have more practicality on technique, has reduced on the whole cost simultaneously.
Description of drawings
Fig. 1 is lead frame class chip package schematic top plan view.
Fig. 2 is lead frame class chip package side schematic view.
Fig. 3 is PCB substrate class chip package side schematic view.
Fig. 4 is the table of comparisons (0,5,20,60,100nm, 0 finger is without adhesion promoting coating) of adhesion promoter coating layer thickness and interface peel power (cohesive force).
Fig. 5 is consumption and the effect schematic diagram of adhesion promoter.
Embodiment
Below in conjunction with drawings and the specific embodiments, the present invention is described in further detail.
As figure, comprising: 1. lead frame external pin; 2. epoxy resin; 3. the inner pin of lead frame; 4. the chip pad of lead frame; 5. connection wire; 6. chip and framework adhesive; 7. chip; 8 fin.9. chip bonding glue; 10.PCB substrate.
Embodiment 1: the lead frame series products is implemented to process.
Product before implementing plastic packaging, is coated with and encloses adhesion promoter its position that need to strengthen, its main component titanate coupling agent, and three isostearic acid base isopropyl titanates, molecular formula is
Wherein alkoxyl and metal, the silicon surface forms chemical bond, and " O-" wherein and polymer generation are crosslinked, and the solvent of adhesion promoter is 95%-99.9%, and active coupling agent content is 0.1%-5%, the adhesion promoter use amount is 5ml/m
2-100ml/m
2, the thickness of the active nano layer that retains after solvent evaporates is between 5-100nm.The consumption of adhesion promoter and the signal of the relation of effect as figure, referring to Fig. 4 and Fig. 5.
Can adopt the mode of natural air drying, 5 minutes to 72 hours time, perhaps baking oven baking 60-150 is Celsius, 5 to 60 minutes time, makes the material surface at itself and coated position form chemical bond crosslinked.After oven dry, can deposit and reach 96 hours under atmospheric environment, the dustless nitrogen cabinet resting period can reach 1 month.
Adopt the product after embodiment 1 processes, the moisture grade is JEDEC MSL1, reaches the requirement of non-moisture sensitiveness, need not damp-prrof packing, and the term of validity that can deposit at ambient temperature is 1 year.The product of common flow process, moisture grade are JEDEC MSL3, need to use damp-prrof packing, need baking to remove moisture before packing, vacuum packaging, and vacuum bag need to be placed the moisture test card, must be finished in 168 hours behind Kaifeng.
Adopting the product after embodiment 1 processes,, without layering, lost efficacy without electrical property in MSL1 test rear interface place, and cold cycling, can tolerate 600 circulations at the interface without layering by-65 degrees centigrade to 150 degrees centigrade.The product of common flow process, cold cycling ,-65 degrees centigrade to 150 degrees centigrade, only to tolerate 300 circulations at the interface without layering.
Product after processing, cold cycling,, can tolerate 1500 circulations, without wire stripping or disconnection by-65 degrees centigrade to 150 degrees centigrade.The product of common flow process, cold cycling ,-65 degrees centigrade to 150 degrees centigrade, only to tolerate 600 circulations without wire stripping or disconnection.
Embodiment 2: the lead frame series products is implemented to process.
The solvent of adhesion promoter is 97%-99.7%, and active coupling agent content is 0.3%-3%, and the main component of adhesion promoter adhesion promoter is silane coupler, vinyltrimethoxy silane, and use amount is 5ml/m
2-100ml/m
2, the thickness of the active nano layer that retains after solvent evaporates is between 20-60nm.The consumption of adhesion promoter and the signal of the relation of effect as figure, referring to Fig. 4 and Fig. 5.
Can adopt the mode of natural air drying, 5 minutes to 72 hours time, perhaps baking oven baking 60-150 is Celsius, 5 to 60 minutes time, makes the material surface at itself and coated position form chemical bond crosslinked.After oven dry, can deposit and reach 96 hours under atmospheric environment, the dustless nitrogen cabinet resting period can reach 1 month.
Adopt the product after the present embodiment is processed, the moisture grade is JEDEC MSL1, reaches the requirement of non-moisture sensitiveness, need not damp-prrof packing, and the term of validity that can deposit at ambient temperature is 1 year.The product of common flow process, moisture grade are JEDEC MSL3, need to use damp-prrof packing, need baking to remove moisture before packing, vacuum packaging, and vacuum bag need to be placed the moisture test card, must be finished in 168 hours behind Kaifeng.
Adopting the product after the present embodiment is processed,, without layering, lost efficacy without electrical property in MSL1 test rear interface place, and cold cycling, can tolerate 500 circulations at the interface without layering by-65 degrees centigrade to 150 degrees centigrade.The product of common flow process, cold cycling ,-65 degrees centigrade to 150 degrees centigrade, only to tolerate 300 circulations at the interface without layering.
Product after processing, cold cycling,, can tolerate 1200 circulations, without wire stripping or disconnection by-65 degrees centigrade to 150 degrees centigrade.The product of common flow process, cold cycling ,-65 degrees centigrade to 150 degrees centigrade, only to tolerate 600 circulations without wire stripping or disconnection.
Embodiment 3: the PCB series products is implemented to process.
Product before implementing plastic packaging, is coated with and encloses adhesion promoter its position that need to strengthen, and its main component is silane coupler, 3-aminopropyl silanetriol, and molecular formula is
Wherein " OH " hydroxy functional group and inorganic material (metal, silicon) surface forms chemical bond, " NH2 " amidine functional group and the epoxy resin formation chemical bond that reacts, the solvent of adhesion promoter is 95%-99.9%, active coupling agent content is 0.1-5%, and the adhesion promoter use amount is 5ml/m
2-100ml/m
2, the thickness of the active nano layer that retains after solvent evaporates is between 5-100nm.The consumption of adhesion promoter and the signal of the relation of effect as figure, referring to Fig. 4 and Fig. 5.
Can adopt the mode of natural air drying, 5 minutes to 72 hours time, perhaps baking oven baking 60-150 is Celsius, 5 to 60 minutes time, makes the material surface at itself and coated position form chemical bond crosslinked.After oven dry, can deposit and reach 96 hours under atmospheric environment, the dustless nitrogen cabinet resting period can reach 1 month.
Adopt the product after the present embodiment is processed, the moisture grade reaches JEDEC MSL1, reaches the requirement of non-moisture sensitiveness, need not damp-prrof packing, and the term of validity that can deposit at ambient temperature is 1 year.The product of common flow process, moisture grade are JEDEC MSL3 or higher than MSL3, belong to climax air-sensitive perceptual device, need to use damp-prrof packing, need baking to remove moisture, vacuum packaging before packing, vacuum bag need to be placed the moisture test card, must be finished in 168 hours behind Kaifeng.
Adopt the product after the present embodiment is processed,, without layering, without electrical property, lost efficacy after the MSL1 test, cold cycling,, can tolerate 400 circulations without layering by-65 degrees centigrade to 150 degrees centigrade.The product of common flow process, cold cycling ,-65 degrees centigrade to 150 degrees centigrade, only to tolerate 200 circulations without layering.
Product after processing, cold cycling ,-65 degrees centigrade to 150 degrees centigrade, can tolerate 1200 circulations, break away from or disconnect without wire.The product of common flow process, cold cycling ,-65 degrees centigrade to 150 degrees centigrade, only to tolerate 600 circulations without wire stripping or disconnection.
Embodiment 4: the PCB series products is implemented to process.
Product before implementing plastic packaging, is coated with and encloses adhesion promoter its position that need to strengthen, and the main component of adhesion promoter is silane coupler, vinyltrimethoxy silane, solvent is 97%-99.7%, and active coupling agent content is 0.3-3%, and the adhesion promoter use amount is 5ml/m
2-100ml/m
2, the thickness of the active nano layer that retains after solvent evaporates is between 20-60nm.The consumption of adhesion promoter and the signal of the relation of effect as figure, referring to Fig. 4 and Fig. 5.
Can adopt the mode of natural air drying, 5 minutes to 72 hours time, perhaps baking oven baking 60-150 is Celsius, 5 to 60 minutes time, makes the material surface at itself and coated position form chemical bond crosslinked.After oven dry, can deposit and reach 96 hours under atmospheric environment, the dustless nitrogen cabinet resting period can reach 1 month.
Adopt the product after the present embodiment is processed, the moisture grade reaches JEDEC MSL1, reaches the requirement of non-moisture sensitiveness, need not damp-prrof packing, and the term of validity that can deposit at ambient temperature is 1 year.The product of common flow process, moisture grade are JEDEC MSL3 or higher than MSL3, belong to climax air-sensitive perceptual device, need to use damp-prrof packing, need baking to remove moisture, vacuum packaging before packing before packing, vacuum bag need to be placed the moisture test card, must be finished in 168 hours behind Kaifeng.
Adopt the product after the present embodiment is processed,, without layering, without electrical property, lost efficacy after the MSL1 test, cold cycling,, can tolerate 400 circulations without layering by-65 degrees centigrade to 150 degrees centigrade.The product of common flow process, cold cycling ,-65 degrees centigrade to 150 degrees centigrade, only to tolerate 200 circulations without layering.
Product after processing, cold cycling ,-65 degrees centigrade to 150 degrees centigrade, can tolerate 1000 circulations, break away from or disconnect without wire.The product of common flow process, cold cycling ,-65 degrees centigrade to 150 degrees centigrade, only to tolerate 600 circulations without wire stripping or disconnection.
It should be noted that, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although with reference to preferred embodiment, the present invention is had been described in detail, those of ordinary skill in the art is to be understood that, can modify or be equal to replacement technical scheme of the present invention, and not breaking away from the spirit and scope of technical solution of the present invention, it all should be encompassed in the middle of claim scope of the present invention.
Claims (10)
1. a semiconductor package is contained in the front nano surface membrane processing method of plastic packaging, it is characterized in that: comprise the following steps step a: pending material surface is evenly used a small amount of adhesion promoter solution, make it to be attached to the surface that needs reinforcement; Step b: the solvent normal temperature volatilization in adhesion promoter solution is air-dry, perhaps by the mode of baking, dry, adhesion promoter active component coating layer thickness after volatilization is controlled at nanometer grade thickness, and the surface that adhesion promoter active component coating and pending material need be strengthened forms chemical bonding; Step c: carry out rear road plastic packaging operation, with pending material surface, form the epoxy resin formation chemical bonding that uses in functional group and the plastic packaging process of adhesion promoter active component opposite side of nanometer grade thickness of chemical bonding; Adhesion promoter solution in described step a, solvent are 95%-99.9%, and active coupling agent content is 0.1%-5%, then with little spraying equipment, evenly is sprayed on pending material surface, and the use amount of solution is 5ml/m
2-100ml/m
2, the thickness of the adhesion promoter active component of the active nano level thickness that retains after solvent evaporates is 5-100nm.
2. semiconductor package according to claim 1 is contained in the nano surface membrane processing method before plastic packaging, it is characterized in that: in described step a, pending material surface has been used adhesion promoter solution, solvent is organic solvent, and solute is for helping sticking active matter.
3. semiconductor package according to claim 1 is contained in the front nano surface membrane processing method of plastic packaging, it is characterized in that: in described step a, adhesion promoter solution is sprayed on the surface of pending material require reinforcement with cordless by little spraying equipment.
4. semiconductor package according to claim 1 is contained in the front nano surface membrane processing method of plastic packaging, it is characterized in that: in described step a, the adhesion promoter active component that uses while helping sticking the processing is titanate coupling agent R1-O-Ti-(O-X1-R2-Y) n or silane coupler (R1-O) 2-Si-R2-Y.
5. semiconductor package according to claim 1 is contained in the front nano surface membrane processing method of plastic packaging, it is characterized in that: in described step b, the liquid coating that little spraying forms can adopt the mode of normal temperature volatilization, the time of volatilization is 5 minutes to 72 hours, or the mode of employing heated baking is to accelerate the formation of nano-scale coating, the baking temperature be 60 the degree to 150 the degree, the time of baking is 5 to 60 minutes.
6. semiconductor package according to claim 1 is contained in the front nano surface membrane processing method of plastic packaging, and it is characterized in that: in the adhesion promoter solution of described step a, organic solvent content is 97%-99.7%, and the adhesion promoter active component content is 0.3%-3%.
7. semiconductor package according to claim 1 is contained in the front nano surface membrane processing method of plastic packaging, it is characterized in that: in described step a, adhesion promoter solution evenly is sprayed on pending material surface, and the thickness of the adhesion promoter active component coating that retains after solvent evaporates is 20-60nm.
8. semiconductor package according to claim 1 is contained in the front nano surface membrane processing method of plastic packaging, it is characterized in that in described step a helping the inner pin of the sticking regional leaded framework of processing, lead frame chip pad, connect wire, chip, or wherein some parts are processed.
9. semiconductor package according to claim 1 is contained in the nano surface membrane processing method before plastic packaging, it is characterized in that: help sticking zone of processing that PCB substrate package zone is arranged in described step a, connect wire, and chip, or certain part is wherein processed.
10. semiconductor package according to claim 1 is contained in the front nano surface membrane processing method of plastic packaging, it is characterized in that: in described step a, the active component of adhesion promoter solution is three isostearic acid base isopropyl titanates or 3-aminopropyl silanetriol, or vinyltrimethoxy silane.
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| CN109616421A (en) * | 2018-11-21 | 2019-04-12 | 杰群电子科技（东莞）有限公司 | A kind of intelligent power module processing method and intelligent power module |
| CN112694060A (en) * | 2020-12-22 | 2021-04-23 | 青岛歌尔微电子研究院有限公司 | MEMS packaging structure and packaging method thereof |
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| JP2004339450A (en) * | 2003-05-19 | 2004-12-02 | Kanegafuchi Chem Ind Co Ltd | Primer composition and light emitting diode using the primer composition |
| CN1580095A (en) * | 2003-08-06 | 2005-02-16 | 中国科学院化学研究所 | Polyimide material, and its preparing method and use |
| KR20070097905A (en) * | 2006-03-30 | 2007-10-05 | 서울반도체 주식회사 | Method of fabricating light emitting diode package using silane coupling agent and the package fabricated by the method |
| CN101812278A (en) * | 2010-05-20 | 2010-08-25 | 上海西怡新材料科技有限公司 | Ultraviolet curable organic silicon-acrylic resin electronic adhesive and application thereof |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004339450A (en) * | 2003-05-19 | 2004-12-02 | Kanegafuchi Chem Ind Co Ltd | Primer composition and light emitting diode using the primer composition |
| CN1580095A (en) * | 2003-08-06 | 2005-02-16 | 中国科学院化学研究所 | Polyimide material, and its preparing method and use |
| KR20070097905A (en) * | 2006-03-30 | 2007-10-05 | 서울반도체 주식회사 | Method of fabricating light emitting diode package using silane coupling agent and the package fabricated by the method |
| CN101812278A (en) * | 2010-05-20 | 2010-08-25 | 上海西怡新材料科技有限公司 | Ultraviolet curable organic silicon-acrylic resin electronic adhesive and application thereof |
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