CN103050600A - Chip of light-emitting diode and preparation method thereof - Google Patents
Chip of light-emitting diode and preparation method thereof Download PDFInfo
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- CN103050600A CN103050600A CN2012105638946A CN201210563894A CN103050600A CN 103050600 A CN103050600 A CN 103050600A CN 2012105638946 A CN2012105638946 A CN 2012105638946A CN 201210563894 A CN201210563894 A CN 201210563894A CN 103050600 A CN103050600 A CN 103050600A
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Abstract
The invention discloses a chip of a light-emitting diode and a preparation method of the chip, and the chip and the preparation method belong to the field of semi-conductors. The chip comprises a substrate layer, an N-type layer, a light-emitting layer, a P-type layer, a transparent conductive layer, an N electrode and a P electrode which are respectively led out from the N-type layer and the P-type layer, and transparent medium layers covering the bottom surface of the substrate layer and/or the upper surface of the transparent conductive layer; the index of refraction of the transparent medium layer covering the bottom surface of the substrate layer is higher than that of the substrate layer; the index of refraction of the transparent medium layer covering the upper surface of the transparent conductive layer is higher than that of the transparent conductive layer; the transparent medium layer covering the bottom surface of the substrate layer comprises a plurality of bulges which extend out from the bottom surface of the substrate layer; and the transparent medium layer covering the upper surface of the transparent conductive layer comprises a plurality of bulges which extend out from the upper surface of the transparent conductive layer. According to the chip of the light-emitting diode and the preparation method thereof, the light extraction efficiency of a light-emitting diode (LED) is improved.
Description
Technical field
The present invention relates to semiconductor applications, particularly the preparation method of a kind of chip of light-emitting diode and this chip.
Background technology
LED(Lighting Emitting Diode, light-emitting diode) passes through chip light emitting.The chip of LED adopts semiconductive luminescent materials to make, and comprises epitaxial wafer, is etched in electrode and passivation layer on the epitaxial wafer.
Behind the chip package of LED, encapsulating material covers on the outer surface of chip.Because the refractive index of semiconductive luminescent materials and the refractive index of encapsulating material (such as epoxy resin) approach, and therefore, only have the utilizing emitted light of fraction to be refracted away, affect the illumination effect of the chip of LED.For this, prior art provides a kind of solution: the bottom surface at epitaxial wafer makes one deck reflector, and this reflector reflexes to other direction with the emergent light of the bottom surface of directive epitaxial wafer, for example the end face of epitaxial wafer.
In realizing process of the present invention, the inventor finds that there is following problem at least in prior art:
Because the refractive index of semiconductive luminescent materials is on the low side, critical total internal is smaller; So that reflective layer reflects to the wide part of the end face of epitaxial wafer is reflected back toward again chip internal, and is absorbed and is converted into heat energy, can not effectively promote the light extraction efficiency of chip.
Summary of the invention
In order to solve the problem of prior art, the embodiment of the invention provides the preparation method of chip and this chip of a kind of LED.Described technical scheme is as follows:
A kind of chip of light-emitting diode, described chip comprises substrate layer, the N electrode and the P electrode that cover N-type layer, luminescent layer, P type layer and the transparency conducting layer on the described substrate layer and draw at described N-type layer and described P type layer respectively successively, and described chip also comprises the transparent dielectric layer of the upper surface of the bottom surface that covers described substrate layer and/or described transparency conducting layer; The refractive index of described transparent dielectric layer that covers the bottom surface of described substrate layer is higher than the refractive index of described substrate layer, and the refractive index of described transparent dielectric layer that covers the upper surface of described transparency conducting layer is higher than the refractive index of described transparency conducting layer; The described described transparent dielectric layer that covers the bottom surface of described substrate layer comprises the extended projection in some bottom surfaces from described substrate layer, and the described transparent dielectric layer that covers the upper surface of described transparency conducting layer comprises the extended projection of some upper surfaces from described transparency conducting layer.
Wherein, the height of each described projection is 0.5 ~ 3 μ m; The external diameter of a circle of each described projection is 0.5 ~ 5 μ m; Spacing between the adjacent described projection is 0.5 ~ 10 μ m.
Wherein, the acute angle that forms between the upper surface of the bottom surface of the sidewall of each described projection and described substrate layer or described transparency conducting layer is 30 ~ 70 degree.
Wherein, described transparent dielectric layer is provided with the reflector.
A kind of preparation method of chip of light-emitting diode, described method comprises:
Wherein, described preparation wafer comprises:
At described N-type layer and described P type layer N electrode and P electrode are set respectively, and on described transparency conducting layer deposit passivation layer, form in the bottom surface of described substrate layer by refractive index and be higher than the transparent dielectric layer that the transparent medium of described substrate layer is made, obtain wafer; Or,
Form by refractive index at the upper surface of described transparency conducting layer and to be higher than the transparent dielectric layer that the transparent medium of described transparency conducting layer is made, at described N-type layer and described P type layer N electrode and P electrode are set respectively, and on described transparent dielectric layer deposit passivation layer, obtain wafer; Or,
Form by refractive index at the upper surface of described transparency conducting layer and to be higher than the transparent dielectric layer that the transparent medium of described transparency conducting layer is made, at described N-type layer and described P type layer N electrode and P electrode are set respectively, and on described transparent dielectric layer deposit passivation layer, form in the bottom surface of described substrate layer by refractive index and be higher than the transparent dielectric layer that the transparent medium of described substrate layer is made, obtain wafer;
Wherein, the described transparent dielectric layer that covers the bottom surface of described substrate layer comprises the extended projection in some bottom surfaces from described substrate layer, and the transparent dielectric layer that covers the upper surface of described transparency conducting layer comprises the extended projection of some upper surfaces from described transparency conducting layer.
Wherein, described bottom surface at described substrate layer forms by refractive index and is higher than the transparent dielectric layer that the transparent medium of described substrate layer is made, and comprising:
Form protective layer in described passivation layer surface;
The transparent dielectric layer that is higher than described substrate layer in the bottom surface of described substrate layer evaporation one deck refractive index;
Adopt photoresist that lithography operations is carried out in the bottom surface of described transparent dielectric layer, form some predetermined patterns with the bottom surface at described transparent dielectric layer;
Adopt the described predetermined pattern of the bottom surface of the described transparent dielectric layer of etching machine etching, make the described transparent dielectric layer after the etching comprise the extended separate projection in some bottom surfaces from described substrate layer;
Residual photoresist and the described protective layer after the etching removed in cleaning.
Wherein, described upper surface at described transparency conducting layer forms by refractive index and is higher than the transparent dielectric layer that the transparent medium of described transparency conducting layer is made, and comprising:
The transparent dielectric layer that is higher than described transparency conducting layer in upper surface evaporation one deck refractive index of described transparency conducting layer;
Adopt photoresist that the upper surface of described transparent dielectric layer is carried out lithography operations, form some predetermined patterns with the upper surface at described transparent dielectric layer;
Adopt the described predetermined pattern of the upper surface of the described transparent dielectric layer of etching machine etching, make the described transparent dielectric layer after the etching comprise the extended separate projection of some upper surfaces from described transparency conducting layer;
The residual photoresist after the etching is removed in cleaning, and carries out N district etching.
Wherein, described upper surface at described transparency conducting layer forms by refractive index and is higher than the transparent dielectric layer that the transparent medium of described transparency conducting layer is made, and comprising:
The transparent dielectric layer that is higher than described transparency conducting layer in upper surface evaporation one deck refractive index of described transparency conducting layer;
At the upper surface deposition SiO2 of described transparent dielectric layer layer;
Adopt photoresist that the upper surface of described SiO2 layer is carried out lithography operations, form some predetermined patterns with the upper surface at described SiO2 layer;
Adopt the described predetermined pattern of the upper surface of the described SiO2 layer of etching machine etching; Obtain the SiO2 layer after the etching;
The residual photoresist after the etching is removed in cleaning, SiO2 layer after the etching is as mask body, described transparent dielectric layer is carried out high temperature corrosion, make the described transparent dielectric layer after the corrosion comprise the extended separate projection of some upper surfaces from described transparency conducting layer;
SiO2 layer after the removal etching, and carry out N district etching.
Wherein, the thickness of described transparent dielectric layer is 0.5 ~ 3 μ m; The external diameter of a circle of each described predetermined pattern is 0.5 ~ 10 μ m; Spacing between the adjacent described predetermined pattern is 0.5 ~ 5 μ m; So that the height of described each described projection is 0.5 ~ 3 μ m; The external diameter of a circle of each described projection is 0.5 ~ 5 μ m; Spacing between the adjacent described projection is 0.5 ~ 10 μ m.
Wherein, the process sequence of described lithography operations comprises successively spin coating operation, soft baking operation, developing procedure and firmly dries by the fire operation; The temperature of described soft baking is 100 ~ 120 degree, stoving time 90 ~ 180s; The temperature of described hard baking is 120 ~ 160 degree, stoving time 60 ~ 180s; So that the acute angle that forms between the upper surface of the bottom surface of the sidewall of each described projection and described substrate layer or described transparency conducting layer is 30 ~ 70 degree.
Wherein, described employing photoresist carries out the bottom surface of described transparent dielectric layer also comprising before the lithography operations:
At the bottom surface of described transparent dielectric layer spin coating tackifier.
The beneficial effect that the technical scheme that the embodiment of the invention provides is brought is: by adhering to transparent dielectric layer in the bottom surface of the substrate layer of the chip of LED and/or the upper surface of transparency conducting layer; When the emergent light of led chip is derived from substrate layer and transparency conducting layer respectively, be higher than substrate layer owing to cover the refractive index of transparent dielectric layer of the bottom surface of substrate layer, the refractive index that covers the transparent dielectric layer of transparency conducting layer upper surface is higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and the transparency conducting layer, so that more emergent light imports to transparent dielectric layer, thereby has increased the transmitance of light from substrate layer and/or transparency conducting layer; Comprise the extended projection in some bottom surfaces from substrate layer owing to cover the transparent dielectric layer of the bottom surface of substrate layer again; The transparent dielectric layer that covers the upper surface of transparency conducting layer comprises the extended projection of some upper surfaces from transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, total reflection effect when having avoided outgoing, thus the transmitance of light from transparent dielectric layer increased; Effectively increase the recovery rate of light in the chip, and then improved the luminance of LED.
Description of drawings
In order to be illustrated more clearly in the technical scheme in the embodiment of the invention, the accompanying drawing of required use was done to introduce simply during the below will describe embodiment, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the schematic diagram of the chip of a kind of LED of providing of the embodiment of the invention one;
Fig. 2 is the schematic diagram of the chip of a kind of LED of providing of the embodiment of the invention one;
Fig. 3 is the schematic diagram of the chip of a kind of LED of providing of the embodiment of the invention one;
Fig. 4 is the schematic diagram of the protective layer that provides of the embodiment of the invention two.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, embodiment of the present invention is described further in detail below in conjunction with accompanying drawing.
Embodiment one
Referring to Fig. 1 and Fig. 2, the embodiment of the invention provides the chip of a kind of LED, and this chip comprises: substrate layer 1, the N electrode 6 and the P electrode 7 that cover N-type layer 2, luminescent layer 3, P type layer 4 and the transparency conducting layer 5 on the substrate layer 1 and draw at N-type layer 2 and P type layer 4 respectively successively.Wherein, this chip also comprises the transparent dielectric layer of the upper surface of the bottom surface that covers substrate layer 1 and/or transparency conducting layer 5.The refractive index of transparent dielectric layer that covers the bottom surface of substrate layer 1 is higher than the refractive index of substrate layer 1; The refractive index of transparent dielectric layer that covers the upper surface of transparency conducting layer 5 is higher than the refractive index of transparency conducting layer 5.
Particularly, wherein, substrate layer 1 comprises Sapphire Substrate, silicon substrate, silicon carbide substrates and gallium nitride substrate.
Wherein, the transparent dielectric layer that covers the bottom surface of substrate layer 1 comprises some bottom surfaces from substrate layer 1 extended protruding 8; The transparent dielectric layer that covers the upper surface of transparency conducting layer 5 comprises some upper surfaces from transparency conducting layer 5 extended protruding 8.
Particularly, the height of each projection 8 is 0.5 ~ 3 μ m; The external diameter of a circle of each projection 8 is 0.5 ~ 5 μ m; Spacing between the adjacent protrusion 8 is 0.5 ~ 10 μ m.
Show that after tested when the spacing when projection 8 external diameter of a circle between the constant and adjacent protrusion 8 was constant, the height of projection 8 was higher, the enhancing rate of the chip brightness of LED is larger; When the spacing when projection 8 height between the constant and adjacent protrusion 8 was constant, the external diameter of a circle of projection 8 was larger, and the enhancing rate ratio of the chip brightness of LED is less; When the external diameter of a circle of the height constant and protruding 8 when protruding 8 was constant, the spacing between the adjacent protrusion 8 was less, and the enhancing rate ratio of the chip brightness of LED is larger.
Further, the acute angle that forms between the upper surface of the bottom surface of the sidewall of each projection 8 and substrate layer 1 or transparency conducting layer 5 is 30 ~ 70 degree.
Show that after tested when the spacing between the adjacent protrusion 8 (for example 2 μ m) was constant, the acute angle that forms between the bottom surface of the sidewall of each projection 8 and substrate layer 1 or the upper surface of transparency conducting layer 5 was larger, the enhancing rate of the chip brightness of LED is larger.When this acute angle (for example 48.3 °) was constant, the spacing between the adjacent protrusion 8 was less, and the enhancing rate of the chip brightness of LED is larger.
Preferably, transparent dielectric layer is by TiO
2Make.
The results showed, when transparent dielectric layer adopts TiO
2, the height of projection 8 is 1.42 μ m, and the external diameter of a circle of projection 8 is 2.43 μ m, and when the spacing between the adjacent protrusion 8 was 0.57 μ m, than the LED without transparent dielectric layer, the brightness that is coated with the LED of transparent dielectric layer had improved 5.67%.
Particularly, this chip also comprises the passivation layer (not shown).When being coated with transparent dielectric layer on the transparency conducting layer 5, this passivation layer is positioned on the transparent dielectric layer.When not covering transparent dielectric layer on the transparency conducting layer 5, this passivation layer is positioned on the transparency conducting layer 5.
Wherein, referring to Fig. 3, transparent dielectric layer is provided with for the reflector 9 of improving brightness.
The beneficial effect that the said chip that the embodiment of the invention provides is brought is: by adhering to transparent dielectric layer in the bottom surface of the substrate layer of the chip of LED and/or the upper surface of transparency conducting layer; When the emergent light of led chip is derived from substrate layer and transparency conducting layer respectively, be higher than substrate layer owing to cover the refractive index of transparent dielectric layer of the bottom surface of substrate layer, the refractive index that covers the transparent dielectric layer of transparency conducting layer upper surface is higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and the transparency conducting layer, so that more emergent light imports to transparent dielectric layer, thereby has increased the transmitance of light from substrate layer and/or transparency conducting layer; Comprise the extended projection in some bottom surfaces from substrate layer owing to cover the transparent dielectric layer of the bottom surface of substrate layer again; The transparent dielectric layer that covers the upper surface of transparency conducting layer comprises the extended projection of some upper surfaces from transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, total reflection effect when having avoided outgoing, thus the transmitance of light from transparent dielectric layer increased; Effectively increase the recovery rate of light in the chip, and then improved the luminance of LED.
Embodiment two
The embodiment of the invention provides the preparation method of the chip of a kind of LED, and method flow comprises:
201: provide substrate layer, successively at this substrate layer growth N-type layer, luminescent layer, P type layer and transparency conducting layer.
202: the preparation wafer.
Wherein, the preparation wafer comprises: at N-type layer and P type layer N electrode and P electrode are set respectively, and on transparency conducting layer deposit passivation layer, form in the bottom surface of substrate layer by refractive index and be higher than the transparent dielectric layer that the transparent medium of substrate layer is made, obtain wafer.Or, form by refractive index at the upper surface of transparency conducting layer and to be higher than the transparent dielectric layer that the transparent medium of transparency conducting layer is made, at N-type layer and P type layer N electrode and P electrode are set respectively, and on transparent dielectric layer deposit passivation layer, obtain wafer.Or, form by refractive index at the upper surface of transparency conducting layer and to be higher than the transparent dielectric layer that the transparent medium of transparency conducting layer is made, at N-type layer and P type layer N electrode and P electrode are set respectively, and on transparent dielectric layer deposit passivation layer, form in the bottom surface of substrate layer by refractive index and be higher than the transparent dielectric layer that the transparent medium of substrate layer is made, obtain wafer.
Further, the transparent dielectric layer that covers the bottom surface of substrate layer comprises the extended projection in some bottom surfaces from substrate layer, and the transparent dielectric layer that covers the upper surface of transparency conducting layer comprises the extended projection of some upper surfaces from transparency conducting layer.
203: wafer is carried out the sliver operation, obtain chip.
The beneficial effect that the said method that the embodiment of the invention provides brings is: by adhering to transparent dielectric layer in the bottom surface of the substrate layer of the chip of LED and/or the upper surface of transparency conducting layer; When the emergent light of led chip is derived from substrate layer and transparency conducting layer respectively, be higher than substrate layer owing to cover the refractive index of transparent dielectric layer of the bottom surface of substrate layer, the refractive index that covers the transparent dielectric layer of transparency conducting layer upper surface is higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and the transparency conducting layer, so that more emergent light imports to transparent dielectric layer, thereby has increased the transmitance of light from substrate layer and/or transparency conducting layer; Comprise the extended projection in some bottom surfaces from substrate layer owing to cover the transparent dielectric layer of the bottom surface of substrate layer again; The transparent dielectric layer that covers the upper surface of transparency conducting layer comprises the extended projection of some upper surfaces from transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, total reflection effect when having avoided outgoing, thus the transmitance of light from transparent dielectric layer increased; Effectively increase the recovery rate of light in the chip, and then improved the luminance of LED.
Embodiment three
The embodiment of the invention provides the preparation method of the chip of a kind of LED, and method flow comprises:
301: provide substrate layer, successively at this substrate layer growth N-type layer, luminescent layer, P type layer and transparency conducting layer.
Particularly, can utilize MOCVD(Metal-organic Chemical Vapor Deposition, the metallo-organic compound chemical gaseous phase deposition) mode at substrate layer 31 growth N-type layers 32, luminescent layer 33, P type layer 34 and transparency conducting layer 35(referring to Fig. 4).This is well known technology, is not described in detail in this.
Wherein, substrate layer 31 can be Sapphire Substrate, silicon substrate, silicon carbide substrates and gallium nitride substrate.
In addition, N-type layer 32, luminescent layer 33 and P type layer 34 are made by GaN.
302: at N-type layer and P type layer N electrode and P electrode are set respectively, and on transparency conducting layer deposit passivation layer; Form in the bottom surface of substrate layer by refractive index and be higher than the transparent dielectric layer that the transparent medium of substrate layer is made; Obtain wafer.
Further, this step comprises:
3021: at N-type layer and P type layer N electrode and P electrode are set respectively, and on transparency conducting layer deposit passivation layer.
Particularly, can adopt natural lithography method and other existing conventional methods to draw N electrode 36 and P electrode 37.This is well known technology, is not described in detail in this.
In addition, after the deposit passivation layer, can utilize polishing grinding equipment that substrate layer 31 is carried out the attenuate operation.The thickness of supposing substrate layer 31 is the first predetermined thickness, and preferably, this first predetermined thickness can be 150 μ m.
Further, finish attenuate operation after, wafer is positioned over respectively in removing photoresistance agent, the absolute ethyl alcohol cleans, to improve the adhesion of photoresistance.
3022: form in the bottom surface of substrate layer by refractive index and be higher than the transparent dielectric layer that the transparent medium of substrate layer is made.
Wherein, this transparent dielectric layer comprises some bottom surfaces from substrate layer 31 extended protruding 38.
Further, this step comprises:
3022a: form protective layer in passivation layer surface.
Particularly, referring to Fig. 4, this protective layer 310 is positioned at passivation layer (Fig. 4 is not shown) surface, is made by negative light resistance agent.Wherein, the thickness of supposing this protective layer is the second predetermined thickness.Preferably, this second predetermined thickness is 2 ~ 5 μ m.In addition, after protective layer 310 forms, should use exposure machine directly exposure and baking.
3022b: the transparent dielectric layer that is higher than substrate layer in the bottom surface of substrate layer evaporation one deck refractive index.
Particularly, adopt the method for electron beam evaporation or thermal evaporation to evaporate the transparent dielectric layer that one deck refractive indexes are higher than substrate layer 31 at substrate layer 31.The method of electron beam evaporation or thermal evaporation is well known technology, is not described in detail in this.
Preferably, transparent dielectric layer is by TiO
2Make.The thickness of supposing this transparent dielectric layer is the 3rd predetermined thickness.Preferably, the 3rd predetermined thickness is 0.5 ~ 3 μ m.
3022c: adopt photoresist that lithography operations is carried out in the bottom surface of transparent dielectric layer, form some predetermined patterns with the bottom surface at transparent dielectric layer.
Wherein, the process sequence of lithography operations comprises successively spin coating operation, soft baking operation, developing procedure and firmly dries by the fire operation.In lithography operations, the temperature of the soft baking after the spin coating operation is 100 ~ 120 degree, stoving time 90 ~ 180s; The temperature of hard baking is 120 ~ 160 degree behind developing procedure, stoving time 60 ~ 180s.Particularly, wafer level being positioned over hot plate toasts.
Particularly, can adopt the method for natural lithography to form some predetermined pattern profiles in the bottom surface of substrate layer 31.What deserves to be explained is, in the spin coating operation, answer spin coating one deck eurymeric photoresist as photoresist in the bottom surface of substrate layer 31.And, in order to increase viscosity, before carrying out lithography operations, can be first at the bottom surface of transparent dielectric layer spin coating tackifier.
Wherein, the external diameter of a circle of each predetermined pattern is 0.5 ~ 10 μ m; Spacing between the adjacent predetermined pattern is 0.5 ~ 5 μ m.Like this, the size of predetermined pattern defines the size of projection 38.
In addition, the protective layer 310 that forms among photoresist and the step 3022a should be opposite sensitization character.
3022d: adopt the predetermined pattern of the bottom surface of etching machine etching transparent dielectric layer, make the transparent dielectric layer after the etching comprise the extended separate projection in some bottom surfaces from substrate layer.
Wherein, carry out etching take the 3rd predetermined thickness as etching depth.Because the 3rd predetermined thickness is 0.5 ~ 3 μ m, so etching depth is 0.5 ~ 3 μ m.
Particularly, wafer is positioned in the ICP etching machine with refrigerating function, utilizes Bcl3 gas to carry out etching.The etching machine substrate bias power is 400 ~ 500W, and etching machine power is 1000 ~ 1500W, and etching temperature is 0 degree; BCL3:60sccm; O2:20sccm; Etch period 700s.
3022e: residual photoresist and the protective layer after the etching removed in cleaning.
Particularly, cull and protective layer 310 after the use high temperature descum agent removal etching.
303: be the evaporation reflector, bottom surface of wafer.
Wherein, this reflector (not shown among Fig. 4) comprises the metal of multilayer and the metal membrane structure of nonmetal oxide membrane structure and single or multiple lift.
304: wafer is carried out the sliver operation, obtain chip.
Particularly, utilize the mode of mechanical sliver or laser sliver that wafer is divided into one single chip.This is well known technology, is not described in detail in this.
The beneficial effect that the said method that the embodiment of the invention provides brings is: by adhering to transparent dielectric layer in the bottom surface of the substrate layer of the chip of LED and/or the upper surface of transparency conducting layer; When the emergent light of led chip is derived from substrate layer and transparency conducting layer respectively, be higher than substrate layer owing to cover the refractive index of transparent dielectric layer of the bottom surface of substrate layer, the refractive index that covers the transparent dielectric layer of transparency conducting layer upper surface is higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and the transparency conducting layer, so that more emergent light imports to transparent dielectric layer, thereby has increased the transmitance of light from substrate layer and/or transparency conducting layer; Comprise the extended projection in some bottom surfaces from substrate layer owing to cover the transparent dielectric layer of the bottom surface of substrate layer again; The transparent dielectric layer that covers the upper surface of transparency conducting layer comprises the extended projection of some upper surfaces from transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, total reflection effect when having avoided outgoing, thus the transmitance of light from transparent dielectric layer increased; Effectively increase the recovery rate of light in the chip, and then improved the luminance of LED.
Embodiment four
The embodiment of the invention provides the preparation method of the chip of a kind of LED, and method flow comprises:
401: provide substrate layer, successively at substrate layer growth N-type layer, luminescent layer, P type layer and transparency conducting layer.
Wherein, this step is not described in detail in this with in the embodiment of the invention three 301.
402: form by refractive index at the upper surface of transparency conducting layer and to be higher than the transparent dielectric layer that the transparent medium of transparency conducting layer is made; At N-type layer and P type layer N electrode and P electrode are set respectively; And on transparent dielectric layer deposit passivation layer; Obtain wafer.
Further, this step comprises:
4021: form by refractive index at the upper surface of transparency conducting layer and to be higher than the transparent dielectric layer that the transparent medium of transparency conducting layer is made.
Wherein, this transparent dielectric layer comprises the extended projection of some upper surfaces from transparency conducting layer.
Particularly, this step comprises:
4021a: the transparent dielectric layer that is higher than transparency conducting layer in upper surface evaporation one deck refractive index of transparency conducting layer.
Particularly, this step is not described in detail in this with 3022b in the embodiment of the invention three.
4021b: at the upper surface spin coating tackifier of transparent dielectric layer.
Particularly, finish spin coating after, need the baking wafer, bake out temperature is not less than 100 degree.
4021c: adopt photoresist that the upper surface of transparent dielectric layer is carried out lithography operations, form some predetermined patterns with the upper surface at transparent dielectric layer.
Particularly, this step is not described in detail in this with 3022c in the embodiment of the invention three.
4021d: adopt the predetermined pattern of the upper surface of etching machine etching transparent dielectric layer, make the transparent dielectric layer after the etching comprise the extended separate projection of some upper surfaces from transparency conducting layer.
Wherein, suppose that etching depth is the 3rd predetermined thickness.Preferably, the 3rd predetermined thickness is 0.5 ~ 3 μ m.
Particularly, wafer is positioned in the ICP etching machine with refrigerating function, utilizes CF4/BCl3 gas to carry out etching.The etching machine substrate bias power is 200 ~ 400W, and etching machine power is 500 ~ 1000W, and etching temperature is 0 degree; BCL3:6sccm; CF4:60sccm; Etch period 600s.
4021e: the residual photoresist after the etching is removed in cleaning, and carries out N district etching.
Particularly, residual photoresist after the use high temperature descum agent removal etching.
4022: at N-type layer and P type layer N electrode and P electrode are set respectively, and on transparent dielectric layer deposit passivation layer.
Particularly, this step is not described in detail in this with in the embodiment of the invention three 3021.
403: be the evaporation reflector, bottom surface of wafer.
Wherein, this step is not described in detail in this with in the embodiment of the invention three 303.
404: wafer is carried out the sliver operation, obtain chip.
Wherein, this step is not described in detail in this with in the embodiment of the invention three 304.
The beneficial effect that the said method that the embodiment of the invention provides brings is: by adhering to transparent dielectric layer in the bottom surface of the substrate layer of the chip of LED and/or the upper surface of transparency conducting layer; When the emergent light of led chip is derived from substrate layer and transparency conducting layer respectively, be higher than substrate layer owing to cover the refractive index of transparent dielectric layer of the bottom surface of substrate layer, the refractive index that covers the transparent dielectric layer of transparency conducting layer upper surface is higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and the transparency conducting layer, so that more emergent light imports to transparent dielectric layer, thereby has increased the transmitance of light from substrate layer and/or transparency conducting layer; Comprise the extended projection in some bottom surfaces from substrate layer owing to cover the transparent dielectric layer of the bottom surface of substrate layer again; The transparent dielectric layer that covers the upper surface of transparency conducting layer comprises the extended projection of some upper surfaces from transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, total reflection effect when having avoided outgoing, thus the transmitance of light from transparent dielectric layer increased; Effectively increase the recovery rate of light in the chip, and then improved the luminance of LED.
Embodiment five
The embodiment of the invention provides the preparation method of the chip of a kind of LED, and method flow comprises:
501: provide substrate layer, successively at substrate layer growth N-type layer, luminescent layer, P type layer and transparency conducting layer.
Wherein, this step is not described in detail in this with in the embodiment of the invention four 401.
502: form by refractive index at the upper surface of transparency conducting layer and to be higher than the transparent dielectric layer that the transparent medium of transparency conducting layer is made; Respectively etching N electrode and P electrode on N-type layer and P type layer; And on transparent dielectric layer deposit passivation layer; Obtain wafer.
Further, this step comprises:
5021: form by refractive index at the upper surface of transparency conducting layer and to be higher than the transparent dielectric layer that the transparent medium of transparency conducting layer is made.
Wherein, this transparent dielectric layer comprises the extended projection of some upper surfaces from transparency conducting layer.
Particularly, this step comprises:
5021a: the transparent dielectric layer that is higher than transparency conducting layer in upper surface evaporation one deck refractive index of transparency conducting layer.
Particularly, this step is not described in detail in this with 4021a in the embodiment of the invention four.
5021b: at the upper surface deposition SiO of transparent dielectric layer
2Layer.
Wherein, suppose SiO
2The thickness of layer is the 4th predetermined thickness.Preferably, the 4th predetermined thickness is 0.5 ~ 1 μ m.Particularly, can utilize PECVD to deposit the SiO of the 4th predetermined thickness
2Layer.Depositing temperature is 200 ~ 300 degree.
5021c: at SiO
2The upper surface spin coating tackifier of layer.
Particularly, finish spin coating after, need the baking wafer, bake out temperature is not less than 100 degree.
5021d: adopt photoresist to SiO
2The upper surface of layer carries out lithography operations, with at SiO
2The upper surface of layer forms some predetermined patterns.
Particularly, this step is not described in detail in this with 4021c in the embodiment of the invention four.
5021e: adopt etching machine etching SiO
2The predetermined pattern of upper surface of layer obtains the SiO after the etching
2Layer.
Particularly, carry out etching take above-mentioned the 4th predetermined thickness as etching depth.This step is not described in detail in this with 4021d in the embodiment of the invention four.
5021f: the residual photoresist after the etching is removed in cleaning, with the SiO after the etching
2Layer is mask body, and transparent dielectric layer is carried out high temperature corrosion, makes the transparent dielectric layer after the corrosion comprise the extended separate projection of some upper surfaces from transparency conducting layer.
Wherein, can adopt high-temperature sulfuric acid (180 degree ~ 260 degree) or other corresponding acid solutions that transparent dielectric layer is corroded, to form required projection.Corrosion depth is aforementioned the 3rd predetermined thickness.The degree of depth of corrosion is by the temperature of acid solution, acid solution and the Time dependent of corrosion.For example, the disk at chip place is positioned in the concentrated sulfuric acids of 260 degree and corrodes 5min.
5021g: the SiO after the removal etching
2Layer, and carry out N district etching.
Particularly, can use hydrofluoric acid or other acid solutions with SiO
2Layer is removed.For example, the disk after the etching is positioned over 2min in the HF acid (5% concentration), can removes the SiO2 layer.
5022: respectively etching N electrode and P electrode on N-type layer and P type layer, and on transparent dielectric layer deposit passivation layer.
Particularly, this step is not described in detail in this with in the embodiment of the invention four 4022.
503: be the evaporation reflector, bottom surface of wafer.
Wherein, this step is not described in detail in this with in the embodiment of the invention four 403.
504: wafer is carried out the sliver operation, obtain chip.
Wherein, this step is not described in detail in this with in the embodiment of the invention four 404.
The beneficial effect that the said method that the embodiment of the invention provides brings is: by adhering to transparent dielectric layer in the bottom surface of the substrate layer of the chip of LED and/or the upper surface of transparency conducting layer; When the emergent light of led chip is derived from substrate layer and transparency conducting layer respectively, be higher than substrate layer owing to cover the refractive index of transparent dielectric layer of the bottom surface of substrate layer, the refractive index that covers the transparent dielectric layer of transparency conducting layer upper surface is higher than transparency conducting layer; Like this, there is refringence in transparent dielectric layer respectively and between substrate layer and the transparency conducting layer, so that more emergent light imports to transparent dielectric layer, thereby has increased the transmitance of light from substrate layer and/or transparency conducting layer; Comprise the extended projection in some bottom surfaces from substrate layer owing to cover the transparent dielectric layer of the bottom surface of substrate layer again; The transparent dielectric layer that covers the upper surface of transparency conducting layer comprises the extended projection of some upper surfaces from transparency conducting layer, more light is by the surperficial outgoing of some projections of transparent dielectric layer, total reflection effect when having avoided outgoing, thus the transmitance of light from transparent dielectric layer increased; Effectively increase the recovery rate of light in the chip, and then improved the luminance of LED.
The invention described above embodiment sequence number does not represent the quality of embodiment just to description.
The above only is preferred embodiment of the present invention, and is in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of doing, is equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (11)
1. the chip of a light-emitting diode, described chip comprises substrate layer, the N electrode and the P electrode that cover N-type layer, luminescent layer, P type layer and the transparency conducting layer on the described substrate layer and draw at described N-type layer and described P type layer respectively successively, it is characterized in that
Described chip also comprises the transparent dielectric layer of the upper surface of the bottom surface that covers described substrate layer and/or described transparency conducting layer, the refractive index of described transparent dielectric layer that covers the bottom surface of described substrate layer is higher than the refractive index of described substrate layer, and the refractive index of described transparent dielectric layer that covers the upper surface of described transparency conducting layer is higher than the refractive index of described transparency conducting layer; The described described transparent dielectric layer that covers the bottom surface of described substrate layer comprises the extended projection in some bottom surfaces from described substrate layer, and the described transparent dielectric layer that covers the upper surface of described transparency conducting layer comprises the extended projection of some upper surfaces from described transparency conducting layer.
2. chip according to claim 1 is characterized in that, the height of each described projection is 0.5 ~ 3 μ m, and the external diameter of a circle of each described projection is 0.5 ~ 5 μ m, and the spacing between the adjacent described projection is 0.5 ~ 10 μ m.
3. chip according to claim 1 is characterized in that, the acute angle that forms between the upper surface of the sidewall of each described projection and the bottom surface of described substrate layer or described transparency conducting layer is 30 ~ 70 degree.
4. chip according to claim 1 is characterized in that, described transparent dielectric layer is provided with the reflector.
5. the preparation method of the chip of a light-emitting diode is characterized in that, described method comprises:
Step 1, provide substrate layer, and successively at described substrate layer growth N-type layer, luminescent layer, P type layer and transparency conducting layer;
Step 2, preparation wafer;
Step 3, described wafer is carried out sliver operation, obtain chip;
Wherein, described preparation wafer comprises:
At described N-type layer and described P type layer N electrode and P electrode are set respectively, and on described transparency conducting layer deposit passivation layer, form in the bottom surface of described substrate layer by refractive index and be higher than the transparent dielectric layer that the transparent medium of described substrate layer is made, obtain wafer; Perhaps
Form by refractive index at the upper surface of described transparency conducting layer and to be higher than the transparent dielectric layer that the transparent medium of described transparency conducting layer is made, at described N-type layer and described P type layer N electrode and P electrode are set respectively, and on described transparent dielectric layer deposit passivation layer, obtain wafer; Perhaps
Form by refractive index at the upper surface of described transparency conducting layer and to be higher than the transparent dielectric layer that the transparent medium of described transparency conducting layer is made, at described N-type layer and described P type layer N electrode and P electrode are set respectively, and on described transparent dielectric layer deposit passivation layer, form in the bottom surface of described substrate layer by refractive index and be higher than the transparent dielectric layer that the transparent medium of described substrate layer is made, obtain wafer;
Wherein, the described transparent dielectric layer that covers the bottom surface of described substrate layer comprises the extended projection in some bottom surfaces from described substrate layer, and the transparent dielectric layer that covers the upper surface of described transparency conducting layer comprises the extended projection of some upper surfaces from described transparency conducting layer.
6. method according to claim 5 is characterized in that, described bottom surface at described substrate layer forms by refractive index and is higher than the transparent dielectric layer that the transparent medium of described substrate layer is made, and comprising:
Form protective layer in described passivation layer surface;
The transparent dielectric layer that is higher than described substrate layer in the bottom surface of described substrate layer evaporation one deck refractive index;
Adopt photoresist that lithography operations is carried out in the bottom surface of described transparent dielectric layer, form some predetermined patterns with the bottom surface at described transparent dielectric layer;
Adopt the described predetermined pattern of the bottom surface of the described transparent dielectric layer of etching machine etching, make the described transparent dielectric layer after the etching comprise the extended separate projection in some bottom surfaces from described substrate layer;
Residual photoresist and the described protective layer after the etching removed in cleaning.
7. method according to claim 5 is characterized in that, described upper surface at described transparency conducting layer forms by refractive index and is higher than the transparent dielectric layer that the transparent medium of described transparency conducting layer is made, and comprising:
The transparent dielectric layer that is higher than described transparency conducting layer in upper surface evaporation one deck refractive index of described transparency conducting layer;
Adopt photoresist that the upper surface of described transparent dielectric layer is carried out lithography operations, form some predetermined patterns with the upper surface at described transparent dielectric layer;
Adopt the described predetermined pattern of the upper surface of the described transparent dielectric layer of etching machine etching, make the described transparent dielectric layer after the etching comprise the extended separate projection of some upper surfaces from described transparency conducting layer;
The residual photoresist after the etching is removed in cleaning, and carries out N district etching.
8. method according to claim 5 is characterized in that, described upper surface at described transparency conducting layer forms by refractive index and is higher than the transparent dielectric layer that the transparent medium of described transparency conducting layer is made, and comprising:
The transparent dielectric layer that is higher than described transparency conducting layer in upper surface evaporation one deck refractive index of described transparency conducting layer;
Upper surface deposition SiO at described transparent dielectric layer
2Layer;
Adopt photoresist to described SiO
2The upper surface of layer carries out lithography operations, with at described SiO
2The upper surface of layer forms some predetermined patterns;
Adopt the described SiO of etching machine etching
2The described predetermined pattern of upper surface of layer obtains the SiO after the etching
2Layer;
The residual photoresist after the etching is removed in cleaning, with the SiO after the etching
2Layer is mask body, and described transparent dielectric layer is carried out high temperature corrosion, makes the described transparent dielectric layer after the corrosion comprise the extended separate projection of some upper surfaces from described transparency conducting layer;
SiO after the removal etching
2Layer, and carry out N district etching.
9. method according to claim 6 is characterized in that, described employing photoresist carries out the bottom surface of described transparent dielectric layer also comprising before the lithography operations:
At the bottom surface of described transparent dielectric layer spin coating tackifier.
10. each described method is characterized in that according to claim 6～8, and the process sequence of described lithography operations comprises spin coating operation, soft baking operation, developing procedure and firmly dry by the fire operation that the temperature of described soft baking is 100 ~ 120 degree, stoving time 90 ~ 180s successively; The temperature of described hard baking is 120 ~ 160 degree, stoving time 60 ~ 180s; So that the acute angle that forms between the upper surface of the bottom surface of the sidewall of each described projection and described substrate layer or described transparency conducting layer is 30 ~ 70 degree.
11. each described method according to claim 6～8, it is characterized in that, the thickness of described transparent dielectric layer is 0.5 ~ 3 μ m, the external diameter of a circle of each described predetermined pattern is 0.5 ~ 10 μ m, spacing between the adjacent described predetermined pattern is 0.5 ~ 5 μ m, so that the height of described each described projection is 0.5 ~ 3 μ m, the external diameter of a circle of each described projection is 0.5 ~ 5 μ m, and the spacing between the adjacent described projection is 0.5 ~ 10 μ m.
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