CN103020566A - Detecting circuit and detecting method for received signal strength of RFI (Radio Frequency Identification) reader-writer - Google Patents
Detecting circuit and detecting method for received signal strength of RFI (Radio Frequency Identification) reader-writer Download PDFInfo
- Publication number
- CN103020566A CN103020566A CN2012105499214A CN201210549921A CN103020566A CN 103020566 A CN103020566 A CN 103020566A CN 2012105499214 A CN2012105499214 A CN 2012105499214A CN 201210549921 A CN201210549921 A CN 201210549921A CN 103020566 A CN103020566 A CN 103020566A
- Authority
- CN
- China
- Prior art keywords
- circuit
- hold circuit
- peak
- signals
- sampling hold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Near-Field Transmission Systems (AREA)
Abstract
The invention discloses a detecting circuit and a detecting method for received signal strength of an RFI (Radio Frequency Identification) reader-writer. When a micro controller decodes return signals of a label, a peak value sample and hold circuit samples and holds the peak values of path I signals and path Q signals of the return signals of the label; and after the return signals are decoded, the peak values of received signals held by the peak value sample and hold circuit are acquired through an ADC (Airborne Digital Computer), and the relative values of the signal power are returned by calculating the peak values of the signals. The detecting circuit comprises the peak value sample and hold circuit and a switch discharge circuit, wherein the input end of the peak value sample and hold circuit is connected with the output end of a base band, and the output end of the peak value sample and hold circuit is connected with the ADC of a microprocessor; the switch discharge circuit is connected with the peak value sample and hold circuit; and the control signal input end of the switch discharge circuit is connected with the microprocessor. The circuit and the method are simple in implementation model and low in cost; the requirements on the computing power of the microprocessor and the rate of the ADC are not high; and the circuit and the method can be applied to general single-chip microcomputer control systems.
Description
[technical field]
The present invention relates to radio-frequency identification reader/writer, relate in particular to a kind of radio-frequency identification reader/writer circuit for detecting intensity of received signal and detection method.
[background technology]
RSSI (Received Signal Strength Indication) is received signal strength, directly can obtain its signal intensity by detecting the amplitude that receives signal in the general telecommunication circuit.In UHF RFID circuit, the tag reflection signal that receives and faint, and in the transmit leakage signal (even by the whole bag of tricks go offset, residue also much larger than label transmit) of receiving cable existence much larger than the reception signal.If the signal amplitude that the RSSI in the UHF rfid interrogator measures receiving cable at radio frequency is inaccurate.
At present at home, realize the external integrated read-write equipment chip of the many employings of read write line of RSSI function, do not have the circuit of oneself.In the design abroad, generally be that the signal after demodulation directly carries out the high-speed ADC sampling, then calculate received signal strength by digital signal processing algorithm.
Adopt the cost compare of integrated read-write equipment chip high, the read write line chip all needs import at present, and domestic do not have an independent intellectual property right.It is more accurate to adopt high-speed ADC and this mode of digital signal processor to measure RSSI, but high-speed ADC and digital signal processor cost are higher, and performance period is also longer.Concerning domestic majority was controlled the read write line of processing with data by microcontroller, the method was difficult for realizing.
[summary of the invention]
It is low, simple in structure that the technical problem to be solved in the present invention provides a kind of circuit cost, the radio-frequency identification reader/writer received signal strength detection method that can realize in general single-chip computer control system.
It is low, simple in structure that another technical matters that will solve of the present invention provides a kind of realization cost, the radio-frequency identification reader/writer circuit for detecting intensity of received signal that can realize in general single-chip computer control system.
In order to solve the problems of the technologies described above, the technical solution used in the present invention is, a kind of radio-frequency identification reader/writer received signal strength detection method, when microcontroller was decoded to the return signal of label, peak sampling hold circuit was sampled to the peak value of the I of label return signal, Q two paths of signals and is kept; After the microcontroller decoding is finished, obtain the I of peak sampling hold circuit maintenance, the reception signal peak of Q two paths of signals by ADC, and calculate the relative value of return signal power by the peak value of I, Q two paths of signals.
Above-described radio-frequency identification reader/writer received signal strength detection method, microcontroller are discharged to the electric charge that stores on the peak sampling hold circuit after obtaining the reception signal peak of I that peak sampling hold circuit keeps, Q two paths of signals by ADC.
Above-described radio-frequency identification reader/writer received signal strength detection method, the step of calculating return signal power relative value comprises I, Q two paths of signals peak value is deducted the dc reference value, then ask for quadratic sum, characterize the relative value of return signal power with described quadratic sum.
Above-described radio-frequency identification reader/writer received signal strength detection method compares measurement with standard signal source, and acquisition cuicuit gain constant, described relative value obtain the absolute value of return signal power divided by the circuit gain constant.
Above-described radio-frequency identification reader/writer received signal strength detection method,, the sampling input point of peak sampling hold circuit is chosen in the unsaturated amplification output terminal of base band amplifying circuit
A kind of technical scheme that realizes the radio-frequency identification reader/writer circuit for detecting intensity of received signal of said method, comprise microprocessor, base band amplifying circuit, peak sampling hold circuit and switch discharge circuit, the output termination microprocessor of base band amplifying circuit I, Q two paths of signals, the input termination base band amplifying circuit of peak sampling hold circuit I, Q two paths of signals, two output terminals of peak sampling hold circuit connect respectively two pins of ADC of microprocessor; The switch discharge circuit connects peak sampling hold circuit, the control signal input termination microprocessor-based control signal output part of switch discharge circuit.
Above-described radio-frequency identification reader/writer circuit for detecting intensity of received signal, described peak sampling hold circuit comprises the two-way sampling hold circuit, every road sampling hold circuit comprises the first voltage follower, second voltage follower, diode and storage capacitor, in the input termination base band amplifying circuit I of the first voltage follower, the Q two paths of signals output terminal a road, the anode of the output terminating diode of the first voltage follower, the negative electrode of diode connects the first end of storage capacitor, the second end ground connection of storage capacitor; The first end of the input termination storage capacitor of second voltage follower, input pin of output termination microprocessor ADC of second voltage follower.
Above-described radio-frequency identification reader/writer circuit for detecting intensity of received signal, described switch discharge circuit comprises the two-way discharge circuit, and every road discharge circuit comprises a single-pole double-throw switch (SPDT), and the input pin of single-pole double-throw switch (SPDT) connects the first end of storage capacitor; The first output pin of single-pole double-throw switch (SPDT) is unsettled, the second output pin ground connection; The control termination of single-pole double-throw switch (SPDT) connects the microprocessor-based control signal output part.
Above-described radio-frequency identification reader/writer circuit for detecting intensity of received signal, every road sampling hold circuit comprises the first divider resistance, the second divider resistance, the 3rd divider resistance, the 4th divider resistance and current-limiting resistance, after the first divider resistance is connected in series with the second divider resistance in the described base band amplifying circuit of termination I, the Q two paths of signals output terminal a road, other end ground connection, the tie point of the first divider resistance and the second divider resistance connects the input end of the first voltage follower; The output terminal of a termination second voltage follower after the 3rd divider resistance is connected in series with the 4th divider resistance, other end ground connection, the tie point of the 3rd divider resistance and the 4th divider resistance connects input pin of described microprocessor ADC; The negative electrode of the first terminating diode of current-limiting resistance, the first end of the second termination storage capacitor.
Above-described radio-frequency identification reader/writer circuit for detecting intensity of received signal, every road discharge circuit comprises discharge resistance, the first output pin of single-pole double-throw switch (SPDT) is by discharge resistance ground connection; The input pin of single-pole double-throw switch (SPDT) connects the first end of described current-limiting resistance, connects storage capacitor by current-limiting resistance.
Implementation of the present invention is simple, and is with low cost.The measurements and calculations of signal intensity are finished after decoding, have reduced the arithmetic capability requirement to microprocessor, because peak sampling hold circuit is arranged, not high to the ADC rate requirement that gathers simulating signal yet, can be applied in the general single-chip computer control system.
[description of drawings]
The present invention is further detailed explanation below in conjunction with the drawings and specific embodiments.
Fig. 1 is the theory diagram of embodiment of the invention radio-frequency identification reader/writer circuit for detecting intensity of received signal.
Fig. 2 is the schematic diagram of embodiment of the invention peak sampling hold circuit.
Fig. 3 is the schematic diagram of embodiment of the invention switch discharge circuit.
[embodiment]
As shown in Figure 1, embodiment of the invention radio-frequency identification reader/writer circuit for detecting intensity of received signal comprises microprocessor (MCU), base band amplifying circuit, peak sampling hold circuit and switch discharge circuit, the output terminal of base band amplifying circuit I, Q two paths of signals connects microprocessor by comparing decision circuit, the input termination base band amplifying circuit second level baseband amplifier I of peak sampling hold circuit I, Q two paths of signals, the output terminal of Q two paths of signals, two output terminals of peak sampling hold circuit connect respectively two pins of ADC of microprocessor; The switch discharge circuit connects peak sampling hold circuit, the control signal input termination microprocessor-based control signal output part of switch discharge circuit.
As shown in Figure 2, peak sampling hold circuit comprises the sampling hold circuit that two-way is identical, because two groups of signal amplification circuits of I and Q are symmetrical, the below illustrates that as an example of Q road signal example signal flows to.
The sampling hold circuit of Q road signal comprises the first voltage follower, second voltage follower, diode D01, storage capacitor C01 the first bleeder circuit and the second bleeder circuit.
The first voltage follower and second voltage follower are selected U01(LM324_N) two operation amplifier unit, two operation amplifier unit connect into respectively two voltage followers.
Because the input signal DC level is higher, need at first use the first bleeder circuit dividing potential drop.The input end of the first voltage follower meets base band amplifying circuit Q road signal output part OUT_Q-by the first bleeder circuit, enters the first voltage follower after the dividing potential drop and carries out electric current amplification (unity gain amplification).The anode of the output terminating diode D01 of the first voltage follower, the negative electrode of diode D01 was connected the first end that current-limiting resistance R05 meets storage capacitor C01, the second end ground connection of storage capacitor C01.
The input end of second voltage follower connects the first end of storage capacitor C01 by current-limiting resistance R05, and the second voltage follower carries out equally electric current and amplifies (unity gain amplification).The output terminal of second voltage follower meets input pin ADC0_1 of microprocessor ADC by the second bleeder circuit.
The first bleeder circuit comprises the first divider resistance R01 and the second divider resistance R02.A termination base band amplifying circuit Q road signal output part OUT_Q-after the first divider resistance R01 is connected in series with the second divider resistance R02, other end ground connection, the input termination first divider resistance R01 of the first voltage follower and the tie point between the second divider resistance R02.The first bleeder circuit comprises the first divider resistance R01 and the second divider resistance R02.The second bleeder circuit comprises the 3rd divider resistance R06 and the 4th divider resistance R09.The output terminal of a termination second voltage follower after the 3rd divider resistance R06 is connected in series with the 4th divider resistance R09, other end ground connection, the tie point between the 3rd divider resistance R06 and the 4th divider resistance R09 meets input pin ADC0_1 of microprocessor ADC.
As shown in Figure 3, the switch discharge circuit comprises the discharge circuit that two-way is identical, and every road discharge circuit comprises a single-pole double-throw switch (SPDT).The single-pole double-throw switch (SPDT) that the two-way discharge circuit adopts is single-pole double-throw (SPDT) simulating signal switch U02(SGM3002) two single-pole double-throw switch (SPDT)s.Now describe with first via discharge circuit.
(the 6th pin CAP1) connects the first end of storage capacitor C01 to the input pin of single-pole double-throw switch (SPDT) by discharge resistance R05; The first output pin of single-pole double-throw switch (SPDT) (the 7th pin) is unsettled, and the second output pin (the 4th pin) is by discharge resistance R2 ground connection; (the 5th pin RESET_SW) connects the microprocessor-based control signal output part to the control pin of single-pole double-throw switch (SPDT).
When read write line transmitted to label, the control pin 5 of microprocessor controls U02 made input pin 6 be connected connection with output pin, and storage capacitor C01 discharge is the low level discharge condition at the negative electrode of diode D01;
When label signal returned, microprocessor controls U02 made input pin 6 connect output pin 7, is equivalent to unsettled.The peak sampling hold circuit normal operation, the signal that returns carries out after electric current amplifies storage capacitor C01 being charged through U01, keeps the highest signal peak at C01.
After the microcontroller decoding is finished, by I, the Q two paths of signals peak value that ADC reads peak sampling hold circuit, control again U02 after finishing storage capacitor C01 is discharged.
I, Q two paths of signals peak value are deducted the dc reference value, then ask for quadratic sum, again divided by the circuit gain constant, namely obtained the signal intensity performance number that label returns.
The circuit gain constant can obtain by the standard signal source measurement of comparison.
Principle of the present invention is as follows:
The detection of RSSI is by the baseband signal amplitude after the measurement demodulation among the present invention, realizes through certain computing again.
The process of Zero-IF demodulator can be explained with following mathematical expression:
In the formula: V
IAnd V
QRespectively homophase and quadrature two-way restituted signal, through the signal behind the base band amplifying circuit; V
RFThe label return signal, V
LOLocal oscillation signal,
Be differing of local oscillator and return signal, G is the gain summation of detuner and base band amplifying circuit.
As can be seen from the above equation, in the situation of phase difference constant, the baseband signal amplitude after the demodulation and label return signal amplitude are directly proportional.After amplifying through baseband amplifier, amplitude still with the sexual intercourse of return signal retention wire.In certain actual read write line, differ
Be a uncertain changing value, at this moment, only need ask for root mean square to I road signal and Q road signal, just can draw one with differ the irrelevant numerical value that can reflect the return signal amplitude.
Because the return signal that receives not is a steady signal of direct current perseverance, finishes so need to measure its peak value.When the label return signal, microcontroller needs to decode to return signal, does not have unnecessary resource to carry out signal strength measurement, so also need the peak value of sampling is kept, measures after waiting to be decoded finishing.
As shown in Figure 1, the designed RSSI testing circuit of the present invention mainly is comprised of peak sampling hold circuit and switch discharge circuit two large divisions.The base band amplifying circuit of read write line is exported the I(homophase) and the Q(quadrature) the two-way baseband signal, be linked into and carry out the peak value sampling maintenance in the sampling hold circuit.The base band amplifying circuit generally is made of multistage, and the sampled point of choosing can not be the one-level of saturation amplification.The output of peak sampling hold circuit is linked into ADC.The ADC rate request is not high, can be integrated by MCU inside.Connect a switch discharge circuit at peak sampling hold circuit, discharge circuit can when not needing to detect (when such as read write line label being sent data), discharge to sampling hold circuit.
Software is realized:
At ordinary times, by discharge circuit the electric charge that stores on the peak sampling hold circuit is discharged;
When the label return signal, disconnect discharge circuit, sampling hold circuit will keep the signal peak that detects;
After microcontroller decoding is finished, obtain the reception signal peak of I, Q two paths of signals by ADC, after finishing analog switch is linked into stake resistance, discharge circuit is discharged to the electric charge that stores on the peak sampling hold circuit;
I, Q two paths of signals peak value are deducted the dc reference value, then ask for quadratic sum.Because signal power and amplitude square are proportional relations, so quadratic sum can be explained the relative size of received signal power.The result of above-mentioned detection and calculating and label return signal power are linear, but relative value is not absolute value.This relative value and absolute value can carry out orientation ratio pair by standard signal source, obtain scale-up factor.To the read write line of same circuit structure, can adopt this scale-up factor.
Claims (10)
1. a radio-frequency identification reader/writer received signal strength detection method is characterized in that, when microcontroller was decoded to the return signal of label, peak sampling hold circuit was sampled to the peak value of the I of label return signal, Q two paths of signals and kept; After the microcontroller decoding is finished, obtain the I of peak sampling hold circuit maintenance, the reception signal peak of Q two paths of signals by ADC, and calculate the relative value of return signal power by the peak value of I, Q two paths of signals.
2. radio-frequency identification reader/writer received signal strength detection method according to claim 1, it is characterized in that, microcontroller discharges to the electric charge that stores on the peak sampling hold circuit after obtaining the reception signal peak of I that peak sampling hold circuit keeps, Q two paths of signals by ADC.
3. radio-frequency identification reader/writer received signal strength detection method according to claim 1, it is characterized in that, the step of calculating return signal power relative value comprises I, Q two paths of signals peak value is deducted the dc reference value, then ask for quadratic sum, characterize the relative value of return signal power with described quadratic sum.
4. radio-frequency identification reader/writer received signal strength detection method according to claim 1, it is characterized in that, compare measurement with standard signal source, acquisition cuicuit gain constant, described relative value obtain the absolute value of return signal power divided by the circuit gain constant.
5. radio-frequency identification reader/writer received signal strength detection method according to claim 1 is characterized in that, the sampling input point of peak sampling hold circuit is chosen in the unsaturated amplification output terminal of base band amplifying circuit.
6. radio-frequency identification reader/writer circuit for detecting intensity of received signal of realizing the described method of claim 1, it is characterized in that, comprise microprocessor, base band amplifying circuit, peak sampling hold circuit and switch discharge circuit, the output termination microprocessor of base band amplifying circuit I, Q two paths of signals, the input termination base band amplifying circuit of peak sampling hold circuit I, Q two paths of signals, two output terminals of peak sampling hold circuit connect respectively two pins of ADC of microprocessor; The switch discharge circuit connects peak sampling hold circuit, the control signal input termination microprocessor-based control signal output part of switch discharge circuit.
7. radio-frequency identification reader/writer circuit for detecting intensity of received signal according to claim 6, it is characterized in that, described peak sampling hold circuit comprises the two-way sampling hold circuit, every road sampling hold circuit comprises the first voltage follower, second voltage follower, diode and storage capacitor, in the input termination base band amplifying circuit I of the first voltage follower, the Q two paths of signals output terminal a road, the anode of the output terminating diode of the first voltage follower, the negative electrode of diode connects the first end of storage capacitor, the second end ground connection of storage capacitor; The first end of the input termination storage capacitor of second voltage follower, input pin of output termination microprocessor ADC of second voltage follower.
8. radio-frequency identification reader/writer circuit for detecting intensity of received signal according to claim 7, it is characterized in that, described switch discharge circuit comprises the two-way discharge circuit, and every road discharge circuit comprises a single-pole double-throw switch (SPDT), and the input pin of single-pole double-throw switch (SPDT) connects the first end of storage capacitor; The first output pin of single-pole double-throw switch (SPDT) is unsettled, the second output pin ground connection; The control termination of single-pole double-throw switch (SPDT) connects the microprocessor-based control signal output part.
9. radio-frequency identification reader/writer circuit for detecting intensity of received signal according to claim 8, it is characterized in that, every road sampling hold circuit comprises the first divider resistance, the second divider resistance, the 3rd divider resistance, the 4th divider resistance and current-limiting resistance, after the first divider resistance is connected in series with the second divider resistance in the described base band amplifying circuit of termination I, the Q two paths of signals output terminal a road, other end ground connection, the tie point of the first divider resistance and the second divider resistance connects the input end of the first voltage follower; The output terminal of a termination second voltage follower after the 3rd divider resistance is connected in series with the 4th divider resistance, other end ground connection, the tie point of the 3rd divider resistance and the 4th divider resistance connects input pin of described microprocessor ADC; The negative electrode of the first terminating diode of current-limiting resistance, the first end of the second termination storage capacitor.
10. radio-frequency identification reader/writer circuit for detecting intensity of received signal according to claim 9 is characterized in that, every road discharge circuit comprises discharge resistance, and the first output pin of single-pole double-throw switch (SPDT) is by discharge resistance ground connection; The input pin of single-pole double-throw switch (SPDT) connects the first end of described current-limiting resistance, connects storage capacitor by current-limiting resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210549921.4A CN103020566B (en) | 2012-12-18 | 2012-12-18 | A kind of radio-frequency identification reader/writer circuit for detecting intensity of received signal and detection method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210549921.4A CN103020566B (en) | 2012-12-18 | 2012-12-18 | A kind of radio-frequency identification reader/writer circuit for detecting intensity of received signal and detection method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103020566A true CN103020566A (en) | 2013-04-03 |
| CN103020566B CN103020566B (en) | 2016-02-17 |
Family
ID=47969160
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210549921.4A Active CN103020566B (en) | 2012-12-18 | 2012-12-18 | A kind of radio-frequency identification reader/writer circuit for detecting intensity of received signal and detection method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103020566B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105099580A (en) * | 2015-08-26 | 2015-11-25 | 北京朗波芯微技术有限公司 | Quadrature mismatch calibration system and method and radio frequency front-end chip |
| CN104113379B (en) * | 2013-04-17 | 2017-02-22 | 华为技术有限公司 | Signal intensity indicating circuit and method |
| CN113255382A (en) * | 2021-05-28 | 2021-08-13 | 卓捷创芯科技（深圳）有限公司 | Discharge control circuit and method driven by radio frequency field envelope peak detection signal |
| CN114244384A (en) * | 2021-12-20 | 2022-03-25 | 浙江嘉科电子有限公司 | Continuous wave peak value capturing circuit and method for zero intermediate frequency receiver |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1635450A1 (en) * | 2004-09-14 | 2006-03-15 | LG Electronics Inc. | Signal demodulation circuit having operational amplifier with disable function |
| CN101246540A (en) * | 2008-03-18 | 2008-08-20 | 北京大学 | Compensation process of ultra-high frequency RFID label reading device, reading device and radio frequency front end thereof |
| CN101741482A (en) * | 2009-12-07 | 2010-06-16 | 深圳市远望谷信息技术股份有限公司 | Method and circuit for detecting antenna, receiving circuit and decoding circuit |
| CN102377432A (en) * | 2010-08-27 | 2012-03-14 | 国民技术股份有限公司 | Multiplex analog-to-digital conversion device |
| CN202282326U (en) * | 2011-09-28 | 2012-06-20 | 上海大学 | Digital frequency meter applied to radio frequency multipole rod |
| CN202976107U (en) * | 2012-12-18 | 2013-06-05 | 深圳市华士精成科技有限公司 | Received signal strength indication detection circuit of radiofrequency identification reader-writer |
-
2012
- 2012-12-18 CN CN201210549921.4A patent/CN103020566B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1635450A1 (en) * | 2004-09-14 | 2006-03-15 | LG Electronics Inc. | Signal demodulation circuit having operational amplifier with disable function |
| CN101246540A (en) * | 2008-03-18 | 2008-08-20 | 北京大学 | Compensation process of ultra-high frequency RFID label reading device, reading device and radio frequency front end thereof |
| CN101741482A (en) * | 2009-12-07 | 2010-06-16 | 深圳市远望谷信息技术股份有限公司 | Method and circuit for detecting antenna, receiving circuit and decoding circuit |
| CN102377432A (en) * | 2010-08-27 | 2012-03-14 | 国民技术股份有限公司 | Multiplex analog-to-digital conversion device |
| CN202282326U (en) * | 2011-09-28 | 2012-06-20 | 上海大学 | Digital frequency meter applied to radio frequency multipole rod |
| CN202976107U (en) * | 2012-12-18 | 2013-06-05 | 深圳市华士精成科技有限公司 | Received signal strength indication detection circuit of radiofrequency identification reader-writer |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104113379B (en) * | 2013-04-17 | 2017-02-22 | 华为技术有限公司 | Signal intensity indicating circuit and method |
| CN105099580A (en) * | 2015-08-26 | 2015-11-25 | 北京朗波芯微技术有限公司 | Quadrature mismatch calibration system and method and radio frequency front-end chip |
| CN105099580B (en) * | 2015-08-26 | 2018-01-09 | 北京朗波芯微技术有限公司 | The calibration system and method for quadrature mismatch, radio frequency front end chip |
| CN113255382A (en) * | 2021-05-28 | 2021-08-13 | 卓捷创芯科技（深圳）有限公司 | Discharge control circuit and method driven by radio frequency field envelope peak detection signal |
| CN113255382B (en) * | 2021-05-28 | 2021-10-19 | 卓捷创芯科技（深圳）有限公司 | Discharge control circuit and method driven by radio frequency field envelope peak detection signal |
| CN114244384A (en) * | 2021-12-20 | 2022-03-25 | 浙江嘉科电子有限公司 | Continuous wave peak value capturing circuit and method for zero intermediate frequency receiver |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103020566B (en) | 2016-02-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103020566B (en) | A kind of radio-frequency identification reader/writer circuit for detecting intensity of received signal and detection method | |
| CN207337446U (en) | Based on collection of energy formula high sensitivity internet label | |
| CN205229440U (en) | A detecting system for detecting partial discharge detector | |
| CN107462771B (en) | A kind of phase frequency acquisition device based on double Schmidt triggers | |
| CN103822728B (en) | Radio temperature sensor chip | |
| CN202976107U (en) | Received signal strength indication detection circuit of radiofrequency identification reader-writer | |
| CN201654821U (en) | Radio frequency identification electronic tag simulator | |
| CN203025317U (en) | Contactless smart card chip test device | |
| CN205120856U (en) | Power quality monitor device of transformer substation | |
| CN109633243B (en) | Beam signal peak amplitude accurate extraction method based on multiphase sampling | |
| CN204256171U (en) | Satellite navigation source multifrequency latency measurement baseband processing circuitry | |
| CN205120032U (en) | Ultra -low power consumption does not have source structure strain monitoring device | |
| CN201966923U (en) | Signal processing unit of external field tester | |
| CN102565745A (en) | Ultra high-frequency partial discharge sensor | |
| CN203069680U (en) | Electromagnetic wave detection device | |
| CN106845600B (en) | A kind of demodulator circuit applied to ultrahigh-frequency tag | |
| CN109188074A (en) | A kind of biradical standard is mutual to examine circuit, method and electric energy computation chip | |
| CN114745241A (en) | Amplitude modulation signal demodulation device and power supply equipment | |
| KR101151127B1 (en) | Protection relay and method for automatic detection sampling rate using thereof | |
| CN105760800B (en) | A kind of data decoding circuit and data decoding method | |
| CN104426578A (en) | Transceiver | |
| CN103310170A (en) | RFID (Radio Frequency Identification Device) card reader for identifying card entrance by non-responding manner and identification method | |
| CN212060435U (en) | Detection equipment for field intensity information | |
| CN210322887U (en) | Automatic data acquisition device | |
| CN106569020A (en) | Power sensor for radio frequency power reflectometer |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |