CN201966923U - Signal processing unit of external field tester - Google Patents
Signal processing unit of external field tester Download PDFInfo
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- CN201966923U CN201966923U CN2010206873460U CN201020687346U CN201966923U CN 201966923 U CN201966923 U CN 201966923U CN 2010206873460 U CN2010206873460 U CN 2010206873460U CN 201020687346 U CN201020687346 U CN 201020687346U CN 201966923 U CN201966923 U CN 201966923U
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Abstract
The utility model relates to a signal processing unit of an external field tester, which is used for measuring signals of four devices and comprises a control module, a field programmable gate array (FPGA), an analog to digital (AD) circuit, a digital signal processing (DSP) microprocessor, an analog switch, a 10K low-pass filtering circuit, a 5K high-pass filtering circuit, a frequency modulation (FM) demodulator circuit, a 1K low-pass filtering circuit and a signal shaping circuit, wherein the analog switch is respectively connected with the 10K low-pass filtering circuit, the 5K high-pass filtering circuit, the FM demodulator circuit, the 1K low-pass filtering circuit, the AD circuit and the FPGA; the FPGA is respectively connected with the signal shaping circuit, the AD circuit, a control module and the DSP microprocessor; and the DSP microprocessor is connected with the control module. The signal processing unit has the characteristics that the unit can be applied to the four devices such as localizer/glideslope/very-high-frequency omnidirectional range/marker beacon (LOC/GS/VOR/MB). As a modular design is adopted, the performance is stable, and the field erection and the maintenance are convenient.
Description
Technical field
The utility model relates to a kind of field testing instrument signal processing unit that is used for the signal measurement of four kinds of equipment of airport navigation LOC/GS/VOR/MB.
Background technology
Data processing unit is the core cell of Radio Beacon field testing instrument, existing field testing instrument receiver can only be used for the localizer machine (LOC) of receiving instrument landing system (ILS) and the radiofrequency signal that glide path beacon machine (GS) is launched, and VHF Omnidirection range machine (VOR) and marker beacon machine (MB) equipment set up at the scene and all need to measure the outfield earth signal when safeguarding, but so the field testing instrument that does not also have these two kinds of Radio Beacon special uses at present is very not convenient.
Summary of the invention
In view of the deficiency that prior art exists, the utility model provides four kinds of shared field testing instrument of Radio Beacon of a kind of LOC/GS/VOR/MB signal processing unit.
The utility model for achieving the above object, the technical scheme of being taked is: a kind of field testing instrument signal processing unit, it is characterized in that: comprise control module, FPGA, the AD circuit, the DSP microprocessor, analog switch, the 10K low-pass filter circuit, the 5K high-pass filtering circuit, FM demodulation circuit, the 1K low-pass filter circuit, signal transformation circuit, described analog switch respectively with the 10K low-pass filter circuit, the 5K high-pass filtering circuit, the FM demodulation module, the 1K low-pass filter circuit, the AD circuit, FPGA connects, described FPGA respectively with signal transformation circuit, the AD circuit, control module, the DSP microprocessor connects, and the DSP microprocessor is connected with control module.
Characteristics of the present utility model are: this unit can be applicable in four kinds of equipment of LOC/GS/VOR/MB, owing to adopt modularized design, stable performance, the scene of being convenient to is set up and is safeguarded.
Description of drawings
Fig. 1 connects block diagram for the utility model circuit.
Fig. 2 is that the utility model control module circuit connects block diagram.
Fig. 3 is that the utility model FPGA internal circuit connects block diagram.
Embodiment
As shown in Figure 1, field testing instrument signal processing unit, comprise control module, FPGA, AD circuit, DSP microprocessor, analog switch, 10K low-pass filter circuit, 5K high-pass filtering circuit, FM demodulation circuit, 1K low-pass filter circuit, signal transformation circuit, analog switch is connected with 10K low-pass filter circuit, 5K high-pass filtering circuit, FM demodulation module, 1K low-pass filter circuit, AD circuit, FPGA respectively, FPGA is connected with signal transformation circuit, AD circuit, control module, DSP microprocessor respectively, and the DSP microprocessor is connected with control module.
As shown in Figure 2, the circuit of control module is connected to: arm processor, be connected with display module, temperature sensor, RTC clock chip, memory with RAM, button respectively.
As shown in Figure 3, the FPGA internal circuit is set to: the address decoding circuitry I is connected with the address decoding circuitry II by pushup storage I, pushup storage II, register, AD sample circuit, frequency measurement circuit respectively, the dsp bus interface is connected with the address decoding circuitry I, and the ARM interface circuit is respectively with the address decoding circuitry II, be connected with keyboard scanning circuit.
Monitor portion adopts dsp chip to adopt DFT and fft algorithm to realize computings such as DDM, SDM, and automatic gain control.Adopt FPGA to expand various sequential parallel bus interfaces, the FIFO expansion, the keyboard management, data sampling is provided with frequency, and the mos sign indicating number is measured, frequency measurement.As man-machine interface, 3.5 cun TFT LCDs are adopted in the display part with the arm7 chip, the indication of LED lamp.Adopt the three nuclear CPU designing techniques of ARM, FPGA, DSP.Serial i 2C bussing technique is adopted in memory and temperature survey.
Operation principle:
This cell operation principle is, the baseband signal of input at first selects different treatment circuits to carry out different Filtering Processing by an analog switch, its control signal is by the input information decision of arm processor according to man-machine interface, the signal of ils and mkr equipment enters analog switch after by an integrated low pass filter, the vor signal demodulates 9960hz by different low pass filters, the 30hz FM signal, the 30hz amplitude-modulated signal, sample by ad after ils and mkr device signal enter analog switching circuit with the 1020hz signal, sample frequency provides clock by fpga, fpga storage of gathering is in fifo1, and provide interrupt signal, fpga also measures the frequency signal of input, and measurement result put into register, measure after the interruption that dsp response fpga sends and the result is deposited among the fifo2 among the fpga, and interrupt signal is provided, having no progeny in the response of arm processor, reading of data shows processing from fifo2, and wherein the button decoding circuit is finished by fpga.
The Arm processor also provides storage, power management, administration of energy conservation, Clock management, functions such as serial communication.
Claims (3)
1. field testing instrument signal processing unit, it is characterized in that: comprise control module, FPGA, the AD circuit, the DSP microprocessor, analog switch, the 10K low-pass filter circuit, the 5K high-pass filtering circuit, FM demodulation circuit, the 1K low-pass filter circuit, signal transformation circuit, described analog switch respectively with the 10K low-pass filter circuit, the 5K high-pass filtering circuit, the FM demodulation module, the 1K low-pass filter circuit, the AD circuit, FPGA connects, described FPGA respectively with signal transformation circuit, the AD circuit, control module, the DSP microprocessor connects, and the DSP microprocessor is connected with control module.
2. field testing instrument signal processing unit according to claim 1, it is characterized in that: the circuit of described control module is connected to: arm processor, be connected with display module, temperature sensor, RTC clock chip, memory with RAM, button respectively.
3. field testing instrument signal processing unit according to claim 1, it is characterized in that: described FPGA internal circuit is set to: the address decoding circuitry I is connected with the address decoding circuitry II by pushup storage I, pushup storage II, register, AD sample circuit, frequency measurement circuit respectively, the dsp bus interface is connected with the address decoding circuitry I, and the ARM interface circuit is respectively with the address decoding circuitry II, be connected with keyboard scanning circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010206873460U CN201966923U (en) | 2010-12-29 | 2010-12-29 | Signal processing unit of external field tester |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010206873460U CN201966923U (en) | 2010-12-29 | 2010-12-29 | Signal processing unit of external field tester |
Publications (1)
Publication Number | Publication Date |
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CN201966923U true CN201966923U (en) | 2011-09-07 |
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Application Number | Title | Priority Date | Filing Date |
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CN2010206873460U Expired - Lifetime CN201966923U (en) | 2010-12-29 | 2010-12-29 | Signal processing unit of external field tester |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103618569A (en) * | 2013-11-25 | 2014-03-05 | 中国电子科技集团公司第四十一研究所 | Intermediate frequency processing system of vector network analyzer and method for intermediate frequency processing |
CN103645458A (en) * | 2013-12-16 | 2014-03-19 | 天津七六四通信导航技术有限公司 | Course far field monitoring equipment for instrument landing system |
CN109617627A (en) * | 2018-11-21 | 2019-04-12 | 天津七六四通信导航技术有限公司 | A kind of detection device for sampling |
-
2010
- 2010-12-29 CN CN2010206873460U patent/CN201966923U/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103618569A (en) * | 2013-11-25 | 2014-03-05 | 中国电子科技集团公司第四十一研究所 | Intermediate frequency processing system of vector network analyzer and method for intermediate frequency processing |
CN103645458A (en) * | 2013-12-16 | 2014-03-19 | 天津七六四通信导航技术有限公司 | Course far field monitoring equipment for instrument landing system |
CN109617627A (en) * | 2018-11-21 | 2019-04-12 | 天津七六四通信导航技术有限公司 | A kind of detection device for sampling |
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Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CX01 | Expiry of patent term | ||
CX01 | Expiry of patent term |
Granted publication date: 20110907 |