CN103020014A - Method for realizing FFT (Fast Fourier Transform) with high point number - Google Patents
Method for realizing FFT (Fast Fourier Transform) with high point number Download PDFInfo
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- CN103020014A CN103020014A CN2012104487845A CN201210448784A CN103020014A CN 103020014 A CN103020014 A CN 103020014A CN 2012104487845 A CN2012104487845 A CN 2012104487845A CN 201210448784 A CN201210448784 A CN 201210448784A CN 103020014 A CN103020014 A CN 103020014A
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Abstract
The invention discloses a method for realizing FFT (Fast Fourier Transform) with high point number, which is applicable to high-point number FFT circuit adopting fast continuous operation. The method comprises the steps of: according to the operation characteristics of the FFT, completing a first-stage butterfly operation simultaneously at the later stage of loading data, outputting data while conducting a last-stage butterfly operation, merging two stages of operation of the data for loading and outputting so as to shorten the operation time of each group of data; and writing a second group of data into the same storage while conducting inverted sequence output to the first group of data, and so on, cycling using a double-port storage to realize continuous operation. By applying the method, the advantages that the circuit area can be effectively reduced, and the operation speed can be increased are achieved. The method is applicable to high-point number FFT circuits requiring fast continuous operation.
Description
Technical field
The present invention relates to carry out in the communications field FFT technology of time-frequency conversion.
Background technology
Fast Fourier Transform (FFT) is as the fundamental operation of time domain and frequency domain conversion, be the prerequisite of spectrum analysis, have very widely in digital processing field such as digital communication, speech signal analysis, image processing, radar, earthquake, biomedical engineerings and use.
Traditional FFT (Fourier transform) conversion is divided into three phases, at first will input data and all deposit RAM in, carry out afterwards butterfly computations at different levels, export data after butterfly computation is all finished from RAM, the time of one group of data needs of computing is (being written into time+operation time+output time) so again.In the ultra long FFT conversion, the input and output meeting takies the plenty of time like this, and this moment, arithmetic element then was in idle condition.The fft circuit of prior art, or adopt the table tennis storer to realize consecutive operations, or after one group of data output next group data of computing again.
Therefore we need a kind of rational method, so that can shorten the operation time of FFT, and under the condition of using limited size memory, realize consecutive operations.
Summary of the invention
Technical matters to be solved by this invention is exactly to shorten operation time and reduce the method that memory area is carried out continuous FFT computing, the present invention is according to the FFT principle, by the union operation step with recycle storer, make the ultra long FFT circuit can shorten operation time and reduce memory area.
The object of the present invention is achieved like this, and it comprises step:
1. the N-n with one group of data counts according to being loaded in the storer, and N is that the FFT of one group of data operation always counts, and n is the data that are written at last in one group of data, and the value of the n that counts is N/x, and x is the butterfly computation radix;
2. with the n point data that are written at last in one group of data, directly deliver to butterfly processing element, the data that deposited in the read memory are carried out first order butterfly computation simultaneously, after the computing first order butterfly computation result are deposited back storer;
3. the first order butterfly computation result in the read memory carries out the next stage butterfly computation, and next stage butterfly computation result is deposited back storer, so carries out butterfly computation and store M-1 time, and wherein, M is log
x NSimultaneously the outside being continued to be written into next group data to storer stores;
4. when carrying out M level butterfly computation, first data in x the data of computing end are directly outputed to the outside, all the other x-1 data original positions are deposited back storer; Simultaneously, the outside being continued be written into next group data to former memory address of exporting data stores;
5. after the butterfly computation of first group of data finishes, return the processing that 1. step carries out next group data.
Wherein, the 1. the size of storer described in the step be N+m byte, wherein the value of m is the needed clock periodicity of the second level to the M-1 level butterfly computation.
Wherein, the 1. to be written into data described in the step be the positive sequence input, the 4. the data of output described in the step be backward output.
The present invention compares with background technology, has following advantage:
(1) the present invention has merged calculation step, shortens switching time with this.
(2) the present invention uses a small amount of memory buffer by the optimization data storage mode, can finish consecutive operations.
Description of drawings
Fig. 1 is the computing schematic flow sheet.
Fig. 2 is the conversion schematic diagram that different phase merges.
Fig. 3 is the whole schematic diagram that uses of storer when being written into.
The whole schematic diagram that uses of storer when Fig. 4 is output.
Embodiment
The invention provides a kind of implementation method of ultra long FFT, as shown in Figure 1.Below take 65536 FFT that adopt base 16 as example.
1. the N-n with one group of data counts according to being loaded in the storer, and N is that the FFT of one group of data operation always counts, and n is the data that are written at last in one group of data, and the value of the n that counts is N/x, and x is the butterfly computation radix;
In the example, N be 65536, x be 16, n be 4096, the 1. the step be written into 61440 data to storer.
2. with the n point data that are written at last in one group of data, directly deliver to butterfly processing element, the data that deposited in the read memory are carried out first order butterfly computation simultaneously, after the computing first order butterfly computation result are deposited back storer;
In the example, importation and first order butterfly are calculated and merge shown in Fig. 2 top is divided, and 4096 data that are written at last no longer deposit storer in, directly carry out butterfly computation.
Method for using memory such as Fig. 3, shown in Figure 4.Oblique line represents not operational data, and grid represents to carry out the data of computing, and grid representation is waited for the data of output, and each standard rectangular represents the dual-ported memory (RAM) of 1 group 4 4096x32 in four subgraphs.The using method of storer when Fig. 3 represents to be written into.When upper left little figure represented to be written into for the 1st time, front 61440 data were written into the use situation of rear RAM, and it is empty at this moment only having rear 1/4 (namely last block RAM) of the 4th group of RAM, and does not begin conversion.Upper right little figure represents to be written into the situation of 61440～65536 data, and this part data is not loaded into rear 1/4 (namely last block RAM) of the 4th group of RAM, but will directly carry out the 1st grade of conversion, and certainly, the result of conversion need to deposit this part RAM in.Lower-left, bottom right two little figure are the 2nd, 3 grade of conversion, and during this period, data are loaded among the 5th group of RAM that cushions.
3. the first order butterfly computation result in the read memory carries out the next stage butterfly computation, and next stage butterfly computation result is deposited back storer, so carries out butterfly computation and store M-1 time, and wherein, M is log
x NSimultaneously the outside being continued to be written into next group data to storer stores;
In the example, the M value be 4, the 3. the step need to carry out 2 grades of butterfly computations.
4. when carrying out M level butterfly computation, first data in x the data of computing end are directly outputed to the outside, all the other x-1 data original positions are deposited back storer; Simultaneously, the outside being continued be written into next group data to former memory address of exporting data stores;
In the example, output and afterbody butterfly are calculated and merge shown in Fig. 2 bottom is divided.The using method of storer when Fig. 4 represents to export.Upper left little figure represents no longer to deposit back behind the data operation in the 1st block RAM, and directly output is so that new data can be written into.Because this 4 blocks of data participates in computing simultaneously, so being write back raw address, the data of the 2nd, 3,4 block RAMs preserve.This 4 block RAM computing is finished needs 4096 clock period.After 4 block RAM computings were finished, the 1st block RAM was also fully empty, and other 3 block RAM has then been filled transformation results.Shown in upper right little figure.The little figure in lower-left represents the 4th grade of computing well afoot, and the computing of data is carried out simultaneously in 4 block RAMs of these computings and first group.This 4 block RAM computing is finished and is also needed 4096 clock period.After 4 block RAM computings are finished, all fill transformation results, waited for output.Shown in the little figure in bottom right.
During the 4th grade of computing, the 1st group of (in the 1st) RAM just can export data simultaneously, also can enough be written into new data.After the 4th grade of computing finished, the 1st group of RAM began pure output.After the 1st group of RAM output was complete, order was the 2nd, 3,4 group of RAM output successively.The storage unit of data output just can be written into new data.
5. after the butterfly computation of first group of data finishes, return the processing that 1. step carries out next group data.
Claims (3)
1. the implementation method of a ultra long FFT is characterized in that comprising step:
1. the N-n with one group of data counts according to being loaded in the storer, and N is that the FFT of one group of data operation always counts, and n is the data that are written at last in one group of data, and the value of the n that counts is N/x, and x is the butterfly computation radix;
2. with the n point data that are written at last in one group of data, directly deliver to butterfly processing element, the data that deposited in the read memory are carried out first order butterfly computation simultaneously, after the computing first order butterfly computation result are deposited back storer;
3. the first order butterfly computation result in the read memory carries out the next stage butterfly computation, and next stage butterfly computation result is deposited back storer, so carries out butterfly computation and store M-1 time, and wherein, M is log
x NSimultaneously the outside being continued to be written into next group data to storer stores;
4. when carrying out M level butterfly computation, first data in x the data of computing end are directly outputed to the outside, all the other x-1 data original positions are deposited back storer; Simultaneously, the outside being continued be written into next group data to former memory address of exporting data stores;
5. after the butterfly computation of first group of data finishes, return the processing that 1. step carries out next group data.
2. the implementation method of a kind of ultra long FFT according to claim 1 is characterized in that:
The size of storer is N+m byte, and wherein the value of m is the needed clock periodicity of the second level to the M-1 level butterfly computation.
3. the implementation method of a kind of ultra long FFT according to claim 1 is characterized in that:
The 1. to be written into data described in the step be the positive sequence input, the 4. the data of output described in the step be backward output.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104615582A (en) * | 2015-02-06 | 2015-05-13 | 中国人民解放军国防科学技术大学 | Large-point one-dimensional FFT vectorization calculational method for GPDSP |
| CN106649199A (en) * | 2016-12-23 | 2017-05-10 | 东华大学 | Football robot extra-large point FFT algorithm based on SMP |
| CN107391440A (en) * | 2017-07-31 | 2017-11-24 | 郑州云海信息技术有限公司 | A kind of processing unit and method of fast fourier transform algorithm output data |
| CN108776586A (en) * | 2018-05-29 | 2018-11-09 | 中国人民解放军国防科技大学 | Large-point-number FFT vectorization assembly code generation method based on GPDSP |
| CN105988973B (en) * | 2015-02-13 | 2019-04-19 | 上海澜至半导体有限公司 | Fast Fourier Transform (FFT)/Fast Fourier Transform (FFT) method and circuit |
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2012
- 2012-11-12 CN CN2012104487845A patent/CN103020014A/en active Pending
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| 李斌 等: "大点数FFT设计中提高资源利用率的方法", 《无线电工程》 * |
| 王晓君 等: "二维级联流水结构大点数FFT运算器实现研究", 《无线电工程》 * |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104615582A (en) * | 2015-02-06 | 2015-05-13 | 中国人民解放军国防科学技术大学 | Large-point one-dimensional FFT vectorization calculational method for GPDSP |
| CN104615582B (en) * | 2015-02-06 | 2018-02-02 | 中国人民解放军国防科学技术大学 | The method calculated towards GPDSP one-dimensional FFT vectorizations of counting greatly |
| CN105988973B (en) * | 2015-02-13 | 2019-04-19 | 上海澜至半导体有限公司 | Fast Fourier Transform (FFT)/Fast Fourier Transform (FFT) method and circuit |
| CN106649199A (en) * | 2016-12-23 | 2017-05-10 | 东华大学 | Football robot extra-large point FFT algorithm based on SMP |
| CN107391440A (en) * | 2017-07-31 | 2017-11-24 | 郑州云海信息技术有限公司 | A kind of processing unit and method of fast fourier transform algorithm output data |
| CN107391440B (en) * | 2017-07-31 | 2020-07-17 | 苏州浪潮智能科技有限公司 | Processing device and method for output data of fast Fourier transform algorithm |
| CN108776586A (en) * | 2018-05-29 | 2018-11-09 | 中国人民解放军国防科技大学 | Large-point-number FFT vectorization assembly code generation method based on GPDSP |
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Application publication date: 20130403 |