CN103493039B - Data processing method, data processing equipment, access device and subscriber equipment - Google Patents
Data processing method, data processing equipment, access device and subscriber equipment Download PDFInfo
- Publication number
- CN103493039B CN103493039B CN201280000317.4A CN201280000317A CN103493039B CN 103493039 B CN103493039 B CN 103493039B CN 201280000317 A CN201280000317 A CN 201280000317A CN 103493039 B CN103493039 B CN 103493039B
- Authority
- CN
- China
- Prior art keywords
- butterfly computation
- base
- data
- road
- level base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
- G06F17/141—Discrete Fourier transforms
- G06F17/142—Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
Abstract
A kind of data processing method, data processing equipment, access device and subscriber equipment.Wherein, a kind of data processing method comprises the steps that input base y butterfly computation device carries out z level base y butterfly computation, and wherein, y and z is positive integer by the data of y road pending z level base y butterfly computation；When stating z level base y butterfly computation and being afterbody base y butterfly computation, export the result data that z level base y butterfly computation obtains；When z level base y butterfly computation is not afterbody base y butterfly computation, the result data obtained by z level base y butterfly computation, input base y butterfly computation device carries out z+1 level base y butterfly computation.The technical scheme that the embodiment of the present invention provides, has utilization to reduce and data is carried out the resource consumption needed for butterfly computation.
Description
Technical field
The present invention relates to technical field of data processing, be specifically related to data processing method, data processing equipment, access device and subscriber equipment.
Background technology
At present, channel estimating in the field of communications, signal analysis and signal compare etc. in process needs to carry out data process, the method needing to apply to Fourier analysis widely, and the data after Fourier analysis are processed accordingly so that the process such as channel estimating, signal analysis is simplified.Fourier analysis can be passed through fast Fourier transform (FFT, FastFourierTransform) operation processing unit and realize, and also has similar application in other data processing field.
FFT operation processing unit in existing data handling system can be passed through many algorithms (such as base 2 butterfly computation, radix-4 butterfly computing and mixed base scheduling algorithm) and realize.But, current butterfly computation resource utilization is also relatively low, for instance 256 point data need 4 grades of radix-4 butterfly computings, then need to expend 4 set computing circuits and storage resource, and resource cost is relatively many.
Summary of the invention
The embodiment of the present invention provides a kind of data processing method, data processing equipment, access device and subscriber equipment, to reduce, data is carried out the resource consumption needed for butterfly computation.
The embodiment of the present invention provides a kind of data processing method on the one hand, it may include:
The data of y road pending z level base y butterfly computation being inputted base y butterfly computation device and carries out z level base y butterfly computation, wherein, described y and z is positive integer；
When described z level base y butterfly computation is afterbody base y butterfly computation, export the result data that described z level base y butterfly computation obtains；
When described z level base y butterfly computation is not afterbody base y butterfly computation, the result data that described z level base y butterfly computation is obtained, input described base y butterfly computation device and carry out z+1 level base y butterfly computation.
The embodiment of the present invention also provides for a kind of data processing equipment on the other hand, including:
Controller and base y butterfly computation device；
Wherein, described controller, z level base y butterfly computation is carried out for the data of y road pending z level base y butterfly computation are inputted described base y butterfly computation device, when described z level base y butterfly computation is afterbody base y butterfly computation, export the result data that described z level base y butterfly computation obtains；When described z level base y butterfly computation is not afterbody base y butterfly computation, the result data that described z level base y butterfly computation is obtained, input described base y butterfly computation device and carry out z+1 level base y butterfly computation, wherein, described y and z is positive integer.
The embodiment of the present invention also provides for a kind of access device on the other hand, disposes just like the data processing equipment described in above-described embodiment in described access device.
The embodiment of the present invention also provides for a kind of subscriber equipment on the other hand, disposes just like the data processing equipment described in above-described embodiment in described subscriber equipment.
The embodiment of the present invention also provides for a kind of computer-readable storage medium on the other hand,
Described computer-readable storage medium has program stored therein, and described program includes the part or all of step such as above-mentioned data processing method when performing.
Therefore, the embodiment of the present invention is by the data of y road pending z level base y butterfly computation, input base y butterfly computation device carries out z level base y butterfly computation, when this z level base y butterfly computation is afterbody base y butterfly computation, exports the result data that this z level base y butterfly computation obtains；When this z level base y butterfly computation is not afterbody base y butterfly computation, the result data that this z level base y butterfly computation is obtained, input this base y butterfly computation device and carry out z+1 level base y butterfly computation.Owing to base y butterfly computation device has been carried out multiplexing by this mechanism, two-stage base y butterfly computation multiplexing same base y butterfly computation device, such as the time-multiplexed base y butterfly computation device of availability data input carries out computing, so advantageously reducing the time of butterfly computation and reducing resource consumption.
Accompanying drawing explanation
In order to be illustrated more clearly that embodiment of the present invention technical scheme, the accompanying drawing used required in embodiment and description of the prior art will be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the premise not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
Fig. 1-a is a kind of base 2 butterfly computation model schematic that the embodiment of the present invention provides；
Fig. 1-b is a kind of radix-4 butterfly operational model schematic diagram that the embodiment of the present invention provides；
Fig. 2 is the configuration diagram of a kind of 4 grades of radix-4 butterfly computing circuits that the embodiment of the present invention provides；
Fig. 3 is the schematic diagram of the read-write operation of a kind of shift register；
Fig. 4 is the schematic diagram of a kind of data processing method that the embodiment of the present invention provides；
Fig. 5 is the schematic diagram of a kind of data processing equipment that the embodiment of the present invention provides；
Fig. 6 is the schematic diagram of a kind of shift register operations that the embodiment of the present invention provides；
Fig. 7-a is the schematic diagram of a kind of butterfly computation sequence arrangement that the embodiment of the present invention provides；
Fig. 7-b is the schematic diagram of the another kind of butterfly computation sequence arrangement that the embodiment of the present invention provides；
Fig. 8-a is the schematic diagram of a kind of data processing equipment that the embodiment of the present invention provides；
Fig. 8-b is the schematic diagram of the another kind of data processing equipment that the embodiment of the present invention provides；
Fig. 9 is the schematic diagram of a kind of electronic equipment that the embodiment of the present invention provides.
Detailed description of the invention
The embodiment of the present invention provides a kind of data processing method, data processing equipment, access device and subscriber equipment, to reduce, data is carried out the resource consumption needed for butterfly computation.
For making the goal of the invention of the present invention, feature, the advantage can be more obvious and understandable, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, the embodiments described below are only a part of embodiment of the present invention, and not all embodiment.Based on the embodiment in the present invention, all other embodiments that those of ordinary skill in the art obtain under not making creative work premise, broadly fall into the scope of protection of the invention.
First, FFT formula can be derived from:
Wherein, 0≤k≤N-1；
X (n) is for treating the data of FFT computing, and the FFT operation result data that x (k) is x (n), N is the counting of data treating FFT computing.
Wherein, can be obtained base 2 butterfly computation mode from above can as shown in Fig. 1-a.
It is appreciated that the FFT flowing water of 2k point data can be obtained by k level base 2 butterfly computation cascade；
Two-stage base 2 butterfly computation is equivalent to one-level radix-4 butterfly computing, and N point is inputted data and is divided into 4 parts by radix-4 butterfly computing, and the corresponding data every time taking each several part is calculated, and radix-4 butterfly computing mode can as shown in Fig. 1-b.Wherein, 4k point data carries out FFT computing, needs k level radix-4 butterfly computing cascade, for instance 256 point data FFT computings need 4 grades of radix-4 butterfly.
It it is the configuration diagram of a kind of 4 grades of radix-4 butterfly computing circuits of citing referring to Fig. 2, Fig. 2.It is typically in carrying out in radix-4 butterfly calculating process to data, assume have N point data to need to carry out radix-4 butterfly computing, and write 1 point data needs 1 clock, then 3N/4 point data is sequentially stored into three shift registers by front 3N/4 the cycle, input last N/4 point data to start, radix-4 butterfly computing circuit starts data are carried out computing, such then radix-4 butterfly computing circuit has the time of nearly 3/4 to be in idle state, calculation resources utilization rate is relatively low, such as 256 point data need 4 grades of radix-4 butterfly computings, then need to expend 4 set computing circuits and storage resource, resource cost is relatively many.
For ease of understanding the working mechanism of framework shown in Fig. 2, below to carry out one-level radix-4 butterfly calculating process, input is N point data altogether, it is assumed that each clock inputs a point data, it is necessary to N number of clock cycle；Front N/4 the clock cycle, by input data buffer storage to shift register (R0)；N/4～N/2 clock cycle, by input data buffer storage to shift register (R1)；N/2～3N/4 clock cycle, by input data buffer storage to shift register (R2)；Last N/4 the cycle, from three shift registers, read data simultaneously and be input to radix-4 butterfly with N/4 last data syn-chronization and carry out butterfly computation arithmetical unit, computing obtains N/4,4 road data simultaneously, need to continue to do the FFT computing of N/4 point, first via N/4 computing obtained is sent to rear class butterfly computation device, its excess-three road is written back in the corresponding buffer memory of butterfly computation device at the corresponding levels, after all delivering to rear class radix-4 butterfly arithmetical unit etc. N/4 data of operation result of the first via, read N/4 data from shift register-0 again and be sent to rear class radix-4 butterfly arithmetical unit, then read corresponding N/4 data from shift register-1 again and be sent to rear class radix-4 butterfly arithmetical unit, read corresponding data from shift register-2 more afterwards and be sent to rear class radix-4 butterfly arithmetical unit, by that analogy.
Do the radix-4 butterfly computing of 8 point data below for rear class, the operation of shift register can be shown such as Fig. 3.In Fig. 3 shown in P1～P6 state, A1～A8 is 8 point data, A_1～A_8 is A1～A8 data after radix-4 butterfly computing, data are sequentially stored into 3 shift registers (this sentences and is embodied as example with shift register) by front 3N/4 the cycle, rear N/4 cycle (P7, P8) completing butterfly computation, A7 and A8 does not bother to see me out shift register, but is directly sent to radix-4 butterfly arithmetical unit with the data preserved before.Send latter 3 in obtain 4 result datas back to shift register (namely backfilling, as shown in P8) after each computing, the 1st (i.e. A_1, A_2) is sent into lower 1 grade and carries out radix-4 butterfly computing (such as P9).Then take out N/4 data from 3 shift registers successively and send into next stage radix-4 butterfly internalarithmetic, now, N point input data (i.e. B1～B8, as shown in P10 and P11) of next group can be write toward shift register simultaneously.
Wherein, in Fig. 3, P1～P6 is data preparation stage, and now radix-4 butterfly is idle for arithmetical unit, and P7～P9 is the data operation stage, and P10～P11 is write back data state.The calculating process of other data counted is then by that analogy.
The scheme that the embodiment of the present invention proposes advantageously reduces and data is carried out the resource consumption needed for butterfly computation.
Below by specific embodiment, it is described in detail respectively.
One embodiment of the data processing method of the present invention, wherein, the method comprises the steps that input base y butterfly computation device carries out z level base y butterfly computation, and wherein, this y and z is positive integer by the data of y road pending z level base y butterfly computation；When this z level base y butterfly computation is afterbody base y butterfly computation, export the result data that this z level base y butterfly computation obtains；When this z level base y butterfly computation is not afterbody base y butterfly computation, the result data that this z level base y butterfly computation is obtained, input this base y butterfly computation device and carry out z+1 level base y butterfly computation.
Referring to Fig. 4, a kind of data processing method that the embodiment of the present invention provides, it may include herein below:
401, by the data of y road pending z level base y butterfly computation, input base y butterfly computation device carries out z level base y butterfly computation；
It is appreciated that y and z is positive integer.Assuming to need 256 point (44) data to carry out FFT computing, if carrying out FFT computing by base 2 butterfly computation, then y is 2, if carrying out FFT computing by radix-4 butterfly computing, then y is 4；If carrying out FFT computing by base 3 butterfly computation, then y is 3；If carrying out FFT computing by base 8 butterfly computation, then y is 8；If carrying out FFT computing by base 16 butterfly computation, then y is 16, by that analogy.
In some embodiments of the invention, for instance there is N point FFT computing, processing according to base y butterfly computation device, then need altogether to carry out M (M=logyN) level base y butterfly computation, z is less than or equal to M.General, N is 2 positive integer power herein, when the N positive integer power not being 2, N can be supplemented be 2 positive integer power, for instance 0 method of mending etc. can be passed through, the basis of original N point data is mended several 0 so that mend the data after 0 always count be 2 positive integer power.
402, when this z level base y butterfly computation is afterbody base y butterfly computation, the result data that this z level base y butterfly computation obtains is exported；When this z level base y butterfly computation is not afterbody base y butterfly computation, the result data that this z level base y butterfly computation is obtained, input this base y butterfly computation device and carry out z+1 level base y butterfly computation.
Can be seen that, by the data of y road pending z level base y butterfly computation in the present embodiment, input base y butterfly computation device carries out z level base y butterfly computation, when this z level base y butterfly computation is afterbody base y butterfly computation, exports the result data that this z level base y butterfly computation obtains；When this z level base y butterfly computation is not afterbody base y butterfly computation, the result data that this z level base y butterfly computation is obtained, input this base y butterfly computation device and carry out z+1 level base y butterfly computation.Owing to base y butterfly computation device has been carried out multiplexing by this mechanism, two-stage base y butterfly computation multiplexing same base y butterfly computation device, such as the time-multiplexed base y butterfly computation device of availability data input carries out computing, so advantageously reducing the time of butterfly computation and reducing resource consumption.
In some embodiments of the invention, it is also possible to introduce buffer and store the intermediate result data etc. of base y butterfly computation.For example, when above-mentioned z level base y butterfly computation is not afterbody base y butterfly computation, result data Zhong Mei road, the y road result data obtained of this z level base y butterfly computation can be divided into y part, and this y part is respectively written in y buffer area；Then by being respectively written into y the part that this y buffer area Zhong Gaimei road result data is divided into, as the data of y road pending z+1 level base y butterfly computation, input this base y butterfly computation device and carry out z+1 level base y butterfly computation.
Additionally, when z+1 level base y butterfly computation is last 1 grade of base y butterfly computation, the result data of exportable above-mentioned z+1 level base y butterfly computation；And when this z+1 level base y butterfly computation is not afterbody base y butterfly computation, the result data that can be obtained by this z+1 level base y butterfly computation again, inputs above-mentioned base y butterfly computation device (or other base y butterfly computation device) and carries out z+2 level base y butterfly computation.Wherein, when above-mentioned z+1 level base y butterfly computation is not afterbody base y butterfly computation, result data Zhong Mei road, the y road result data obtained of this z+1 level base y butterfly computation such as can be divided into y part, and this y part is respectively written in y buffer area；Then will be respectively written into y the part that this y buffer area Zhong Gaimei road result data is divided into, data as y road pending z+2 level base y butterfly computation, input this base y butterfly computation device and carry out z+2 level base y butterfly computation, if follow-up also need of result data carries out base y butterfly computation, can accordingly circular treatment to complete the base y butterfly computation of all levels.
Wherein, above-mentioned y buffer area can lay respectively in y buffer；Or, this y buffer area may be alternatively located at least one buffer, and wherein, this buffer such as can be selected for offset buffer (such as shift register or other offset buffer).
It is appreciated that, if also failing to obtain FFT operation result after carrying out base y butterfly computation at the corresponding levels, namely when base y butterfly computation at the corresponding levels is not afterbody base y butterfly computation, can based on above-mentioned mechanism circular treatment, read out from above-mentioned y buffer area respectively, write this y buffer area in y part being divided into of the result data Zhong Mei road result data of base y butterfly computation at the corresponding levels, by this y the data partly as the pending lower 1 grade of base y butterfly computation in y road, input this base y butterfly computation device and carry out next stage base y butterfly computation, circular treatment obtains the FFT operation result of data the most at last accordingly.
For example, so that 256 points (44 point) data are carried out FFT computing, 256 point (44) data need to carry out 4 grades of radix-4 butterfly computings.Wherein, 256 point data are carried out radix-4 butterfly computing by the 1st grade, obtain 4 groups of data of 64 point data/group；4 groups of data of 64 point data/group are carried out radix-4 butterfly computing by the 2nd grade, obtain 16 groups of data of 16 point data/group；And 16 groups of data of 16 point data/group are carried out radix-4 butterfly computing by 3rd level, obtain 64 groups of data of 4 point data/group；And 64 groups of data of 4 point data/group are carried out radix-4 butterfly computing by the 4th grade, obtain the FFT operation result of 256 point data.It is appreciated that the FFT computing mode of other data counted by that analogy.
Referring to Fig. 5, data processing operation device in Fig. 5 includes: 4 degree of depth are at least the shift register of 64 (namely at least storing 64 point data) and radix-4 butterfly arithmetical unit, after completing computing, operation result data are write back in this shift register every time, when next stage radix-4 butterfly computing starts, the data reading the radix-4 butterfly computing of pending subordinate again from this shift register carry out subordinate's radix-4 butterfly computing, until obtaining the output of FFT operation result.
In some embodiments of the invention, for instance after the data of all pending every grade of base y butterfly computations all carry out this grade of base y butterfly computation, then the next stage base y butterfly computation of the data of all pending next stage base y butterfly computations can be carried out.
For example, after carrying out the result data of the y*y road z+1 level base y butterfly computation that above-mentioned z+1 level base y butterfly computation obtains, when z+1 level base y butterfly computation is not afterbody base y butterfly computation, the result data Zhong Mei road result data of Jiang Gai y*y road z+1 level base y butterfly computation can be divided into y part, by this y the data partly as y road pending z+2 level base y butterfly computation, input above-mentioned base y butterfly computation device (or other butterfly computation device) and carry out z+2 level base y butterfly computation, such as, result data Zhong Mei road, the y*y road result data obtained of this z+1 level base y butterfly computation can be divided into y part, and this y part is respectively written in y buffer area；Then will be respectively written into y the part that this y buffer area Zhong Gaimei road result data is divided into, data as y road pending z+2 level base y butterfly computation, input this base y butterfly computation device and carry out z+2 level base y butterfly computation, if the result data of z+2 level base y butterfly computation also needs to carry out base y butterfly computation, can accordingly circular treatment to complete the base y butterfly computation of all levels, after the data of all pending every grade of base y butterfly computations all carry out this grade of base y butterfly computation, carry out the next stage base y butterfly computation of the data of all pending next stage base y butterfly computations again.
So that 256 points (44 point) data are carried out FFT computing, 256 point data need to carry out 4 grades of radix-4 butterfly computings, wherein, obtain 4 groups of data of 64 point data/group after the 1st grade of radix-4 butterfly computing completing 256 point data；Then carry out the radix-4 butterfly computing of 4 groups of data of the 2nd grade of 64 point data/group (wherein, 4 parts that often group data in 4 groups of data of 64 point data/group are divided into, 4 data partly as the pending 2nd grade of radix-4 butterfly computing in 4 roads that often group data are all divided into, input radix-4 butterfly carries out the 2nd grade of radix-4 butterfly computing arithmetical unit), obtain 16 groups of data of 16 point data/group；After the radix-4 butterfly computing of 4 groups of data of 64 point data/group all completes, then carry out the radix-4 butterfly computing of 16 groups of data of the 16 point data/group of 3rd level, obtain 64 groups of data of 4 point data/group；After the radix-4 butterfly computing of 16 groups of data of 16 point data/group all completes, then carry out the radix-4 butterfly computing of 64 groups of data of the 4 point data/group of the 4th grade, obtain the FFT operation result of 256 point data.The FFT computing mode of other data counted is by that analogy.
In other embodiments of the present invention, such as formerly the data of pending kth level (other level such as the 2nd or 3rd level or non-final 1 grade) base y butterfly computation can also be divided into several part (such as 2 parts, 3 parts or more parts), first carry out this kth level base y butterfly computation of certain part data therein, until these certain part data remain all levels base y butterfly computation all calculated after, carry out the kth level base y butterfly computation of another part of the data of pending kth level base y butterfly computation again, until the base y butterfly computation remaining all levels of these another part data has all calculated, if also having the another part data in pending kth level, carry out the kth level base y butterfly computation of a part again for the data of this pending kth level base y butterfly computation again, until the base y butterfly computation remaining all levels of these another part data has all calculated, by that analogy, it is finally completed all data all levels base y butterfly computation, obtain FFT result of calculation.
Such as, first y circuit-switched data is carried out in the y road result data that z level base y butterfly computation obtains, it is first written to y the part that every circuit-switched data on wherein m road result data (being written to the result data that the result data of y buffer area namely first calculates) of y buffer area is divided into respectively, data as y road pending z+1 level base y butterfly computation carry out z+1 level base y butterfly computation to input above-mentioned base y butterfly computation device, can obtain the result data of y*m road z+1 level base y butterfly computation；After obtaining the result data of this y*m road z+1 level base y butterfly computation, by in the result data of above-mentioned y road, after be written in the residue n road result data of this y buffer area y part being divided into respectively of every circuit-switched data, data as y road pending z+1 level base y butterfly computation, input this base y butterfly computation device and carry out z+1 level base y butterfly computation, can obtaining the result data of y*n road z+1 level base y butterfly computation, wherein above-mentioned m is less than y, and above-mentioned m and n sum is equal to y；Above-mentioned m less than or equal to or more than n.
Wherein, when z+1 level base y butterfly computation is not afterbody base y butterfly computation, in the y road result data that above-mentioned z level base y butterfly computation is obtained, after be written to y the part that residue result data Zhong Mei road, the n road result data of this y buffer area is divided into respectively, data as y road pending z+1 level base y butterfly computation, input before described base y butterfly computation device carries out z+1 level base y butterfly computation, the result data Zhong Mei road result data of y*m road z+1 level base y butterfly computation is divided into y part, by this y the data partly as y road pending z+2 level base y butterfly computation, input this base y butterfly computation device and carry out z+2 level base y butterfly computation, the result data of y*y*m road z+2 level base y butterfly computation can be obtained.
Such as, still so that 256 points (44 point) data are carried out FFT computing, 256 point data need to carry out 4 grades of radix-4 butterfly computings, wherein, obtain 4 groups of data of 64 point data/group after the 1st grade of radix-4 butterfly computing completing 256 point data；First carry out the radix-4 butterfly computing of wherein two groups of data in 4 groups of data of the 2nd grade of 64 point data/group, obtain 8 groups of data of 16 point data/group；After the radix-4 butterfly computing of 2 groups of data of 64 point data/group all completes, carry out the 3rd level radix-4 butterfly computing of 8 groups of data of 16 point data/group again, obtain 32 groups of data of 4 point data/group, then carry out the 4th grade of radix-4 butterfly computing of 32 groups of data of 4 point data/group again, obtain the FFT operation result of 128 point data；Then, the radix-4 butterfly computing of the two groups of data of residue in the 4 groups of data carrying out the 2nd grade of 64 point data/group, obtain 8 groups of data of 16 point data/group；After the radix-4 butterfly computing of 2 groups of data of residue of 64 point data/group all completes, carry out the 3rd level radix-4 butterfly computing of 8 groups of data of the 16 point data/group obtained again, obtain 32 groups of data of 4 point data/group, then carry out the 4th grade of radix-4 butterfly computing of 32 groups of data of the 4 point data/group obtained again, obtain the FFT operation result of 128 point data, so far, 256 point data need the 4 grades of radix-4 butterfly computings carried out to be fully completed.It is appreciated that the FFT computing mode of other data counted can be by that analogy.
Wherein, embodiment of the present invention scheme is in the process that the data of pending same level base y butterfly computation carry out same one-level base y butterfly computation, the data first write in buffer area first can be inputted base y butterfly computation device and carry out computing, carry out computing by inputting base y butterfly computation device after the data in rear write buffer area.
It is understood that the step in such scheme can be implemented under the control of the controller, this controller can independent of base y butterfly computation device and buffer, it is possible to its part or all of function be integrated in base y butterfly computation device and buffer.
For ease of being better understood from and implementing such scheme, the process of the radix-4 butterfly computing to carry out 256 point data is described below.
Referring to Fig. 6, in a kind of feasible embodiment, the shift register storage operation mechanism of the data processing equipment of framework shown in Fig. 5 can be as follows, wherein, mainly utilizes different buffers to carry out buffer memory for every circuit-switched data herein and is described.
First, 4 circuit-switched data inputting 64 point data/road carry out the radix-4 butterfly computing of 256 point data, obtain 4 tunnel result of calculations and deposit in (shift register R0～R3) in four shift registers respectively.
4 kinds of shadings in Fig. 6 represent 4 circuit-switched data that radix-4 butterfly computing obtains respectively.Wherein, it is divided into 4 parts of radix-4 butterfly computings carrying out next stage with 1 circuit-switched data, in order to enable the reading 4 numbers with 1 tunnel (in figure identical shading) according to carrying out radix-4 butterfly computing simultaneously, when depositing data, just the shift register storing this circuit-switched data can be switched over after often having deposited 16 data on 1 tunnel, ultimately form in low 16 addresses that front 16 data in the 1st circuit-switched data exist shift register R0, there is the 16～address, address 31 of shift register R1 in the 17th～32 data in the 1st circuit-switched data, there is the 32～address, address 47 of shift register R2 in the 33rd～48 data in the 1st circuit-switched data, there is the 48～address, address 63 of shift register R3 in the 49th～64 data in the 1st circuit-switched data；The storage mode of other circuit-switched data (in figure other shading) is by that analogy.
When needs carry out subordinate's radix-4 butterfly computing time, the part reading same shading respectively from 4 shift registers sends into radix-4 butterfly arithmetical unit, the data obtained after computing can leave the corresponding address read out in again (if shift register is sufficiently large, the data then obtained after computing also can leave other clear position in), for example, the data that 1st tunnel 64 point data obtains after carrying out radix-4 butterfly computing, still it is storable in 0～15 address location of shift register R0, 16～31 address locations of shift register R1, 32～47 address locations of shift register R2 and 48～63 address locations of shift register R3, the storage mode on other several roads is by that analogy, namely in 4 tunnels that radix-4 butterfly computing obtains, it is divided into 4 parts with the data on 1 tunnel and exists in different shift registers, to ensure that follow-up can reading out carries out subordinate's radix-4 butterfly computing simultaneously.The address storage mode of the data that the third level and fourth stage radix-4 butterfly computing obtain can by that analogy, repeat no more herein.
For obtaining as far as possible high operation efficiency, also can carry out rationally arranging cleverly to radix-4 butterfly priority of operations order.The mode of several arrangement radix-4 butterfly priority of operations order that the embodiment of the present invention provide is described below.
The premise being appreciated that rear class butterfly computation is that prime butterfly computation result obtains, it is contemplated that computing relay and control the situations such as delay, can as desired to each circuit-switched data of proper arrangement carries out the sequencing of every grade of butterfly computation.
Below so that 256 point data (44) are carried out FFT computing, the sequence arrangement that a kind of butterfly calculates is such as shown in Fig. 7-a.
1. perform the first order radix-4 butterfly computing of 256, obtain 4 circuit-switched data on 64 point data/road, need 64 clock cycle (cycle)；
2. perform the second level radix-4 butterfly computing of wherein 64 point data on 1 tunnel (such as the 1st tunnel), obtain 4 circuit-switched data on 16 point data/road, need 16 cycle；
3. perform the third level radix-4 butterfly computing of 4 circuit-switched data on above-mentioned 16 point data/road, obtain 16 circuit-switched data on 4 point data/road, need 16 cycle；
4. the radix-4 butterfly computing of above-mentioned 16 tunnel 4 point data is performed, it is necessary to 16 cycle；
So far, wherein 1 circuit-switched data of 4 circuit-switched data (64 point data/road) that the 1st grade of radix-4 butterfly computing of execution 256 obtains calculates complete.By that analogy, repeat 3 times steps 2. 3. 4., just 4 circuit-switched data that the 1st grade of radix-4 butterfly computing obtains can be obtained its excess-three road computing complete.
Assume 64 radix-4 butterfly computings, be equivalent to step in Fig. 5 2. in calculating process, inputting 4 circuit-switched data needs 16cycles, and 64 data labels such as can be as follows:
0、1、2、3、4、5、6、7、8、9、10、11、12、13、14、15
16、17、18、19、20、21、22、23、24、25、26、27、28、29、30、31
32、33、34、35、36、37、38、39、40、41、42、43、44、45、46、47
48、49、50、51、52、53、54、55、56、57、58、59、60、61、62、63
Carry out radix-4 butterfly computing and obtain the 1st circuit-switched data of 4 circuit-switched data for be such as labeled as:
A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, these 16 data need to carry out the radix-4 butterfly computing of lower 1 grade；
4 tunnels totally 16 the input data carrying out lower 1 grade of radix-4 butterfly computing are as follows:
A、B、C、D
E、F、G、H
I、J、K、L
M、N、O、P
Consider the plus-minus when carrying out butterfly computation, twiddle factor multiplication needs several clock cycle, in the radix-4 butterfly computing carrying out above-mentioned 16 point data, the data M that need to use, N, O, P is corresponding to data 12 when being carried out radix-4 butterfly computing by 64 point data, 13, 14, 15, 28, 29, 30, 31, 44, 45, 46 and 47, 60, 61, 62, 63 calculate generation, and these data just having inputted radix-4 butterfly arithmetical unit need some clock cycle (being generally higher than 4 clock cycle) just can generate operation result M, N, O, P, therefore, if reading to carry out next stage 16 bases 4 computing immediately after each 16 numbers in 4 tunnels that need of 64 butterfly computations and be likely to also not all right from shift register, because data 12, 28, 44, it's arithmetical unit have just pasted 3 clocks 60 input radix-4 butterfly, and (these 3 clocks are by 13, 14, 15 input radix-4 butterfly arithmetical units), data M is now likely to also fail to calculating and obtains and be stored in shift register, in like manner N, O, P does not now calculate complete yet.Therefore, certain delay disposal can be carried out so that carry out rear class butterfly computation desired data, obtain after corresponding prime butterfly computation and incorporate in shift register.
Below still so that 256 point data (44) are carried out FFT computing, the sequence arrangement that the another kind of butterfly that the embodiment of the present invention provides calculates is such as shown in Fig. 7-b.
(1) perform the radix-4 butterfly computing of 256 point data the 1st grade, obtain the data of the pending 2nd grade of radix-4 butterfly computing in 4 tunnels (64 point data/road)；
(2) the 2nd grade of radix-4 butterfly computing of wherein 2 tunnels (64 point data/road) data in the data of the pending 2nd grade of radix-4 butterfly computing in 4 tunnels (64 point data/road) that (1) execution step obtains, obtains the data of the pending 3rd level radix-4 butterfly computing in 8 tunnels (16 point data/road)；
(3) perform step (2) in the 3rd level radix-4 butterfly computing of wherein 4 tunnels (16 point data/road) data in the 8 pending 3rd level radix-4 butterfly operational datas in road that obtain, obtain the data of the pending 4th grade of radix-4 butterfly computing in 16 tunnels (4 point data/road)；
(4) perform the 4th grade of radix-4 butterfly computing of 16 tunnels (4 point data/road) data that (3) step obtains, obtain 64 outputs data (FFT operation result).
Wherein, (1) step performs 1 time, then performs 1 step more (2) (3) (4), then performs 1 step more (3) (4), then performs 1 step more (2) (3) (4), is then performing 1 time more (3) (4), and so far, all data all complete computing output operation result.
Step (2) in used 32 cycle, 256 point data first carrying out the wherein two-way in 4 circuit-switched data (64 point data/road) that first order radix-4 butterfly computing obtains and performs the rear class radix-4 butterfly computing of its correspondence, then the other two-way again 256 point data carried out in 4 circuit-switched data (64 point data/road) that the 1st grade of radix-4 butterfly computing obtains performs the rear class radix-4 butterfly computing of its correspondence.So, can either ensureing that the execution of the radix-4 butterfly computing of lower 1 grade is just to carry out after being stored in shift register when prime operation result, take full advantage of again the working cycle of radix-4 butterfly arithmetical unit simultaneously, decrease standby time, bigger improves operation efficiency.
It is understood that the example above is mainly to carry out what radix-4 butterfly computing was described to data, and the process that data carry out other butterfly computation can by that analogy, repeat no more herein.Controller can be utilized to control the execution of embodiment of the present invention such scheme, and this controller such as can independently be disposed and be connected with each buffer area and base y butterfly computation device, or also can be deployed directly in buffer area or base y butterfly computation device.
Therefore, by the data of y road pending z level base y butterfly computation in the present embodiment, input base y butterfly computation device carries out z level base y butterfly computation, when this z level base y butterfly computation is afterbody base y butterfly computation, exports the result data that this z level base y butterfly computation obtains；When this z level base y butterfly computation is not afterbody base y butterfly computation, the result data that this z level base y butterfly computation is obtained, input this base y butterfly computation device and carry out z+1 level base y butterfly computation.Owing to base y butterfly computation device and buffer area have been carried out multiplexing by this mechanism, two-stage base y butterfly computation multiplexing same base y butterfly computation device, such as the time-multiplexed base y butterfly computation device of availability data input carries out computing, so advantageously reducing the time of butterfly computation and reducing resource consumption.
Further, by the base y butterfly computations at different levels of ingenious arrangement data order, advantageously reduce the delay waiting time, improve operation efficiency further.
For ease of better implementing the relevant apparatus of the embodiment of the present invention, the embodiment of the present invention also provides for the relevant apparatus for implementing such scheme.
Referring to Fig. 8-a, the embodiment of the present invention provides a kind of data processing equipment 800, it may include:
Controller 810 and base y butterfly computation device 820；
Its middle controller 810, for controlling the data of y road pending z level base y butterfly computation, input base y butterfly computation device 820 carries out z level base y butterfly computation, and wherein, this y and z is positive integer；When this z level base y butterfly computation is afterbody base y butterfly computation, export the result data that this z level base y butterfly computation obtains；When this z level base y butterfly computation is not afterbody base y butterfly computation, the result data that this z level base y butterfly computation is obtained, input this base y butterfly computation device 820 and carry out z+1 level base y butterfly computation.
Referring to Fig. 8-b, in some embodiments of the invention, data processing equipment 800 may also include y buffer area 830；
Controller 810 can be further used for, z level base y butterfly computation is carried out the data of y road pending z level base y butterfly computation are inputted base y butterfly computation device 820, after obtaining the result data of y road z level base y butterfly computation, result data Zhong Mei road, the y road result data that this z level base y butterfly computation obtains is divided into y part, and this y part is respectively written in y buffer area 830.
In some embodiments of the invention, controller 810 can be specifically for, the data of y road pending z level base y butterfly computation are inputted base y butterfly computation device 820 and carries out z level base y butterfly computation, when z level base y butterfly computation is afterbody base y butterfly computation, export the result data that z level base y butterfly computation obtains；When z level base y butterfly computation is not afterbody base y butterfly computation, result data Zhong Mei road, the y road result data obtained by z level base y butterfly computation is divided into y part, and y part is respectively written in y buffer area 830, y the part that y buffer area 830 Zhong Gaimei road result data is divided into will be respectively written into, data as y road pending z+1 level base y butterfly computation, input this base y butterfly computation device 820 and carry out z+1 level base y butterfly computation, wherein, y and z is positive integer.
In some embodiments of the invention, what controller 810 such as can control formerly data by pending kth level (other level such as the 2nd or 3rd level or non-final 1 grade) base y butterfly computation is divided into several part (such as 2 parts, 3 parts or more parts), first carry out this kth level base y butterfly computation of certain part data therein, until these certain part data remain all levels base y butterfly computation all calculated after, carry out the kth level base y butterfly computation of another part of the data of pending kth level base y butterfly computation again, until the base y butterfly computation remaining all levels of these another part data has all calculated, if also having the another part data in pending kth level, carry out the kth level base y butterfly computation of a part again for the data of this pending kth level base y butterfly computation again, until the base y butterfly computation remaining all levels of these another part data has all calculated, by that analogy, it is finally completed all data all levels base y butterfly computation, obtain FFT result of calculation.
For example, controller 810 can be specifically for, the data of y road pending z level base y butterfly computation are inputted base y butterfly computation device 820 and carries out z level base y butterfly computation, when z level base y butterfly computation is afterbody base y butterfly computation, export the result data that this z level base y butterfly computation obtains；When this z level base y butterfly computation is not afterbody base y butterfly computation, result data Zhong Mei road, the y road result data that this z level base y butterfly computation obtains is divided into y part, and this y part is respectively written in y buffer area 830；First by this y road result data, it is first written to y the part that result data Zhong Mei road, the wherein m road result data of this y buffer area 830 is divided into respectively, data as y road pending z+1 level base y butterfly computation carry out z+1 level base y butterfly computation to input this base y butterfly computation device 820, obtain the result data of y*m road z+1 level base y butterfly computation；After obtaining the result data of described y*m road z+1 level base y butterfly computation, by in this y road result data, after be written to y the part that residue result data Zhong Mei road, the n road result data of this y buffer area 830 is divided into respectively, data as y road pending z+1 level base y butterfly computation, input this base y butterfly computation device 820 and carry out z+1 level base y butterfly computation, obtaining the result data of y*n road z+1 level base y butterfly computation, wherein this m is less than y, and this m and this n sum are equal to y.
In some embodiments of the invention, controller 810 can be specifically for, by in the y road result data of z level base y butterfly computation, after be written to y the part that the residue n road result data of this y buffer area 830 is divided into respectively, data as y road pending z+1 level base y butterfly computation, before input base y butterfly computation device 820 carries out z+1 level base y butterfly computation, the result data Zhong Mei road result data of Xian Jiang y*m road z+1 level base y butterfly computation is divided into y part, by this y the data partly as y road pending z+2 level base y butterfly computation, input described base y butterfly computation device 820 and carry out z+2 level base y butterfly computation, obtain the result data of y*y*m road z+2 level base y butterfly computation.
In other embodiments of the present invention, such as controller 810 can also control after the data of all pending every grade of base y butterfly computations all carry out this grade of base y butterfly computation, then carries out the next stage base y butterfly computation of the data of all pending next stage base y butterfly computations.
Such as, controller 810 can be additionally used in, after carrying out the result data of the y*y road z+1 level base y butterfly computation that z+1 level base y butterfly computation obtains, the result data Zhong Mei road result data of y*y road z+1 level base y butterfly computation is divided into y part, by this y the data partly as y road pending z+2 level base y butterfly computation, input this base y butterfly computation device 820 and carry out z+2 level base y butterfly computation.
In one embodiment of the invention, y buffer area 830 can lay respectively in y buffer；
Or, y buffer area 830 is arranged at least one buffer.
It is appreciated that controller 810 can be built in base y butterfly computation device 820, maybe can be built in buffer area 830, certainly also can be independently arranged.The function of controller 810, it is possible to all or part of be integrated in base y butterfly computation device 820 or buffer area 830 institute in both the buffers.
It is understandable that, the function of each functional module of the data processing equipment 800 of the present embodiment can implement according to the method for said method embodiment introduction, it implements the associated description that process may refer in above-described embodiment, wherein could be included for performing the electronic equipment etc. of said method embodiment, do not repeat them here.
Can be seen that, controller in the present embodiment data processing equipment 800 controls the data of y road pending z level base y butterfly computation, input base y butterfly computation device carries out z level base y butterfly computation, when this z level base y butterfly computation is afterbody base y butterfly computation, export the result data that this z level base y butterfly computation obtains；When this z level base y butterfly computation is not afterbody base y butterfly computation, the result data that this z level base y butterfly computation is obtained, input this base y butterfly computation device and carry out z+1 level base y butterfly computation.Owing to base y butterfly computation device has been carried out multiplexing by this mechanism, two-stage base y butterfly computation multiplexing same base y butterfly computation device, such as the time-multiplexed base y butterfly computation device of availability data input carries out computing, so advantageously reducing the time of butterfly computation and reducing resource consumption.
Referring to Fig. 9, the embodiment of the present invention also provides for a kind of electronic equipment 900, wherein, is deployed with data processing equipment 800 in this electronic equipment.Wherein, electronic equipment 900 can be such as access device (such as base station, access point etc.), user terminal (such as mobile phone, portable computer etc.) or other electronic equipment needing to carry out data process.
The embodiment of the present invention also provides for a kind of computer-readable storage medium, and wherein, this computer-readable storage medium can have program stored therein, and this program includes the part or all of step of the data processing method recorded in said method embodiment when performing.
It should be noted that, for aforesaid each embodiment of the method, in order to be briefly described, therefore it is all expressed as a series of combination of actions, but those skilled in the art should know, the present invention is not by the restriction of described sequence of movement, because according to the present invention, some step can adopt other orders or carry out simultaneously.Secondly, those skilled in the art also should know, embodiment described in this description belongs to preferred embodiment, necessary to involved action and the module not necessarily present invention.
In the above-described embodiments, the description of each embodiment is all emphasized particularly on different fields, certain embodiment there is no the part described in detail, it is possible to referring to the associated description of other embodiments.
To sum up, by the data of y road pending z level base y butterfly computation in the embodiment of the present invention, input base y butterfly computation device carries out z level base y butterfly computation, when this z level base y butterfly computation is afterbody base y butterfly computation, exports the result data that this z level base y butterfly computation obtains；When this z level base y butterfly computation is not afterbody base y butterfly computation, the result data that this z level base y butterfly computation is obtained, input this base y butterfly computation device and carry out z+1 level base y butterfly computation.Owing to base y butterfly computation device has been carried out multiplexing by this mechanism, two-stage base y butterfly computation multiplexing same base y butterfly computation device, such as the time-multiplexed base y butterfly computation device of availability data input carries out computing, so advantageously reducing the time of butterfly computation and reducing resource consumption.
Further, by the base y butterfly computations at different levels of ingenious arrangement data order, advantageously reduce the delay waiting time, improve operation efficiency further.
One of ordinary skill in the art will appreciate that all or part of step in the various methods of above-described embodiment can be by the hardware that program carrys out instruction relevant and completes, this program can be stored in a computer-readable recording medium, and storage medium such as may include that read only memory, random access memory, disk or CD etc..
A kind of the data processing method above embodiment of the present invention provided and relevant apparatus are described in detail, principles of the invention and embodiment are set forth by specific case used herein, and the explanation of above example is only intended to help to understand method and the core concept thereof of the present invention；Simultaneously for one of ordinary skill in the art, according to the thought of the present invention, all will change in specific embodiments and applications, to sum up, this specification content should not be construed as limitation of the present invention.
Claims (12)
1. a data processing method, it is characterised in that including:
The data of y road pending z level base y butterfly computation being inputted base y butterfly computation device and carries out z level base y butterfly computation, wherein, described y and z is positive integer；
Result data Zhong Mei road, the y road result data that described z level base y butterfly computation obtains is divided into y part, and described y part is respectively written in y buffer area；
When described z level base y butterfly computation is afterbody base y butterfly computation, export the result data that described z level base y butterfly computation obtains；
When described z level base y butterfly computation is not afterbody base y butterfly computation, the result data that described z level base y butterfly computation is obtained, input described base y butterfly computation device and carry out z+1 level base y butterfly computation；
Wherein, the described result data that described z level base y butterfly computation is obtained, input described base y butterfly computation device and carry out z+1 level base y butterfly computation, including: y the part that the described every road result data being respectively written in described y buffer area is divided into, as the data of y road pending z+1 level base y butterfly computation, input described base y butterfly computation device and carry out z+1 level base y butterfly computation；
Described y the part being divided into by the described every road result data being respectively written in described y buffer area, as the data of y road pending z+1 level base y butterfly computation, inputs described base y butterfly computation device and carries out z+1 level base y butterfly computation, including:
First by the result data of described y road, it is first written to y the part that result data Zhong Mei road, the wherein m road result data of described y buffer area is divided into respectively, data as y road pending z+1 level base y butterfly computation carry out z+1 level base y butterfly computation to input described base y butterfly computation device, obtain the result data of y*m road z+1 level base y butterfly computation；
After obtaining the result data of described y*m road z+1 level base y butterfly computation, by in the result data of described y road, after be written to y the part that residue result data Zhong Mei road, the n road result data of described y buffer area is divided into respectively, data as y road pending z+1 level base y butterfly computation, input described base y butterfly computation device and carry out z+1 level base y butterfly computation, obtain the result data of y*n road z+1 level base y butterfly computation
Wherein, described m is equal to described y less than described y, described m with described n sum.
2. method according to claim 1, it is characterised in that
Described method also includes:
When described z+1 level base y butterfly computation is afterbody base y butterfly computation, export the result data of described z+1 level base y butterfly computation；
When described z+1 level base y butterfly computation is not afterbody base y butterfly computation, the result data that described z+1 level base y butterfly computation is obtained, input described base y butterfly computation device and carry out z+2 level base y butterfly computation.
3. method according to claim 1, it is characterised in that
Described method also includes: described by the result data of described y road, after be written to y the part that residue result data Zhong Mei road, the n road result data of described y buffer area is divided into respectively, data as y road pending z+1 level base y butterfly computation, input before described base y butterfly computation device carries out z+1 level base y butterfly computation, the result data Zhong Mei road result data of y*m road z+1 level base y butterfly computation is divided into y part, by this y the data partly as y road pending z+2 level base y butterfly computation, input described base y butterfly computation device and carry out z+2 level base y butterfly computation.
4. method according to claim 1, it is characterised in that
Described m is less than or equal to described n.
5. method according to claim 1, it is characterised in that
Described method also includes:
After carrying out the result data of the y*y road z+1 level base y butterfly computation that described z+1 level base y butterfly computation obtains, the result data Zhong Mei road result data of described y*y road z+1 level base y butterfly computation is divided into y part, by this y the data partly as y road pending z+2 level base y butterfly computation, input described base y butterfly computation device and carry out z+2 level base y butterfly computation.
6. the method according to any one of claim 1-5, it is characterised in that
Described y buffer area lays respectively in y buffer；
Or, described y buffer area is arranged at least one buffer.
7. a data processing equipment, it is characterised in that including:
Controller and base y butterfly computation device；
Wherein, described controller, z level base y butterfly computation is carried out for the data of y road pending z level base y butterfly computation are inputted described base y butterfly computation device, when described z level base y butterfly computation is afterbody base y butterfly computation, export the result data that described z level base y butterfly computation obtains；When described z level base y butterfly computation is not afterbody base y butterfly computation, the result data that described z level base y butterfly computation is obtained, input described base y butterfly computation device and carry out z+1 level base y butterfly computation, wherein, described y and z is positive integer；Wherein, described data processing equipment also includes y buffer area；
Described controller is additionally operable to, after the data of y road pending z level base y butterfly computation being inputted base y butterfly computation device and carry out z level base y butterfly computation, result data Zhong Mei road, the y road result data that described z level base y butterfly computation obtains is divided into y part, and described y part is respectively written in y buffer area；
Wherein, described controller specifically for, the data of y road pending z level base y butterfly computation are inputted described base y butterfly computation device and carries out z level base y butterfly computation, when described z level base y butterfly computation is afterbody base y butterfly computation, export the result data that described z level base y butterfly computation obtains；When described z level base y butterfly computation is not afterbody base y butterfly computation, result data Zhong Mei road, the y road result data that described z level base y butterfly computation obtains is divided into y part, and described y part is respectively written in y buffer area, y the part that the described every road result data being respectively written in described y buffer area is divided into, data as y road pending z+1 level base y butterfly computation, input described base y butterfly computation device and carry out z+1 level base y butterfly computation, wherein, described y and z is positive integer；
And, described controller specifically for, the data of y road pending z level base y butterfly computation are inputted described base y butterfly computation device and carries out z level base y butterfly computation, when described z level base y butterfly computation is afterbody base y butterfly computation, export the result data that described z level base y butterfly computation obtains；When described z level base y butterfly computation is not afterbody base y butterfly computation, result data Zhong Mei road, the y road result data that described z level base y butterfly computation obtains is divided into y part, and described y part is respectively written in y buffer area；First by the result data of described y road, it is first written to y the part that result data Zhong Mei road, the wherein m road result data of described y buffer area is divided into respectively, data as y road pending z+1 level base y butterfly computation carry out z+1 level base y butterfly computation to input described base y butterfly computation device, obtain the result data of y*m road z+1 level base y butterfly computation；After obtaining the result data of described y*m road z+1 level base y butterfly computation, by in the result data of described y road, after be written to y the part that residue result data Zhong Mei road, the n road result data of described y buffer area is divided into respectively, data as y road pending z+1 level base y butterfly computation, input described base y butterfly computation device and carry out z+1 level base y butterfly computation, obtain the result data of y*n road z+1 level base y butterfly computation, wherein, described m is equal to described y less than described y, described m with described n sum.
8. data processing equipment according to claim 7, it is characterised in that
Described controller is additionally operable to, by in the result data of described y road, after be written to y the part that the residue n road result data of described y buffer area is divided into respectively, data as y road pending z+1 level base y butterfly computation, input before described base y butterfly computation device carries out z+1 level base y butterfly computation, the result data Zhong Mei road result data of y*m road z+1 level base y butterfly computation is divided into y part, by this y the data partly as y road pending z+2 level base y butterfly computation, input described base y butterfly computation device and carry out z+2 level base y butterfly computation, obtain the result data of y*y*m road z+2 level base y butterfly computation.
9. data processing equipment according to claim 7, it is characterised in that
Described controller is additionally operable to, after carrying out the result data of the y*y road z+1 level base y butterfly computation that described z+1 level base y butterfly computation obtains, the result data Zhong Mei road result data of described y*y road z+1 level base y butterfly computation is divided into y part, by this y the data partly as y road pending z+2 level base y butterfly computation, input described base y butterfly computation device and carry out z+2 level base y butterfly computation.
10. the data processing equipment according to any one of claim 7 to 9, it is characterised in that
Described y buffer area lays respectively in y buffer；
Or, described y buffer area is arranged at least one buffer.
11. an access device, it is characterised in that dispose in described access device just like the data processing equipment described in any one of claim 7 to 10.
12. a subscriber equipment, it is characterised in that dispose in described subscriber equipment just like the data processing equipment described in any one of claim 7 to 10.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2012/074911 WO2013159361A1 (en) | 2012-04-28 | 2012-04-28 | Data processing method and related device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103493039A CN103493039A (en) | 2014-01-01 |
| CN103493039B true CN103493039B (en) | 2016-06-29 |
Family
ID=49482181
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201280000317.4A Active CN103493039B (en) | 2012-04-28 | 2012-04-28 | Data processing method, data processing equipment, access device and subscriber equipment |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN103493039B (en) |
| WO (1) | WO2013159361A1 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106970895B (en) * | 2016-01-14 | 2023-10-03 | 普天信息技术有限公司 | FFT device and method based on FPGA |
| CN109117188B (en) * | 2018-08-06 | 2022-11-01 | 合肥工业大学 | Multi-path mixed-basis FFT (fast Fourier transform) reconfigurable butterfly operator |
| CN112051446A (en) * | 2020-08-18 | 2020-12-08 | 许继集团有限公司 | Mixed base FFT implementation method and device for broadband measurement of power system |
| CN113570612B (en) * | 2021-09-23 | 2021-12-17 | 苏州浪潮智能科技有限公司 | Image processing method, device and equipment |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101300572A (en) * | 2005-03-11 | 2008-11-05 | 高通股份有限公司 | Fast fourier transform twiddle multiplication |
| JP2011133957A (en) * | 2009-12-22 | 2011-07-07 | Hitachi Kokusai Electric Inc | Arithmetic device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101072218B (en) * | 2007-03-01 | 2011-11-30 | 华为技术有限公司 | FFT/IFFI paired processing system, device and method |
| CN101833540B (en) * | 2010-04-07 | 2012-06-06 | 华为技术有限公司 | Signal processing method and device |
| US20120041996A1 (en) * | 2010-08-16 | 2012-02-16 | Leanics Corporation | Parallel pipelined systems for computing the fast fourier transform |
| KR101036873B1 (en) * | 2010-09-13 | 2011-05-25 | 심흥섭 | Flag based low-complexity, expandable split radix fft system |
-
2012
- 2012-04-28 WO PCT/CN2012/074911 patent/WO2013159361A1/en active Application Filing
- 2012-04-28 CN CN201280000317.4A patent/CN103493039B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101300572A (en) * | 2005-03-11 | 2008-11-05 | 高通股份有限公司 | Fast fourier transform twiddle multiplication |
| JP2011133957A (en) * | 2009-12-22 | 2011-07-07 | Hitachi Kokusai Electric Inc | Arithmetic device |
Non-Patent Citations (1)
| Title |
|---|
| A HIGH-SPEED FFT PROCESSOR FOR OFDM SYSTEMS;Byung S.Son et al;《ISCAS 2002》;20020529;第281-284页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103493039A (en) | 2014-01-01 |
| WO2013159361A1 (en) | 2013-10-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109543832B (en) | Computing device and board card | |
| CN104915322B (en) | A kind of hardware-accelerated method of convolutional neural networks | |
| CN101290613B (en) | FFT processor data storage system and method | |
| CN109062539A (en) | Artificial intelligence process device and the method for executing the multiply-add instruction of vector using processor | |
| CN107392309A (en) | A kind of general fixed-point number neutral net convolution accelerator hardware structure based on FPGA | |
| CN100435090C (en) | Extensible high-radix Montgomery's modular multiplication algorithm and circuit structure thereof | |
| CN103226543B (en) | A kind of fft processor of pipeline organization | |
| CN103955447B (en) | FFT accelerator based on DSP chip | |
| CN103493039B (en) | Data processing method, data processing equipment, access device and subscriber equipment | |
| CN103984560A (en) | Embedded reconfigurable system based on large-scale coarseness and processing method thereof | |
| CN101083643A (en) | Low memory spending hybrid base FFT processor and its method | |
| Athalye et al. | Generic hardware architectures for sampling and resampling in particle filters | |
| CN103761068A (en) | Optimized Montgomery modular multiplication method, optimized modular square method and optimized modular multiplication hardware | |
| CN103544111B (en) | A kind of hybrid base FFT method based on real-time process | |
| US20140330880A1 (en) | Methods and devices for multi-granularity parallel fft butterfly computation | |
| CN104679670A (en) | Shared data caching structure and management method for FFT (fast Fourier transform) and FIR (finite impulse response) algorithms | |
| CN102129419B (en) | Based on the processor of fast fourier transform | |
| CN102541813B (en) | Method and corresponding device for multi-granularity parallel FFT (Fast Fourier Transform) butterfly computation | |
| EP2778948A2 (en) | FFT Accelerator | |
| CN103034621B (en) | The address mapping method of base 2 × K parallel FFT framework and system | |
| CN107357206A (en) | A kind of method, apparatus and system of the computing optimization based on FPGA boards | |
| CN101236488B (en) | Synergic distribution type processing method and device | |
| CN104951279A (en) | Vectorized Montgomery modular multiplier design method based on NEON engine | |
| CN101819608B (en) | Device and method for accelerating instruction fetch in microprocessor instruction-level random verification | |
| CN103227622A (en) | Parallel filtering method and corresponding device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |