CN102983811A - Oscillator circuit - Google Patents

Oscillator circuit Download PDF

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Publication number
CN102983811A
CN102983811A CN2012104835186A CN201210483518A CN102983811A CN 102983811 A CN102983811 A CN 102983811A CN 2012104835186 A CN2012104835186 A CN 2012104835186A CN 201210483518 A CN201210483518 A CN 201210483518A CN 102983811 A CN102983811 A CN 102983811A
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circuit
branch
oscillator signal
effect transistor
field effect
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CN2012104835186A
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CN102983811B (en
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李展
田文博
尹航
王钊
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Wuxi Vimicro Corp
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Wuxi Vimicro Corp
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Abstract

An embodiment of the invention relates to an oscillator circuit. The circuit comprises a first branch oscillator circuit, a second branch oscillator circuit and a nor gate, wherein the first branch oscillator circuit is used for generating a first branch oscillating signal; the second branch oscillator circuit is used for generating a second branch oscillating signal; and the nor gate is used for enabling the first branch oscillating signal and the second branch oscillating signal to serve as the input and output oscillating signals. According to the embodiment, two branch oscillator circuits are involved, and the oscillating signals are obtained through NOR-operation on the circuits, provided with the maximum duty cycle, and not affected by the temperature, voltage and process change of the oscillator circuit.

Description

A kind of pierce circuit
Technical field
The present invention relates to the multimedia field of oscillators, relate in particular to a kind of pierce circuit.
Background technology
Fig. 1 has shown a kind of existing pierce circuit figure.Current source I5 and field effect transistor M P1 provide bias current, by capacitor C 1 being discharged and recharged the function that can realize oscillator.Suppose that signal OSC initial value is low level, like this field effect transistor MN5 by, bias current charges to C1.This process is M N1 conducting until node voltage NODE1 is elevated to, and then node voltage NODE2 becomes low level.Then by the amplification of field effect transistor MP5 and the shaping of inverter I1~I4, signal OSC has become high level.Subsequently field effect transistor MN5 conducting, capacitor C 1 is discharged, and node voltage NODE2 becomes high level, and then OSC becomes low level.Go round and begin again like this, produced oscillator signal OSC.
Fig. 2 is the simulation result schematic diagram of the waveform of oscillator shown in Figure 1.
The shortcoming of existing scheme is that the duty ratio of oscillator signal is little, and oscillator signal is subject to the impact of oscillator temperature, voltage and manufacturing technology level.
Summary of the invention
For the problems referred to above, the embodiment of the invention proposes a kind of pierce circuit.
In first aspect, described pierce circuit comprises first branch's oscillating circuit, the second branch's oscillating circuit and NOR gate, and described first branch's oscillating circuit is for generation of first branch's oscillator signal; Described second branch's oscillating circuit is for generation of second branch's oscillator signal; Described NOR gate is used for described first branch's oscillating circuit and second branch's oscillator signal as input outputting oscillation signal.
In second aspect, described pierce circuit comprises current mirror, current source, charge-discharge circuit, the first comparison circuit, the second comparison circuit and the first logic gates and the second logic gates; Wherein, current mirror has the first branch road, the second branch road, the 3rd branch road and the 4th branch road; Be connected with current source on the first branch road; Connect charge-discharge circuit on the second branch road; Described the 3rd branch road links to each other with the first comparator, and described the 4th branch road links to each other with described the second comparator; Described charge-discharge circuit links to each other with described the first comparison circuit and described the second comparison circuit common gate; Charge-discharge circuit is to the grid voltage that changes described charge-discharge circuit, the first comparison circuit and the second comparison circuit that discharges and recharges of electric capacity, so that the first node on the first comparison circuit and the second comparison circuit break-make and described the first comparison circuit and the Section Point on the second comparison circuit overturn and produce respectively first branch's oscillator signal and second branch's oscillator signal, first branch's oscillator signal is by the output of the first logic gates; Second branch's oscillator signal is by the output of the second logic gates; The output signal control charge-discharge circuit of the first logic gates; The output signal control of the first logic gates is to the transmission of second branch's oscillator signal to the second logic gates; The 3rd logic gates is based on described first branch's oscillator signal and second branch's oscillator signal, outputting oscillation signal.
Embodiment of the invention design two-way oscillator signal, and it is carried out NOR-operation obtain oscillator signal, described oscillator signal has maximum duty cycle signal, and this signal is not subjected to temperature, voltage and the process variations influence of described pierce circuit.
Description of drawings
Fig. 1 is a kind of existing pierce circuit figure;
Fig. 2 is the simulation result schematic diagram of the waveform of oscillator shown in Figure 1;
Fig. 3 A is a kind of pierce circuit schematic diagram of the embodiment of the invention;
Fig. 3 B is the another kind of pierce circuit schematic diagram of the embodiment of the invention;
Fig. 3 C is another pierce circuit schematic diagram of the embodiment of the invention;
Fig. 3 D is another pierce circuit schematic diagram of the embodiment of the invention;
Fig. 4 is the simulation result schematic diagram of the waveform of oscillator shown in Figure 3;
Fig. 5 is the another kind of schematic diagram of the pierce circuit of the embodiment of the invention.
Embodiment
Below by drawings and Examples, the technical scheme of the embodiment of the invention is described in further detail.
Fig. 3 A is the pierce circuit schematic diagram of the embodiment of the invention.Comprise two branch's oscillating circuits among Fig. 3 A: the first vibration branch road and the second vibration branch road.Described the first vibration branch road is for generation of the first oscillator signal NODE1 of branch, and it is similar to the OSC oscillator signal among Fig. 1.Described the second vibration branch road produces the second oscillator signal NODE2.
Described the first vibration branch road comprises current source I10, resistance R 1, field effect transistor MN2, MN3, MN4, MN5, MP1, MP3, MP4, MP5, MP6, inverter I1~I4.MP1, MP3, MP4 consist of current source, and M P1 is positioned on the first branch road, and MP3 is positioned on the 3rd branch road, and MP4 is positioned on the 4th branch road.Current source I 10 is positioned on the first branch road.MN2 and MN3 common gate, and be connected on the 3rd branch road and the 4th branch road.MN3 and MN8 consist of the charge-discharge circuit to capacitor C 1.MN2 consists of comparison circuit.MP5 consists of the 5th branch road of current source, and MN4 and MN5 consist of second current source, and MP6 is the amplifying circuit of NODE3 signal, and MP5, MN4 and MN5 constitute the biasing circuit that MP6 provides bias voltage.
Described the second vibration branch road comprises current source I10, resistance R 2, field effect transistor M N1, MN6, MN7, M P1, MP2, MP7, MP8, inverter I5~I8.M N1 is connected on the second branch road of the current mirror that preamble mentions, the grid of M N1 links to each other with the grid of MN2 and MN3, and MN1 consists of comparison circuit.MP8 consists of the amplifying circuit of NODE4 signal.MN6 consists of the 3rd branch road on the current source of MN4 and MN5, and provides bias voltage for MP8.
The grid of MP7 connects the output from I3, and the drain electrode of MP7 is connected to the grid of MP8.
The output signal initial value of supposing NODE1 is low, the MN8 cut-off, and MN3 charges to C1.The charging of C1 can cause the grid voltage of MN1 and MN2 to raise, and and then with MN1 and MN2 conducting.When the On current of M N1 and MN2 increasing, to such an extent as to NODE4 and NODE3 can overturn and be dragged down.MP8 and MP6 amplify this energizing signal respectively, and output to logic gates I5-I8 and I1-I4.The output signal of NODE1 becomes when high, and the MN8 conducting to the C1 discharge, drags down the grid voltage of MN1 and MN2, turn-offs M N1 and MN2, and NODE4 and NODE3 are elevated.Thus, realized the vibration of circuit.
R2 is less than R1 in this circuit, and when signal RAMP rising became large, node voltage NODE4 at first became low level than node voltage NODE3, and then node voltage NODE2 at first becomes high level than node voltage NODE1 like this.Get the trailing edge of node voltage NODE1 and the rising edge of NODE2, by NOR gate I9, can produce maximum duty cycle signal MAX_DUTY.The effect of MP7 and MN7 is, when NODE1 becomes high level, forces at once NODE2 to become low level, so only needs NODE1 and NODE2 can produce MAX_DUTY by NOR gate I9, has simplified design.And, required resistance capacitance seldom in this circuit, area is less.
When temperature, supply voltage and technique change, the absolute change trend of node voltage NODE3 and NODE4 is consistent, but relatively changes but very little.Consequent maximum duty cycle signal MAX_DUTY does not change with temperature, supply voltage and technique change substantially.
Fig. 4 is the simulation result schematic diagram of the waveform of oscillator shown in Fig. 3 A.Simulation result shows, is 92% MAX DUTY for the duty ratio representative value, and when temperature, supply voltage and technique change, the maximum fluctuation of MAX_DUTY only is ± 1%.
Fig. 3 B is the another kind of pierce circuit schematic diagram of the embodiment of the invention.In Fig. 3 B, the first vibration branch road comprises current source I10, resistance R 1, field effect transistor MN2, MN3, MN4, MN5, MN8, M P1, MP3, MP4, MP5, MP6, inverter I1~I2, described the second vibration branch road comprises current source I 10, resistance R 2, field effect transistor MN 1, MN6, MN7, M P1, MP2, MP7, MP8, inverter I3~I4.The place that is different from Fig. 3 A is that inverter is 2.
Fig. 3 C is another pierce circuit schematic diagram of the embodiment of the invention.Among Fig. 3 C, the first vibration branch road comprises current source I10, resistance R 1, field effect transistor MN2, MN3, MN4, MN5, MN8, MP1, MP3, MP4, MP5, MP6, inverter I1~I6, described the second vibration branch road comprises current source I 10, resistance R 2, field effect transistor MN 1, MN6, MN7, MP1, MP2, MP7, MP8, inverter I7~I12.The place that is different from Fig. 3 A is that inverter is 6.
Fig. 3 D is another pierce circuit schematic diagram of the embodiment of the invention.The first vibration branch road comprises current source I 10, resistance R 1, field effect transistor M N2, MN3, MN4, MN5, MN8, MP1, MP3, MP4, MP5, MP6 among Fig. 3 D, inverter I1~I4, described the second vibration branch road comprises current source I10, resistance R 2, field effect transistor MN 1, MN6, MN7, MN9, MP1, MP2, MP7, MP8, MP9, inverter I5~I8.The place that is different from Fig. 3 A is that MP8 has adopted independent biasing circuit, and MP9 is as another branch of the current mirror of M P1-MP4, and MN6 is serially connected in this another branch, and the current mirror that MN6 and MN9 consist of provides bias voltage for MP8 thus.
Fig. 5 is the another kind of schematic diagram of the pierce circuit of the embodiment of the invention.Described pierce circuit comprises first branch's oscillating circuit, the second branch's oscillating circuit and NOR gate, and described first branch's oscillating circuit is for generation of first branch's oscillator signal; Described second branch's oscillating circuit is for generation of second branch's oscillator signal; Described NOR gate is used for described first branch's oscillating circuit and second branch's oscillator signal as input outputting oscillation signal.
Preferably, described first branch's oscillating circuit produces first branch's oscillator signal, is specially: described first branch's oscillating circuit produces first branch's oscillator signal according to first node voltage; Described second branch's oscillating circuit produces second branch's oscillator signal, is specially: described second branch's oscillating circuit produces second branch's oscillator signal according to Section Point voltage.
Preferably, first branch's oscillating circuit comprises identical constant-current source with second branch's oscillating circuit.
Preferably, the absolute change trend of described first node voltage and described Section Point voltage is consistent and relatively change very little.
The embodiment of the invention relates to two-way branch oscillating circuit and produces two-way branch oscillator signal, and it is carried out NOR-operation obtain oscillator signal, described oscillator signal has maximum duty cycle signal, and this signal is not subjected to temperature, voltage and the process variations influence of described pierce circuit.
It should be noted last that, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although with reference to preferred embodiment the present invention is had been described in detail, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and scope of technical solution of the present invention.

Claims (10)

1. a pierce circuit is characterized in that, described pierce circuit comprises first branch's oscillating circuit, the second branch's oscillating circuit and NOR gate,
Described first branch's oscillating circuit is for generation of first branch's oscillator signal;
Described second branch's oscillating circuit is for generation of second branch's oscillator signal;
Described NOR gate is used for described first branch's oscillator signal and second branch's oscillator signal as input outputting oscillation signal.
2. pierce circuit as claimed in claim 1 is characterized in that, described first branch's oscillating circuit produces first branch's oscillator signal, is specially: described first branch's oscillating circuit produces first branch's oscillator signal according to first node voltage; Described second branch's oscillating circuit produces second branch's oscillator signal, is specially: described second branch's oscillating circuit produces second branch's oscillator signal according to Section Point voltage.
3. such as the described pierce circuit of one of claim 1-2, it is characterized in that described first branch's oscillating circuit comprises identical constant-current source with second branch's oscillating circuit.
4. a pierce circuit is characterized in that, described pierce circuit comprises current mirror, current source, charge-discharge circuit, the first comparison circuit, the second comparison circuit, the first logic gates, the second logic gates and the 3rd logic gates;
Wherein, current mirror has the first branch road, the second branch road, the 3rd branch road and the 4th branch road; Be connected with current source on the first branch road; Connect charge-discharge circuit on the second branch road; Described the 3rd branch road links to each other with the first comparator, and described the 4th branch road links to each other with described the second comparator;
Described charge-discharge circuit links to each other with described the first comparison circuit and described the second comparison circuit common gate; Charge-discharge circuit is to the grid voltage that changes described charge-discharge circuit, the first comparison circuit and the second comparison circuit that discharges and recharges of electric capacity, so that the first node on the first comparison circuit and the second comparison circuit break-make and described the first comparison circuit and the Section Point on the second comparison circuit overturn and produce respectively first branch's oscillator signal and second branch's oscillator signal, first branch's oscillator signal is by the output of the first logic gates; Second branch's oscillator signal is by the output of the second logic gates;
The output signal control charge-discharge circuit of the first logic gates; The output signal control of the first logic gates is to the transmission of second branch's oscillator signal to the second logic gates;
The 3rd logic gates is based on described first branch's oscillator signal and second branch's oscillator signal, outputting oscillation signal.
5. pierce circuit as claimed in claim 4, it is characterized in that, described current mirror comprises supply power voltage input, first to fourth field effect transistor, described the first field effect transistor links to each other with described current source, described the second field effect transistor is contained in described the first branch road, described the 3rd field effect transistor is contained in described the second branch road, the grid of described first to fourth field effect transistor directly links to each other mutually, the source electrode of described first to fourth field effect transistor all directly links to each other with described supply power voltage input, and the grid of described the first field effect transistor directly links to each other with drain electrode.
6. pierce circuit as claimed in claim 4, it is characterized in that, also comprise the first amplifier circuit and/or the second amplifier circuit, the first amplifier circuit is between described the first comparison circuit and described the first logic gates, and the second amplifier circuit is between described the second comparator and described the second logic gates.
7. want 6 described pierce circuits such as right, it is characterized in that, described pierce circuit also comprises the first biasing circuit and/or the second biasing circuit, described the first biasing circuit links to each other with the first amplifier circuit, be used to described the first amplifier circuit that bias voltage is provided, described the second biasing circuit links to each other with the second amplifier circuit and is used to described the second amplifier circuit that bias voltage is provided.
8. want 7 described pierce circuits such as right, it is characterized in that, the first biasing circuit and the second biasing circuit adopt current mirror.
9. want 8 described pierce circuits such as right, it is characterized in that, the current mirror of the first biasing circuit and the second biasing circuit is same current mirror.
10. want 5 described pierce circuits such as right, it is characterized in that, the first comparison circuit is the 5th field effect transistor, and the second comparison circuit is the 6th field effect transistor; Charge-discharge circuit comprises to the 7th field effect transistor of capacitor discharge with to the 8th field effect transistor of capacitor charging; Described the 5th, six and eight field effect transistor common gates; The output signal of the first logic gates is controlled charge-discharge circuit by the grid that is connected to the 7th field effect transistor.
CN201210483518.6A 2012-11-23 2012-11-23 A kind of pierce circuit Active CN102983811B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103546121A (en) * 2013-10-28 2014-01-29 无锡中星微电子有限公司 Rc oscillator
CN113092856A (en) * 2021-03-11 2021-07-09 广芯微电子(广州)股份有限公司 Oscillator circuit for detecting LC resonance frequency

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050270093A1 (en) * 2004-05-06 2005-12-08 Nec Electronics Corporation Class D amplifier
US20060017462A1 (en) * 2004-07-07 2006-01-26 Kao Richard F C High speed integrated circuit
CN101286733A (en) * 2008-05-26 2008-10-15 北京中星微电子有限公司 An oscillator with low voltage and low power consumption
CN102394607A (en) * 2011-08-30 2012-03-28 无锡中星微电子有限公司 High-precision oscillator

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050270093A1 (en) * 2004-05-06 2005-12-08 Nec Electronics Corporation Class D amplifier
US20060017462A1 (en) * 2004-07-07 2006-01-26 Kao Richard F C High speed integrated circuit
CN101286733A (en) * 2008-05-26 2008-10-15 北京中星微电子有限公司 An oscillator with low voltage and low power consumption
CN102394607A (en) * 2011-08-30 2012-03-28 无锡中星微电子有限公司 High-precision oscillator

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103546121A (en) * 2013-10-28 2014-01-29 无锡中星微电子有限公司 Rc oscillator
CN103546121B (en) * 2013-10-28 2016-04-27 无锡中感微电子股份有限公司 Rc oscillator
CN113092856A (en) * 2021-03-11 2021-07-09 广芯微电子(广州)股份有限公司 Oscillator circuit for detecting LC resonance frequency
CN113092856B (en) * 2021-03-11 2022-01-04 广芯微电子(广州)股份有限公司 Oscillator circuit for detecting LC resonance frequency

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