CN102946503A - Implementing method of digital video data of output single-field VGA (Video Graphics Array) for simulation camera - Google Patents
Implementing method of digital video data of output single-field VGA (Video Graphics Array) for simulation camera Download PDFInfo
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- CN102946503A CN102946503A CN2012104368668A CN201210436866A CN102946503A CN 102946503 A CN102946503 A CN 102946503A CN 2012104368668 A CN2012104368668 A CN 2012104368668A CN 201210436866 A CN201210436866 A CN 201210436866A CN 102946503 A CN102946503 A CN 102946503A
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Abstract
The invention relates to an implementing method of digital video data of an output single-field VGA (Video Graphics Array) for a simulation camera, which relates to the technical field of monitoring of the simulation camera. The method comprises the steps of: configuring an output format of an analog-digital conversion chip as interlace VGA and outputting according to odd-even fields; configuring a receiving end input format of a main MCU (Microprogrammed Control Unit) as VGA; connecting a chip which combines an odd field VSYNC (Vertical Sync) and an even field VSYNC between the VSYNC of the analog-digital conversion chip and the VSYNC of the main MCU; and exchanging after receiving whole-frame video data by the main MCU. According to the implementing method of digital video data of the output single-field VGA for the simulation camera provided by the invention, the video data of a picture received by the main MCU at one time is integral, and the picture is clear.
Description
Technical field:
The present invention relates to simulate the camera head monitor technical field, relate in particular to a kind of implementation method of simulating camera outputting VGA digital of digital video data.
Background technology:
The simulation camera has the advantages such as little, easy for installation, the low price of time-delay, network are simple, uses increasingly extensive, particularly more obvious compared with the digital camera advantage in the monitoring field in people's daily life.The on-the-spot video data of monitoring often needs to send to background server to be checked for the supervision personnel, analyze, this processes and transmits with regard to the analog signal that needs main control chip will simulate camera output, main control chip such as QCOM that the market is commonly used, MTK, SAMSUNG, the MARVELL handling process is basically identical, need to convert analog video signal to digital video signal, again digital video signal is compressed into jPg format picture data (taking pictures) or encode and becomes code stream (video recording), again by being wirelessly transmitted to background server, digital video signal chip such as AK8856 that analogue video signal is converted to commonly used, TVP5150, the prices such as Vimicro 0707 are cheap, stable performance, widely adopted, the highest resolution of the signal conversion chip support that all are above-mentioned is VGA Interlaced, namely divide two (very, the idol field) outputting VGA digital video signal, main control chip commonly used is not supported this minute two transmission mode video signals, the chip internal hardware configuration determines that one of every reception (strange or idol field) video data namely stops to receive, and the total pixel that receives is 640*240.
The method of traditional solution parity field problem is to receive respectively strange or an idol video data, then two field data are overlapped into a whole field data, the most fatal problem of this solution is can't guarantee to receive strange video data to belong to same frame with an idol video data, namely belong to a certain width of cloth picture that the simulation camera collection arrives, strange video data occurring possibly receiving is to belong to the n width of cloth picture of simulating camera, an idol video data that receives belongs to the m width of cloth picture of simulating camera, n when fortune is poor, the difference of m can be very large, reason is that every reception one field data of main control chip namely stops to receive, if at this moment just running into task switches, and just switch to the next time task of receiving video data after for a long time, at this moment m is just much larger than n, software the strange of diverse two pictures that superpose, idol video is without any meaning, thereby makes main control chip can not obtain accurately the single width picture video data of VGA resolution.
Summary of the invention:
The purpose of this invention is to provide a kind of simulation camera output single game VGA digital of digital video data implementation method, its adopt between modulus conversion chip VSYNC and main MCU VSYNC, seal in monostable flipflop or d type flip flop add one with, can make main MCU can single receive the video data of view picture picture.
In order to solve the existing problem of background technology, the present invention by the following technical solutions:
Configuration modulus conversion chip output format is interlace VGA, by parity field output;
Disposing main MCU receiving terminal pattern of the input is VGA;
Between modulus conversion chip VSYNC and main MCU VSYNC, sealed in the chip that merges a strange VSYNC, an idol VSYNC effect;
Main MCU exchanges it after receiving whole frame video data.
The described chip that has sealed in the strange VSYNC of merging, an idol VSYNC effect between modulus conversion chip VSYNC and main MCU VSYNC is that monostable flipflop or d type flip flop add one and door.
The HSYNC number of each VSYNC after sealing in monostable flipflop between modulus conversion chip VSYNC and the main MCU VSYNC (rising edge begins trailing edge and finishes) has increased by one times, by being originally that 240 increase to 480, make main MCU can single receive the video data of view picture picture, thereby obtain accurately the single width picture video data of VGA resolution, and being modulus conversion chip VSYNC, common way directly links to each other with the VSYNC of MCU, the drawback of this way is to allow main MCU once receive 640*480 pixel, and can only once receive 640*240 pixel, picture is unintelligible.
Description of drawings:
The synchronization waveform figure that Fig. 1 receives for the main MCU that has not sealed in the chip that merges a strange VSYNC, an idol VSYNC effect between modulus conversion chip and main MCU;
Fig. 2 is the synchronization waveform figure that has sealed in the main MCU reception of the described chip of Fig. 1.
Embodiment:
Performing step of the present invention is as follows:
1, configuration modulus conversion chip output format is interlace VGA, and namely the VGA video data is by parity field output, and 640*240 pixel of every output exported 640*480 pixel for two altogether.
2, the main MCU receiving terminal pattern of the input of configuration is VGA, namely accepts 640*480 pixel at every turn.
3, between modulus conversion chip VSYNC and main MCU VSYNC, seal in monostable flipflop.
4, main MCU exchanges it after receiving whole frame video data.
Fig. 1 seals in the synchronization waveform figure that the front main MCU of monostable flipflop receives, Fig. 2 seals in the synchronization waveform figure that main MCU receives behind the monostable flipflop, comparison diagram 1,2 can be found out, the HSYNC number that seals in each VSYNC behind this chip (rising edge begins trailing edge and finishes) has increased by one times, by being originally 240, increase to 480, make main MCU can single receive the video data of view picture picture.
Claims (2)
1. a simulation camera output single game VGA digital of digital video data implementation method the steps include:
Configuration modulus conversion chip output format is interlace VGA, by parity field output;
Disposing main MCU receiving terminal pattern of the input is VGA;
Between modulus conversion chip VSYNC and main MCU VSYNC, sealed in the chip that merges a strange VSYNC, an idol VSYNC effect;
Main MCU exchanges it after receiving whole frame video data.
2. method according to claim 1 is characterized in that, the described chip that has sealed in the strange VSYNC of merging, an idol VSYNC effect between modulus conversion chip VSYNC and main MCU VSYNC is that monostable flipflop or d type flip flop add one and door.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012104368668A CN102946503A (en) | 2012-10-26 | 2012-10-26 | Implementing method of digital video data of output single-field VGA (Video Graphics Array) for simulation camera |
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| CN2012104368668A CN102946503A (en) | 2012-10-26 | 2012-10-26 | Implementing method of digital video data of output single-field VGA (Video Graphics Array) for simulation camera |
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| CN102946503A true CN102946503A (en) | 2013-02-27 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107071361A (en) * | 2017-04-21 | 2017-08-18 | 安徽森度科技有限公司 | A kind of mosaic screen synchronizing video data display methods |
| CN107135329A (en) * | 2017-04-21 | 2017-09-05 | 安徽森度科技有限公司 | A kind of multistage synchronization video monitoring method of mosaic screen |
| CN107155016A (en) * | 2017-03-30 | 2017-09-12 | 安徽森度科技有限公司 | Simulate camera digital of digital video data implementation method |
| CN107172319A (en) * | 2017-04-21 | 2017-09-15 | 安徽森度科技有限公司 | A kind of mosaic screen synchronization video monitoring method |
| CN108965763A (en) * | 2017-05-17 | 2018-12-07 | 索尼互动娱乐股份有限公司 | Video output device, conversion equipment, picture output method and conversion method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107155016A (en) * | 2017-03-30 | 2017-09-12 | 安徽森度科技有限公司 | Simulate camera digital of digital video data implementation method |
| CN107071361A (en) * | 2017-04-21 | 2017-08-18 | 安徽森度科技有限公司 | A kind of mosaic screen synchronizing video data display methods |
| CN107135329A (en) * | 2017-04-21 | 2017-09-05 | 安徽森度科技有限公司 | A kind of multistage synchronization video monitoring method of mosaic screen |
| CN107172319A (en) * | 2017-04-21 | 2017-09-15 | 安徽森度科技有限公司 | A kind of mosaic screen synchronization video monitoring method |
| CN108965763A (en) * | 2017-05-17 | 2018-12-07 | 索尼互动娱乐股份有限公司 | Video output device, conversion equipment, picture output method and conversion method |
| CN108965763B (en) * | 2017-05-17 | 2020-11-06 | 索尼互动娱乐股份有限公司 | Video output apparatus, video conversion apparatus, video output method, and video conversion method |
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Application publication date: 20130227 |