CN102945824B - A kind of copper interconnection method of non through hole connection - Google Patents
A kind of copper interconnection method of non through hole connection Download PDFInfo
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- CN102945824B CN102945824B CN201210436960.3A CN201210436960A CN102945824B CN 102945824 B CN102945824 B CN 102945824B CN 201210436960 A CN201210436960 A CN 201210436960A CN 102945824 B CN102945824 B CN 102945824B
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Abstract
The invention discloses a kind of copper interconnection method of non through hole connection, it includes forming lower-layer copper metal layer, and deposits a layer dielectric；Photoetching, forms photoresist masking part and unglazed photoresist masked portion；The deielectric-coating of unglazed photoresist masked portion is carved and is opened；Etching or corrosive medium film carve the lower-layer copper metal layer opened at part；Film between deposited metal；Photoetching, defines the figure for having fluted upper strata copper metal layer；Deielectric-coating at groove in above-mentioned upper copper metal layer image is carved and is opened；By deposit and electroplating technology, upper strata copper metal layer is formed in above-mentioned groove.Photoetching of the present invention and etching technics are completed in the plane, the connection of upper/lower layer metallic is realized by two-layer copper directly contact, it is to avoid the negative effect that the non-flattening characteristic of embedded structure is caused to technique, improve the controllability of technique.
Description
Technical field
Connect the present invention relates to non through hole in semiconductor integrated circuit manufacturing process technology field, more particularly to a kind of semiconductor
The copper interconnection method for connecing.
Background technology
With the progress of integrated circuit fabrication process, interconnecting parts are to chip overall performance（Including speed, area, power consumption,
Qualification rate and reliability etc.）Influence it is increasing.An important progress in interconnection technique evolution, is exactly taken with copper
For aluminium as metal connecting line.This aspect, is determined by the material property of copper, i.e. the resistivity ratio aluminium of copper is lower, and anti-electricity is moved
Move performance also more preferable.On the other hand, the mosaic technology that copper-connection is used（Also known as " Damascus " technique）Can preferably with it is super
Low k-value medium is integrated, meets the demand that technology further develops.At present, more than 90% 12 cun of integrated circuit production lines are employed
Copper wiring technique simultaneously unanimously uses mosaic texture.
The technical process of copper-connection mosaic technology includes：On established lower floor's copper metal film, deposited metal
Between film；With through hole, two reticles of metal valley, by photoetching and etching technics, upper strata gold is formed on metal interlevel film
Groove needed for category cabling, and connect the through hole of upper/lower layer metallic, referred to as dual-damascene structure（Also known as " dual damascene " structure）,
It specifically has the various implementations such as groove-priority, via-first, band hard mask；By thin-film deposition and electroplating technology, by copper
Barrier layer, copper seed layer and copper are filled into established through hole and groove；By grinding technics, will be unnecessary above interlayer film
Metal grinds off, and leaves behind the copper in groove and through hole, so as to complete last layer copper connecting lines and the connection with lower floor's copper；Repeat above-mentioned
Processing step, you can realize the superposition and interconnection of multiple layer metal.
The key of copper-connection mosaic technology is to form dual-damascene structure, and this is also the maximum difficult point of the technique.With
The diminution of line width, the process window of photoetching is very small, regardless of whether first doing through hole, still first does groove, once etching is completed, just
Pattern fluctuating can be formed so that lithographic process window further reduces and even disappears.To solve this difficult point, current dual damascene work
In skill, the main integrated approach for using includes：After first step etching, established pattern is planarized using packing material,
The step such as gluing needed for then carrying out photoetching process, exposed and developed；First step etching only covers relatively thin layer of metal firmly
Mold layer（Such as titanium nitride）Quarter opens, and still keeps flatter pattern, after second step photoetching, required groove and through hole is once carved
Erosion is completed, referred to as all-in-one etchings.The common ground of existing integrated approach is, in order to ensure the implementation of photoetching process, to pass through
Increase processing step, deposit additional materials（Such as packing material, metal hard mask layer）, and greatly improve etching technics ability（It is many
Plant film layer, the etching of various structures）, finally realize dual-damascene structure.
It can be seen that, the non-flattening characteristic of embedded structure causes certain negative shadow to technique in existing copper wiring technique
Ring, as one of those skilled in the art's technical issues that need to address.
The content of the invention
It is an object of the invention to make up above-mentioned the deficiencies in the prior art, there is provided a kind of copper-connection side of non through hole connection
Method, photoetching and etching technics complete in the plane, it is to avoid embedded structure（Groove and through hole）Non-flattening characteristic pair
The negative effect that technique is caused, can improve process controllability.
The copper interconnection method of non through hole connection of the invention, it is comprised the following steps：
Step S01, there is provided substrate, forms lower-layer copper metal layer, and one layer of Jie of deposit in the lower-layer copper metal layer for being formed
Plasma membrane；
Step S02, photoetching is carried out by photolithography plate, lower-layer copper metal layer needs is connected with upper strata copper metal layer to be formed
Logical part is sheltered with photoresist, without connect then unglazed photoresist is sheltered for part；
Step S03, by etching technics, the deielectric-coating of unglazed photoresist masked portion is carved and is opened, and then removes photoresist；
Step S04, removal deielectric-coating carves the lower-layer copper metal layer opened at part；
Step S05, film between deposited metal on the surface after above-mentioned steps treatment, and planarize；
Step S06, photoetching is carried out by photolithography plate, defines the figure for having fluted upper strata copper metal layer；
Step S07, by etching technics, the metal interlevel film at groove and Jie in the above-mentioned upper copper metal layer image of removal
Plasma membrane, exposes the lower-layer copper metal layer that needs are connected with upper strata copper metal layer, it is not necessary to left in the lower-layer copper metal layer of connection
Metal interlevel film, then removes photoresist；
Step S08, by deposit and electroplating technology, forms upper strata copper metal layer in above-mentioned groove.
Further, the lower-layer copper metal layer thickness is 100-500nm.
Further, the deielectric-coating is the vias masks layer that silicon nitride or silicon oxynitride are constituted, and its thickness is 10-50nm.
Further, photolithography plate used is non through hole photolithography plate in step S02, and lithographic line width is 20-100nm.
Further, step S03 is, by dry etching, to open deielectric-coating at quarter, and used by the dry etch process is containing C, F
Gas.It is preferred that the gas for containing C, F includes CF4、CHF3Or C4F8In one or more, and the gas also contains N2、
H2、O2Or one or more in Ar.
Further, step S04 is to etch open lower-layer copper metal layer by etching or corruption, opens the thickness of lower-layer copper metal layer at quarter
It is 10-300nm to spend, and the time of etching or corrosion is 25 seconds to 30 minutes, uses azanol class（hydroxylamine）Class has
Machine solvent.
Further, it is 100- that the metal interlevel film of deposit contains the thickness after low price permittivity material, and planarization
500nm.It is preferred that the metal interlevel film includes lower floor's low price dielectric constant material and upper strata silicon dioxide layer, the low-price electricity
The thickness of constant material layer is 50-450nm, and the thickness of the silicon dioxide layer is 50-100nm.Wherein, the low price electric constant material can
Being SiCOH.
Further, photolithography plate used is metal valley photolithography plate in step S06, and lithographic line width is 20-100nm.
Further, used by step S07 it is the gas containing C, F.It is preferred that the gas for containing C, F includes CF4、CHF3Or
C4F8In one or more, and the gas also contains N2、H2、O2Or one or more in Ar.Wherein, employed in this step
Terminal（end-point）Characterization processes, i.e., using deielectric-coating and the etching selection ratio of metal interlevel film unlike material, first etching is gone
Except metal interlevel film, detect whether to be carved into media coating, then etch removal deielectric-coating, to expose lower floor's copper gold of needs connection
Category layer；After lower-layer copper metal layer is etched into, stop etching, now, it is not necessary in the groove connected with lower-layer copper metal layer
Metal interlevel film also retains some, and thickness of its thickness substantially with the lower-layer copper metal layer removed in step S04 is equal.
Further, this method also includes step S09, by grinding technics, removes metal interlevel film top unnecessary
Copper.
Embedded structure is largely disclosed in many patent documents as traditional copper interconnection mode.The present invention is provided
It is a kind of to be totally different from embedded structure, novel copper-connection implementation method, the copper-connection side of non through hole connection of the present invention
In method, Twi-lithography and etching technics are completed in the plane, and the connection of upper/lower layer metallic is realized by two-layer copper directly contact, i.e.,
Uncorroded lower floor's copper is directly connected with upper copper, the lower floor's copper after being corroded then with upper copper by metal interlevel film realize every
From having given full play to lithographic capabilities, it is to avoid embedded structure（Groove and through hole）Non-flattening characteristic technique is caused
Negative effect, improves the controllability of technique；Meanwhile, film layer structure is simple, to etching technics without particular/special requirement, is also beneficial to reality
The micro of existing line width.
Brief description of the drawings
For that can become apparent from understanding the purpose of the present invention, feature and advantage, below with reference to accompanying drawing to preferable reality of the invention
Example is applied to be described in detail, wherein：
Fig. 1 a to Fig. 1 f are the first embodiment processing step schematic diagrames that non through hole of the present invention connects copper interconnection method.
Specific embodiment
It is respectively the first embodiment of the copper interconnection method of non through hole connection of the present invention please refer to Fig. 1 a to Fig. 1 f
Processing step schematic diagram, the present embodiment method is comprised the following steps：
Step S01, there is provided substrate, lower-layer copper metal layer, the lower-layer copper metal layer are formed on substrate according to standard technology
Including needing the first lower floor's copper metal 11 connected with upper strata copper metal layer and need not be connected with upper strata copper metal layer second
Lower floor's copper metal 12, and one layer of silicon nitride vias masks layer 2 of deposit in the lower-layer copper metal layer for being formed, wherein, lower floor's copper gold
The thickness for belonging to layer is 200nm, as shown in Figure 1a；
Step S02, photoetching is carried out by non through hole photolithography plate, and lithographic line width is 50nm, make lower-layer copper metal layer needs with
Sheltered with photoresist in first lower floor's copper metal 11 of upper strata copper metal layer connection to be formed, under the second of connection
Unglazed photoresist masked portion 121 is then formed in layer copper metal 12；
Step S03, by dry etch process, uses CF4With the mixed gas of Ar, by unglazed photoresist masked portion 121
The silicon nitride vias masks layer at place was opened at 2 quarters, then removed photoresist, as shown in Figure 1 b；
Step S04, uses hydroxylamine hydrochloride（HONH3Cl）, corroding silicon nitride vias masks layer opens the second lower floor at part 2 quarter
Copper metal 12, forms groove 122, wherein, the thickness of second lower floor's copper metal 12 is eroded for 100nm, etching time is 10 points
Clock, as illustrated in figure 1 c；
Step S05, as shown in Figure 1 d, film 3 between deposited metal on the surface after above-mentioned steps treatment, including 150nm
Lower floor's advanced low-k materials and 150nm upper strata silica（It is not shown）, then planarized with grinding technics,
Thickness after planarization is 200nm, wherein, advanced low-k materials 150nm, silica 50nm；
Step S06, photoetching is carried out by metal valley photolithography plate, and lithographic line width is 50nm, is defined and is had on fluted
The figure of layer copper metal layer；
Step S07, as shown in fig. le, by dry etch process, uses CF4With the mixed gas of Ar, by above-mentioned upper strata
Metal interlevel film 3 and silicon nitride vias masks layer in copper metal layer figure at groove was opened at 2 quarter, then removed photoresist, shape
Into the figure of upper strata copper metal layer, the figure include the first upper copper metal valley 43 for being connected with lower-layer copper metal layer and with
The disconnected second upper copper metal valley 44 of lower-layer copper metal layer；
Step S08, by deposit and electroplating technology, copper barrier layer, copper seed layer and copper is filled to having been formed on first
In layer copper metal groove 43 and the second upper copper metal valley 44, it include being connected with first lower floor's copper metal 11 first on
Layer copper metal 41 and be not attached to the second logical upper strata copper metal 42 with second lower floor's copper metal 12, the second upper strata copper metal 42 with
Second lower floor's copper metal 12 is spaced by metal interlevel film 3, as shown in Figure 1 f；
Step S09, by grinding technics, the unnecessary copper in the top of removal metal interlevel film 3, in leaving behind above-mentioned groove
Copper；
Step S10, repeat step S01 to S09, realize the superposition and interconnection of multiple layer metal copper.
Claims (16)
1. the copper interconnection method that a kind of non through hole is connected, it is characterised in that comprise the following steps：
Step S01, there is provided substrate, forms lower-layer copper metal layer, and deposit a layer dielectric in the lower-layer copper metal layer for being formed；
Wherein, the lower-layer copper metal layer is connected including needs with upper strata copper metal layer to be formed first lower floor's copper metal and do not need
The second lower floor's copper metal connected with upper strata copper metal layer；
Step S02, photoetching is carried out by photolithography plate, makes what lower-layer copper metal layer needs were connected with upper strata copper metal layer to be formed
First lower floor's copper metal top is sheltered with photoresist, without then unglazed photoresist is covered above second lower floor's copper metal of connection
Cover；
Step S03, by etching technics, the deielectric-coating of unglazed photoresist masked portion is carved and is opened, and then removes photoresist；
Step S04, removal deielectric-coating is carved and opens the second lower floor of exposed part copper metal at part；
Step S05, film between deposited metal on the surface after above-mentioned steps treatment, and planarize；
Step S06, photoetching is carried out by photolithography plate, defines the figure for having fluted upper strata copper metal layer；Wherein, with lower floor
The groove of the upper strata copper metal layer of connection corresponds to first lower floor's copper metal top；The upper strata copper metal layer not connected with lower floor
Groove corresponds to second lower floor's copper metal top；
Step S07, by etching technics, metal interlevel film and medium in the above-mentioned upper copper metal layer image of removal at groove
Film, exposes first lower floor's copper metal that needs are connected with upper strata copper metal layer, it is not necessary to stayed in second lower floor's copper metal of connection
There is metal interlevel film, then remove photoresist；
Step S08, by deposit and electroplating technology, forms upper strata copper metal layer in above-mentioned groove.
2. the copper interconnection method that non through hole according to claim 1 is connected, it is characterised in that：The lower-layer copper metal layer thickness
It is 100-500nm.
3. the copper interconnection method that non through hole according to claim 1 is connected, it is characterised in that：The deielectric-coating be silicon nitride or
The vias masks layer that silicon oxynitride is constituted, its thickness is 10-50nm.
4. the copper interconnection method that non through hole according to claim 1 is connected, it is characterised in that：Photoetching used in step S02
Plate is non through hole photolithography plate, and lithographic line width is 20-100nm.
5. the copper interconnection method that non through hole according to claim 1 is connected, it is characterised in that：Step S03 is by dry method
Etching, quarter opens deielectric-coating.
6. the copper interconnection method that non through hole according to claim 5 is connected, it is characterised in that：Used by the dry etch process
Be the gas containing C, F.
7. the copper interconnection method that non through hole according to claim 6 is connected, it is characterised in that：The gas containing C, F includes
CF4、CHF3Or C4F8In one or more, and the gas also contains N2、H2、O2Or one or more in Ar.
8. the copper interconnection method that non through hole according to claim 1 is connected, it is characterised in that：Step S04 is by etching
Or corruption etches open second lower floor's copper metal, the thickness of removal is 10-300nm, and etching or the time corroded are 25 seconds to 30 minutes.
9. the copper interconnection method that non through hole according to claim 8 is connected, it is characterised in that：The etching or etching process institute
It is azanol class organic solvent.
10. the copper interconnection method that non through hole according to claim 1 is connected, it is characterised in that：The metal interlevel film contains
Thickness after advanced low-k materials, and planarization is 100-500nm.
The copper interconnection method of 11. non through hole connections according to claim 10, it is characterised in that：The metal interlevel film includes
Lower floor's low price dielectric constant material and upper strata silicon dioxide layer, the thickness of the low price dielectric constant material is 50-450nm, should
The thickness of silicon dioxide layer is 50-100nm.
The copper interconnection method of 12. non through hole connections according to claim 11, it is characterised in that：The low price permittivity material
It is SiCOH.
The copper interconnection method of 13. non through hole connections according to claim 1, it is characterised in that：Photoetching used in step S06
Plate is metal valley photolithography plate, and lithographic line width is 20-100nm.
The copper interconnection method of 14. non through hole connections according to claim 1, it is characterised in that：Used by step S07 is to contain
The gas of C, F.
The copper interconnection method of 15. non through hole connections according to claim 14, it is characterised in that：The gas bag containing C, F
Include CF4、CHF3Or C4F8In one or more, and the gas also contains N2、H2、O2Or one or more in Ar.
The copper interconnection method of the 16. non through hole connection according to any one of claim 1 to 15, it is characterised in that：This method
Also include step S09, by grinding technics, remove the unnecessary copper in metal interlevel film top.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW441023B (en) * | 2000-03-14 | 2001-06-16 | Taiwan Semiconductor Mfg | Dual copper damascene process for reducing the number of etching |
| CN1674251A (en) * | 2004-01-12 | 2005-09-28 | 三星电子株式会社 | Method of fabricating semiconductor device and semiconductor device fabricated thereby |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW441023B (en) * | 2000-03-14 | 2001-06-16 | Taiwan Semiconductor Mfg | Dual copper damascene process for reducing the number of etching |
| CN1674251A (en) * | 2004-01-12 | 2005-09-28 | 三星电子株式会社 | Method of fabricating semiconductor device and semiconductor device fabricated thereby |
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