CN102945683B - A kind of flash operational approach of phase change memory - Google Patents
A kind of flash operational approach of phase change memory Download PDFInfo
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- CN102945683B CN102945683B CN201210436990.4A CN201210436990A CN102945683B CN 102945683 B CN102945683 B CN 102945683B CN 201210436990 A CN201210436990 A CN 201210436990A CN 102945683 B CN102945683 B CN 102945683B
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Abstract
The present invention provides the flash operational approach of a kind of phase change memory, the SET programming pulse carrying out wiping operation is followed successively by pre-programmed pulse and programming pulse, described pre-programmed pulse makes the switching threshold that phase-change memory cell surmounts phase transformation, and the retention time is less than the RESET pulse operating time of write operation.The present invention also provides for the flash operational approach of a kind of phase change memory circuit, including logic control circuit, memory cell array and drive circuit, wordline gate tube, bit line strobe pipe and the reading circuit connected with this logic control circuit respectively；When performing to wipe operation SET programming, open each path and form pre-programmed pulse, flow into bit line strobe pipe, then flow in selected phase-change memory cell, complete preprogrammed operation；Turning off big current path subsequently, selected phase-change memory cell is programmed by the programming pulse of output.The present invention effectively reduces phase-change memory cell SET programming time, thus improves phase change memory and wipe speed of operation, improves the low-resistance distribution after SET programming.
Description
Technical field
The invention belongs to micro-nano electronic technology field, relate to the programming technique of a kind of information storage unit,
Particularly relate to the flash operational approach of a kind of phase change memory and phase change memory circuitry
Flash operational approach.
Background technology
Phase transition storage (Phase Change Memory) as a new generation nonvolatile memory,
Be based on Ovshinsky late 1960s (Phys. Rev. Lett., 21,14
50～1453,1968) beginning of the seventies (Appl. Phys. Lett., 18,254～257
, 1971) and the phase-change thin film that proposes can apply to what the conception of phase change memory medium was set up
, it is the memory device of a kind of low price, stable performance.Phase transition storage can be made in silicon wafer
On sheet substrate, its critical material is recordable phase-change thin film, heating resistance material, heat insulating material
Material and extraction electrode material.
Phase transition storage is made up of with external drive circuit memory cell array, and each memory element has
Some phase-change materials store data.Depend on such as that sulfur series compound phase-change material is (such as,
GeTeAsSi, GeTe, GeSbTe(GST), GeTeBi, GeSbAg etc.), the material of this class
Material the most reversibly can change between crystalline phase and amorphous phase, Typical Representative material therein
For a kind of germanic, synthetic material (GST) of antimony, tellurium.Phase-change material is attached in circuit,
So that described memory element plays the effect of the programmable resistance of rapid translating.This can
Programming resistor can present the crystalline state (low-resistance rate) than 40 times and amorphous state (high resistant rate)
Between resistivity dynamic range also want big dynamic range, and permission can be presented each
Memory element carries out the intermediate state of many storages.Storage data in the memory unit are by surveying
Amount cell resistance rate reads.
The crystalline phase of material is by providing energy to change, and the crystalline phase change of material is by the accumulation of energy
With the speed two cooled down because usually determining.Cooling down rapidly after material melts can be by material
It is changed into amorphous state by crystalline state, and in the case of annealing, material can be converted into crystalline substance by amorphous state
State, can realize two-value record according to this reversible transformational relation.Phase-change memory cell programs
Conventional art be: apply on phase-change memory cell the height potential pulse the most different with width or
Current pulse signal makes phase-change material occur reversible transition to change between amorphous state and polycrystalline state
Its resistance sizes, by low-resistance when high resistant during resolution amorphous state and polycrystalline state, it is possible to achieve
The write of information, erasing and read operation.Fig. 1 shows the biography being programmed phase transition storage
System pulse train.Low-resistance to be realized, to the change of high resistant, i.e. write operation, needs to apply a width
Spend higher and that the time is shorter RESET rectangular pulse so that the phase-change material in memory element is rapid
Exceeded threshold switchs, and material temperature is increased to more than fusion temperature, the most quickly removes pulse letter
Number, material is cooled down rapidly, makes the long-range order of polycrystalline be destroyed, thus realize by polycrystalline
To the conversion of amorphous, material is made to be maintained at amorphous state.High resistant to be realized is to the change of low-resistance, i.e.
Wipe operation, need to apply a SET rectangular pulse that amplitude is medium and the time is longer, sulfur system chemical combination
The temperature of thing is increased to crystallization temperature temperature melt above
Below degree, keep the regular hour so that phase-change memory cell is in the condition more than switching threshold
Starting nucleus growth afterwards, after removing pulse, resistance keeps low resistance state.The amplitude of SET operation is little
In the amplitude of RESET operation, to prevent phase-change memory cell to be converted to amorphous state.In general,
Due to by manufacturing process, the impact of the factors such as ambient temperature and the initial resistance of phase-change memory cell
, needed for tens nanoseconds to a few phase-change memory cell write operation (RESET) in phase transition storage
The electric current heat time heating time of hundred nanoseconds, and carry out the phase-change memory cell in phase transition storage wiping behaviour
Make (SET) and need the electric current heat time heating time of hundreds of nanosecond to several milliseconds.Owing to SET programs far away
More than RESET programming time, so the program speed of phase transition storage is mainly by SET programming time
Determine.Reduce SET programming time significant to improving phase transition storage speed.
Owing to the actual temperature of the phase-change material in phase-change memory cell between the various elements can be variant
, the material that this species diversity can be not intended in one or more unit of chien shih device is plus tradition SE
Fusion temperature T is reached during T pulsem, thus cause these unit to be maintained at high-impedance state.For avoiding this
Individual problem, traditional programming technique uses the SET pulse that amplitude is less to carry out wiping operation, to ensure
SET pulse adds when putting phase-change memory cell, and phase-change material is not reaching to fusion temperature Tm.This side
Method makes the SET operation time be far longer than the RESET operation time.Additionally, memory element can be deposited
There is stable state to be substantially less than the unit of optimum temperature, this reduces SET and RES in memory element
ET distribution of resistance scope.
Owing to phase change resistor exists OTS effect, when voltage is added in phase-change memory cell, when voltage is higher than
Certain switching threshold, the resistivity of phase-change memory cell can decline suddenly, but now phase change resistor
Not by actual program, if removing voltage, phase change resistor can come back to original resistance.
Phase-change memory cell, during changing to low resistance state from high-impedance state, needs first to surmount material
Switching threshold, enter programmed state.Traditional SET operation is the rectangular pulse applying lower-magnitude
Signal, on phase-change memory cell, needs the long period to enter and reaches to surmount switching threshold
Energy, this part-time is added with the crystallization sensitive time after entrance programmed state, constitutes SE
T wipes the All Time of operation.Obviously, the pulse signal of this lower-magnitude slow down phase change memory
Unit enters the time of programmed state.
Summary of the invention
The shortcoming of prior art in view of the above, it is an object of the invention to provide a kind of phase change memory
Flash operational approach and the flash operational approach of a kind of phase change memory circuit, use
In reducing phase-change memory cell SET programming time, thus improve phase change memory and wipe speed of operation, change
Low-resistance distribution after kind SET programming.
For achieving the above object and other relevant purposes, the present invention provides the quick wiping of a kind of phase change memory
Write operation method, the SET programming pulse carrying out wiping operation is followed successively by pre-programmed pulse and programming pulse
, described pre-programmed pulse makes to surmount in phase-change memory cell the switching threshold of phase transformation, during holding
Between less than RESET pulse operating time of write operation so that memory element can rapidly enter programming
State, so programming pulse complete wipe operation.
Preferably, described pre-programmed pulse amplitude is suitable with RESET programming pulse amplitude.
Preferably, described SET programming pulse is formed by double square pulse combined.
Preferably, the pulsewidth of described pre-programmed pulse is 10ns to 100ns, and pulsewidth is at about 30ns
Good.
Preferably, described programming pulse is to be made up of the pulse of rate of decay trailing edge.
Preferably, the rate of decay having the pulse of rate of decay trailing edge described in includes multinomial, logarithm
Formula and exponential form etc..
The present invention also provides for the flash operational approach of a kind of phase change memory circuit, described flash
Operation phase change memory circuit include logic control circuit, memory cell array and respectively with this
Drive circuit, wordline gate tube, bit line strobe pipe and the reading circuit of logic control circuit connection；
Described wordline gate tube connects with memory cell array respectively with bit line strobe pipe；Described reading circuit
Connect with bit line strobe pipe；If described drive circuit includes that the main line size that provided by current mirror is not
Same current impulse；Described Logic control module controls switch and the ON time of each path；When
When performing to wipe operation SET programming, open each path and form pre-programmed pulse, flow into bit line strobe pipe
, then flow in selected phase-change memory cell, complete preprogrammed operation；Turn off big electric current subsequently
Path, selected phase-change memory cell is programmed by the programming pulse of output, described pre-programmed arteries and veins
Punching makes phase-change memory cell surmount the switching threshold of phase transformation, and the retention time is less than the RE of write operation
The SET pulse operating time.
Preferably, when carrying out SET programming, pre-programmed pulse amplitude is suitable with RESET pulse amplitude, its
Pulsewidth is 10ns to 100ns, and pulsewidth is optimal at about 30ns.
Preferably, after completing preprogrammed operation, turn off all current paths successively so that it is formed
There is the pulse of stepped trailing edge.
Preferably, described wordline gate tube and bit line strobe pipe are selected from metal-oxide-semiconductor, audion or diode.
As it has been described above, the flash operational approach of a kind of phase change memory of the present invention and a kind of phase transformation
The flash operational approach of storage circuit, has the advantages that
The present invention is applying before common SET pulse, first apply one significantly, the pre-programmed of short time
Pulse so that all phase-change memory cells all surmount the switching threshold of phase transformation, rapidly enter programming
State, can just complete the high resistant transformation to low-resistance with after-applied programming pulse with the short period,
And there is more excellent low-resistance distribution.
Accompanying drawing explanation
Fig. 1 is shown as the tradition for being programmed conventional phase change memory of the prior art and wipes operation
Impulse wave schematic diagram.
Fig. 2 is shown as the double square SET pulse ripple schematic diagram wiping operation of the phase change memory of the present invention.
Fig. 3 is shown as the SET arteries and veins with rate of decay trailing edge wiping operation of the phase change memory of the present invention
Rush ripple schematic diagram.
Fig. 4 is shown as the flash phase change memory circuitry block diagram of the present invention.
Detailed description of the invention
Below by way of specific instantiation, embodiments of the present invention being described, those skilled in the art can
Other advantages and effect of the present invention is understood easily by the content disclosed by this specification.This
Bright can also be carried out by the most different detailed description of the invention or apply, in this specification
Every details can also be based on different viewpoints and application, under the spirit without departing from the present invention
Carry out various modification or change.
Owing to phase change resistor exists OTS effect, when pulse is added in phase change resistor unit, when voltage is higher than
Certain switching threshold, the resistivity of phase change resistor unit can decline suddenly, but now phase change resistor
Not by actual program, if removing voltage, phase change resistor can come back to original resistance,
Pulse operation after exceeded threshold voltage is only real programming pulse, and we will be used for surpassing
The more pulse of threshold value is referred to as pre-programmed pulse.
Two parts can be divided into for phase transition storage carries out wiping the SET pulse of operation, pre-programmed pulse with
Programming pulse.First it is to apply a pre-programmed pulse: its pulse amplitude and RESET pulse amplitude
Quite and the retention time was about for tens nanoseconds, less than the RESET operation time so that device cell
In phase-change material can surmount rapidly switching threshold in a short time, enter programmed state.Then by SE
T pulse is changed into programming pulse: its amplitude is relatively low, and keeps certain time, makes device cell reach
To crystallization temperature ToptNeighbouring temperature, and during this period of time there is preferably crystallization, phase transformation list
Unit is changed into low resistance state.
It is known that the key character of RESET write operation is, apply a high-amplitude pulse signal,
First storage material reaches to surmount switching threshold, after entering RESET programmed state, removes rapidly arteries and veins
Rush signal and memory element can be maintained at amorphous state, as shown in RESET programming pulse in Fig. 1.Institute
With, when the initial amplitude of SET pulse is more than tradition SET pulse, memorizer can reach temperature Tm
On, surmount switching threshold, enter programmed state, but owing to the SET pulse of this high-amplitude is protected
The time of holding just corresponds to phase change cells and surmounts the time of switching threshold, and its follow-up pulse amplitude declines
It is kept to relatively low pulse amplitude so that phase-change material temperature is reduced to crystallization temperature ToptNear, directly
Enter SET programming state.
As a preferred embodiment of the present invention, described SET programming pulse is formed by double square pulse combined
, as shown in Figure 2.Pulse 1 is pre-programmed pulse, and its amplitude is suitable with RESET pulse, and electric current reaches
To I1, the time at about 30ns, less than the RESET write operation time so that phase-change memory cell surpass
More switching threshold, enters programmed state.Pulse 2 is programming pulse: its pulse amplitude and tradition SET
Pulse amplitude is suitable, and electric current is about I2, owing to having surmounted switching threshold, its time will be the least
Tradition SET heat time heating time.Two-way pulse is applied on phase-change memory cell, constitutes dipulse
Quick SET wipe operation.
As the another kind of preferred version of the present invention, described SET programming pulse by pre-programmed pulse with have
The programming pulse composition of the trailing edge of variable slope, as shown in Figure 3.Apply pre-programmed pulse it
After, phase change cells quickly surmounts switching threshold, enters programmed state, applies trailing edge and has variable
The programming pulse of slope so that the crystallization temperature excursion of memory element increases, electric current width
Degree can produce crystallization temperature T in phase change cells as much as possibleopt, in order to provide for these unit
Optimum SET operation distribution of resistance.Wherein, the slope rate of decay of trailing edge portion can include, many
Item formula, logarithmic, exponential form etc..
The speed of current phase transition storage write operation (i.e. RESET programming process) about in tens nanoseconds to several
In hundred nano-seconds, and wipe the speed of operation (i.e. SET programming process) about at millisecond magnitude, R
ESET Yu SET programming process is required for first surmounting the switching threshold of phase-change memory cell, enters back into
Programming state.If phase-change memory cell can be made rapidly to surmount its switch in SET programming process
Threshold value, can promote the wiping operating time, the program speed of phase transition storage will be substantially improved.
In one embodiment, the SET pulse operated for phase transition storage carries out wiping is divided into two parts
, pre-programmed pulse and programming pulse.First it is to apply a pre-programmed pulse: its pulse amplitude
With RESET pulse amplitude quite, and pulsewidth is about between 10ns ~ 100ns, preferably about 30ns,
Less than the RESET operation time so that the phase-change material in memory element can surmount rapidly in a short time
Switching threshold, enters programmed state.Then SET pulse is changed into programming pulse: its amplitude is relatively low
, and keep certain time, make memory element reach the temperature near crystallization temperature Topt, and
Preferably crystallization occurs in during this period of time, and phase-change memory cell is changed into low resistance state.
Refer to Fig. 1 to Fig. 4.It should be noted that the diagram provided in the present embodiment is only with signal
Mode illustrates the basic conception of the present invention, the most graphic in assembly that only display is relevant with the present invention
Rather than component count, shape and size when implementing according to reality is drawn, each during its actual enforcement
The kenel of assembly, quantity and ratio can be a kind of random change, and its assembly layout kenel is also
It is likely more complexity.
Embodiment 1
Fig. 4 show the flash phase change memory circuit block diagram of the present invention, including drive circuit, deposits
Storage array, decoding circuit and reading circuit.Wherein, drive circuit provides for phase-change memory cell and compiles
Journey operates.Storage array is in series with gate tube by phase-change memory cell, and wherein gate tube can
To be metal-oxide-semiconductor, audion, diode etc..The switch of gate tube, by wordline control, is deposited in phase transformation
The when that storage unit needing to wipe operation, specific by wordline gating circuit and bit line strobe Electric circuit selection
Wordline and bit line.Drive circuit produces wipes operation current impulse, flow to gated bit line, choosing
Logical bit line is connected with memory element so that electric current can flow through memory element.
The design of programming operation is completed by drive circuit, and common control circuit is: provided by current mirror
The electric current that several roads vary in size, when being controlled switch and the conducting of each road electric current by Logic control module
Between.During as in figure 2 it is shown, carry out RESET programming, being typically chosen maximum current, tens nanoseconds are extremely
The ON time of hundreds of nanosecond.When carrying out SET programming, it is first turned on all current paths, and its
ON time controls between 10ns to 100ns, preferably about 30ns, completes preprogrammed operation,
Next turns off heavy current pulse path, retains small area analysis pulse paths and terminates to programming, its electric current
Pulse flow to gate phase-change memory cell by bit line, completes to wipe operation.Pre-programmed pulse and volume
Journey pulse is double square.
Embodiment 2
As the preferred embodiment of the present invention two, low for caused by technique making, temperature, material etc.
The phase transition storage that distribution of resistance relatively dissipates, when carrying out SET programming, as it is shown on figure 3, be first turned on
All current paths, keeping its ON time is between 10ns to 100ns, preferably about 30ns,
Completing preprogrammed operation, its programming pulse current path is by logic control circuit control subsequently, can
Select to turn off successively so that it is be formed with the current impulse of stepped trailing edge.Different logic controls
System operation can flow to phase-change memory cell to form the current impulse with different trailing edge form
In, while improving SET program speed, also improve distribution of resistance concordance.
Embodiment 3
For quick SET operation, it is possible to use different type of drive completes, including slightly modified
Logic control module, drive circuit module etc..The circuit operation in chip can also be not limited to
Complete quick SET operation, can be by being sent above-mentioned SET pulse to phase change memory by external equipment
Unit quickly wipes operation.
In sum, the present invention relates to a kind of phase change memory with phase-change material as phase-change memory cell
Flash operational approach and the flash operational approach of a kind of phase change memory circuit, purpose exists
In the SET program speed improving phase-change memory cell.So, the present invention effectively overcomes existing skill
Various shortcoming in art and have high industrial utilization.
The principle of above-described embodiment only illustrative present invention and effect thereof, not for limiting this
Bright.Any person skilled in the art all can be right under the spirit and the scope of the present invention
Above-described embodiment is modified or changes.Such as, phase-change material can be chalcogenide alloy
Or can serve as the phase-change material of other suitable structures of programmable phase-change memory；Pulse is believed
Number can be current impulse can also be potential pulse；The type of drive of SET pulse can be by chip
Internal circuit completes, it is also possible to completed by external equipment.Therefore, such as belonging to technology
Field has usually intellectual without departing from disclosed spirit and institute under technological thought
All equivalences completed are modified or change, and must be contained by the claim of the present invention.
Claims (7)
1. the flash operational approach of a phase change memory, it is characterised in that the SET programming pulse carrying out wiping operation is followed successively by and prelists
Journey pulse and programming pulse, described pre-programmed pulse and programming pulse are a continuous impulse, described pre-programmed pulse amplitude with
RESET programming pulse amplitude is suitable, and the pulsewidth of described pre-programmed pulse is 10ns to 100ns, and described pre-programmed pulse makes
Obtaining phase-change memory cell and surmount the switching threshold of phase transformation, the retention time is less than the RESET pulse operating time of write operation.
The flash operational approach of a kind of phase change memory the most according to claim 1, it is characterised in that: described SET programs arteries and veins
Punching is formed by double square pulse combined.
The flash operational approach of a kind of phase change memory the most according to claim 1, it is characterised in that: described programming pulse is
It is made up of the pulse of rate of decay trailing edge.
The flash operational approach of a kind of phase change memory the most according to claim 3, it is characterised in that have rate of decay described in:
The rate of decay of the pulse of trailing edge includes multinomial, logarithmic and exponential.
5. the flash operational approach of a phase change memory circuit, it is characterised in that: the phase change memory circuit of described flash operation
Including logic control circuit, memory cell array and the drive circuit connected with this logic control circuit respectively, wordline gating
Pipe, bit line strobe pipe and reading circuit；Described wordline gate tube connects with memory cell array respectively with bit line strobe pipe；Described
Reading circuit connects with bit line strobe pipe；If described drive circuit includes the electric current arteries and veins that the main line provided by current mirror varies in size
Punching；Described Logic control module controls switch and the ON time of each path；When performing to wipe operation SET programming, open each
Path forms pre-programmed pulse, flows into bit line strobe pipe, then flows in selected phase-change memory cell, complete preprogrammed operation；
Turning off big current path subsequently, selected phase-change memory cell is programmed by the programming pulse of output；Described pre-programmed pulse and
Programming pulse is a continuous impulse, and described pre-programmed pulse amplitude is suitable with RESET programming pulse amplitude, and described pre-programmed
The pulsewidth of pulse is 10ns to 100ns, and described pre-programmed pulse makes the switching threshold that phase-change memory cell surmounts phase transformation,
Retention time is less than the RESET pulse operating time of write operation.
The flash operational approach of a kind of phase change memory circuit the most according to claim 5, it is characterised in that: prelist completing
After journey operation, turn off all current paths successively so that it is be formed with the pulse of stepped trailing edge.
The flash operational approach of a kind of phase change memory circuit the most according to claim 5, it is characterised in that: described wordline is selected
Siphunculus and bit line strobe pipe are selected from metal-oxide-semiconductor, audion or diode.
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| US9672909B2 (en) * | 2014-04-29 | 2017-06-06 | Microchip Technology Incorporated | Memory cell retention enhancement through erase state modification |
| CN108417237A (en) * | 2018-03-23 | 2018-08-17 | 上海新储集成电路有限公司 | A method of accelerating phase transition storage write operation speed |
| CN110797064A (en) * | 2019-10-31 | 2020-02-14 | 重庆邮电大学 | Low-power-consumption phase change memory initialization operation method |
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| CN101882462A (en) * | 2009-05-08 | 2010-11-10 | 复旦大学 | Setting operation method of resistance random access memory |
| CN102129886A (en) * | 2010-01-12 | 2011-07-20 | 中芯国际集成电路制造(上海)有限公司 | Methods for initializing, setting and resetting resistive random access memory |
| CN102598143A (en) * | 2009-10-30 | 2012-07-18 | 英特尔公司 | Double-pulse write for phase change memory |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101882462A (en) * | 2009-05-08 | 2010-11-10 | 复旦大学 | Setting operation method of resistance random access memory |
| CN102598143A (en) * | 2009-10-30 | 2012-07-18 | 英特尔公司 | Double-pulse write for phase change memory |
| CN102129886A (en) * | 2010-01-12 | 2011-07-20 | 中芯国际集成电路制造(上海)有限公司 | Methods for initializing, setting and resetting resistive random access memory |
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