CN102945683A - Quick erasing-writing operation method for phase change memory - Google Patents
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Abstract
本发明提供一种相变存储的快速擦写操作方法,进行擦操作的SET编程脉冲依次为预编程脉冲及编程脉冲,所述预编程脉冲使得相变存储单元超越相变的开关阈值,保持时间小于写操作的RESET脉冲操作时间。本发明还提供一种相变存储电路的快速擦写操作方法,包括逻辑控制电路、存储单元阵列以及分别与该逻辑控制电路连通的驱动电路、字线选通管、位线选通管和读电路;当执行擦操作SET编程时,打开各通路形成预编程脉冲,流入位线选通管,继而流入所选相变存储单元中,完成预编程操作;随后关掉大电流通路,输出的编程脉冲对所选相变存储单元进行编程。本发明有效减小了相变存储单元SET编程时间,从而提高了相变存储擦操作速度,改善了SET编程后的低阻分布。
The invention provides a fast erasing and writing operation method for phase change storage. The SET programming pulse for performing the erasing operation is a preprogramming pulse and a programming pulse in sequence. Less than the RESET pulse operation time of the write operation. The present invention also provides a fast erasing and writing operation method of a phase-change memory circuit, which includes a logic control circuit, a memory cell array, a drive circuit connected to the logic control circuit, a word line gate transistor, a bit line gate transistor, and a read circuit. circuit; when performing erasing operation SET programming, each channel is opened to form a pre-programming pulse, which flows into the bit line gating tube, and then flows into the selected phase-change memory cell to complete the pre-programming operation; then the large current channel is turned off, and the programming of the output The pulses program the selected phase change memory cells. The invention effectively reduces the SET programming time of the phase-change memory unit, thereby increasing the erasing operation speed of the phase-change memory and improving the low-resistance distribution after SET programming.
Description
技术领域 technical field
本发明属于微纳米电子技术领域,涉及一种信息存储器的编程技术,特别是涉及一种相变存储的快速擦写操作方法以及相变存储器电路的快速擦写操作方法。The invention belongs to the field of micro-nano electronics technology, and relates to a programming technology of an information memory, in particular to a fast erasing and writing operation method of a phase-change memory and a fast erasing and writing operation method of a phase-change memory circuit.
背景技术 Background technique
相变存储器(Phase Change Memory)作为新一代的非易失性存储器,是基于Ovshinsky在20世纪60年代末(Phys. Rev. Lett., 21, 1450~1453, 1968)70年代初(Appl. Phys. Lett., 18, 254~257, 1971)提出的相变薄膜可以应用于相变存储介质的构想建立起来的,是一种价格便宜、性能稳定的存储器件。相变存储器可以做在硅晶片衬底上,其关键材料是可记录的相变薄膜、加热电阻材料、绝热材料和引出电极材料。Phase Change Memory (Phase Change Memory), as a new generation of non-volatile memory, is based on Ovshinsky in the late 1960s (Phys. Rev. Lett., 21, 1450-1453, 1968) and early 1970s (Appl. Phys . Lett., 18, 254~257, 1971) The phase-change thin film proposed by 1971) can be applied to the concept of phase-change storage media, and it is a storage device with low price and stable performance. Phase-change memory can be made on a silicon wafer substrate, and its key materials are recordable phase-change films, heating resistor materials, heat insulating materials and lead-out electrode materials.
相变存储器由存储单元阵列与外部驱动电路构成,每个存储单元具有一些相变材料来存储数据。依赖于诸如硫系化合物相变材料(例如,GeTeAsSi、GeTe、GeSbTe(GST)、GeTeBi、GeSbAg等),这一类的材料可以在晶相和非晶相之间稳定地可逆地转变,其中的典型代表材料为一种含锗、锑、碲的合成材料(GST)。将相变材料结合到电路中,可以使得所述存储单元起到快速转换的可编程电阻器的作用。这种可编程电阻器可以呈现比40倍的结晶态(低阻率)和非晶态(高阻率)之间的电阻率动态范围还要大的动态范围,并且可以呈现允许在每个存储单元中进行多只存储的中间态。存储在存储单元中的数据通过测量单元电阻率来读出。Phase-change memory consists of an array of memory cells and an external drive circuit, and each memory cell has some phase-change material to store data. Depending on phase-change materials such as chalcogenides (e.g., GeTeAsSi, GeTe, GeSbTe (GST), GeTeBi, GeSbAg, etc.), this class of materials can stably and reversibly transition between crystalline and amorphous phases, where A typical representative material is a synthetic material (GST) containing germanium, antimony and tellurium. Incorporating phase-change materials into circuits can allow the memory cells to function as fast-switching programmable resistors. This programmable resistor can exhibit a dynamic range greater than 40 times the resistivity dynamic range between the crystalline state (low resistivity) and the amorphous state (high resistivity), and can present a Multiple stored intermediate states are carried out in the cell. Data stored in a memory cell is read out by measuring the cell resistivity.
物质的晶相是通过提供能量来改变的,物质的晶相变化由能量的累积和冷却的速度两个因素来决定。在物质熔解后进行急速冷却可将物质由晶态转变为非晶态,而在退火的情况下,物质可由非晶态转化为晶态,依据这种可逆的转换关系可以实现二值记录。相变存储单元编程的传统技术是:在相变存储单元上施加高度和宽度不同的电压脉冲或电流脉冲信号使相变材料在非晶态和多晶态之间发生可逆相变以改变其电阻大小,通过分辨非晶态时的高阻和多晶态时的低阻,可以实现信息的写入、擦除和读出操作。图1显示了对相变存储器进行编程的传统脉冲序列。要实现低阻到高阻的变化,即写操作,需要施加一个幅度较高且时间较短的RESET矩形脉冲,使得存储单元中的相变材料迅速超越阈值开关,材料温度升高到熔化温度以上,随后快速撤去脉冲信号,将材料迅速冷却,使多晶的长程有序遭到破坏,从而实现由多晶向非晶的转化,使材料保持在非晶态。要实现高阻到低阻的变化,即擦操作,需要施加一个幅度中等且时间较长的SET矩形脉冲,硫系化合物的温度升高到结晶温度以上熔化温度以下,保持一定的时间,使得相变存储单元在大于开关阈值的条件之后开始晶核生长,撤去脉冲后,电阻保持低阻态。SET操作的幅度小于RESET操作的幅度,以防止相变存储单元转换为非晶态。一般来说,由于受到制造工艺,环境温度及相变存储单元初始阻值等因素的影响,对相变存储器中的相变存储单元写操作(RESET)需要几十纳秒到几百纳秒的电流加热时间,而对相变存储器中的相变存储单元进行擦操作(SET)需要几百纳秒到几毫秒的电流加热时间。由于SET编程远远大于RESET编程时间,所以相变存储器的编程速度主要由SET编程时间决定。减小SET编程时间对提高相变存储器速度意义重大。The crystal phase of a substance is changed by providing energy, and the crystal phase change of a substance is determined by two factors: energy accumulation and cooling speed. Rapid cooling after the melting of the substance can transform the substance from the crystalline state to the amorphous state, and in the case of annealing, the substance can be transformed from the amorphous state to the crystalline state. According to this reversible transformation relationship, binary recording can be realized. The traditional technology of phase change memory cell programming is: apply voltage pulse or current pulse signal with different height and width on the phase change memory cell to make the phase change material undergo reversible phase transition between amorphous state and polycrystalline state to change its resistance By distinguishing the high resistance in the amorphous state and the low resistance in the polycrystalline state, the writing, erasing and reading operations of information can be realized. Figure 1 shows a conventional pulse sequence for programming phase-change memory. To achieve the change from low resistance to high resistance, that is, write operation, it is necessary to apply a RESET rectangular pulse with higher amplitude and shorter time, so that the phase change material in the memory cell quickly exceeds the threshold switch, and the temperature of the material rises above the melting temperature , and then the pulse signal is quickly removed, the material is cooled rapidly, and the long-range order of the polycrystalline is destroyed, thereby realizing the transformation from polycrystalline to amorphous, and keeping the material in an amorphous state. To realize the change from high resistance to low resistance, that is, wiping operation, it is necessary to apply a medium-amplitude and long-time SET rectangular pulse. The variable memory cell starts crystal nucleus growth after the condition greater than the switching threshold, and the resistance remains in a low resistance state after the pulse is removed. The magnitude of the SET operation is smaller than that of the RESET operation to prevent the phase-change memory cell from being converted to an amorphous state. Generally speaking, due to the influence of factors such as manufacturing process, ambient temperature and initial resistance of phase-change memory cells, the write operation (RESET) of phase-change memory cells in phase-change memory takes tens of nanoseconds to hundreds of nanoseconds. Current heating time, while the erasing operation (SET) of phase-change memory cells in phase-change memory requires hundreds of nanoseconds to several milliseconds of current heating time. Since SET programming is much longer than RESET programming time, the programming speed of the phase change memory is mainly determined by the SET programming time. Reducing the SET programming time is of great significance for improving the speed of the phase change memory.
由于相变存储单元中的相变材料的实际温度在各个单元之间会有差异,这种差异会无意间使器件的一个或多个单元中的材料在加上传统SET脉冲时达到熔化温度Tm,从而导致这些单元保持在高阻态。为避免这个问题,传统编程技术使用幅度较小的SET脉冲进行擦操作,以保证在SET脉冲加置相变存储单元时,相变材料没有达到熔化温度Tm。这种方法使得SET操作时间远远大于RESET操作时间。此外,存储单元中会存有稳定态显著低于最佳温度的单元,这就减小了存储单元中SET和RESET电阻分布范围。Since the actual temperature of the phase-change material in a phase-change memory cell varies from cell to cell, this difference can inadvertently cause the material in one or more cells of the device to reach the melting temperature T when conventional SET pulses are applied. m , causing these cells to remain in a high-impedance state. To avoid this problem, the traditional programming technology uses a SET pulse with a small amplitude to perform an erase operation, so as to ensure that the phase change material does not reach the melting temperature T m when the SET pulse is applied to the phase change memory cell. This method makes the SET operation time much longer than the RESET operation time. In addition, there will be cells in the memory cell whose stable state is significantly lower than the optimal temperature, which reduces the range of SET and RESET resistance distribution in the memory cell.
由于相变电阻存在OTS效应,将电压加在相变存储单元时,当电压高于一定开关阈值,相变存储单元的电阻率会突然下降,但此时相变电阻并没有被实际编程,若去掉电压,相变电阻会重新回到原先的阻值。相变存储单元在从高阻态向低阻态转变的过程中,需要首先超越材料的开关阈值,进入编程态。传统的SET操作是施加较低幅度的矩形脉冲信号到相变存储单元上,需要较长时间才能进入达到超越开关阈值的能量,这部分时间与进入编程态之后的结晶感应时间相加,构成了SET擦操作的全部时间。显然,这种较低幅度的脉冲信号减缓了相变存储单元进入编程态的时间。Due to the OTS effect of the phase change resistance, when the voltage is applied to the phase change memory cell, when the voltage is higher than a certain switching threshold, the resistivity of the phase change memory cell will suddenly drop, but at this time the phase change resistance has not been actually programmed, if Remove the voltage, the phase change resistance will return to the original resistance. In the process of transitioning from a high-resistance state to a low-resistance state, a phase-change memory cell must first exceed the switching threshold of the material and enter a programming state. The traditional SET operation is to apply a low-amplitude rectangular pulse signal to the phase-change memory unit, and it takes a long time to enter the energy beyond the switching threshold. This part of the time is added to the crystallization induction time after entering the programming state, forming a phase-change memory cell. SET for the entire time of the wipe operation. Apparently, this lower amplitude pulse signal slows down the time for the phase-change memory cell to enter the programming state.
发明内容 Contents of the invention
鉴于以上所述现有技术的缺点,本发明的目的在于提供一种相变存储的快速擦写操作方法以及一种相变存储电路的快速擦写操作方法,用于减小相变存储单元SET编程时间,从而提高相变存储擦操作速度,改善SET编程后的低阻分布。In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a phase-change memory flash erase operation method and a phase-change memory circuit flash erase operation method for reducing the phase-change memory unit SET programming time, thereby improving the phase change memory erasing operation speed, and improving the low resistance distribution after SET programming.
为实现上述目的及其他相关目的,本发明提供一种相变存储的快速擦写操作方法,进行擦操作的SET编程脉冲依次为预编程脉冲及编程脉冲,所述预编程脉冲使得相变存储单元中超越相变的开关阈值,保持时间小于写操作的RESET脉冲操作时间,使得存储单元可以快速进入编程状态,进而编程脉冲完成擦操作。In order to achieve the above object and other related objects, the present invention provides a fast erasing and writing operation method for phase change storage. The SET programming pulse for erasing operation is sequentially a preprogramming pulse and a programming pulse, and the preprogramming pulse makes the phase change memory cell The switching threshold beyond the phase transition in the middle, the holding time is shorter than the RESET pulse operation time of the write operation, so that the memory cell can quickly enter the programming state, and then the programming pulse completes the erasing operation.
优选地,所述预编程脉冲幅度与RESET编程脉冲幅度相当。Preferably, the amplitude of the pre-programming pulse is equivalent to the amplitude of the RESET programming pulse.
优选地,所述SET编程脉冲由双矩形脉冲组合而成。Preferably, the SET programming pulse is composed of double rectangular pulses.
优选地,所述预编程脉冲的脉宽为10ns至100ns,脉宽在30ns左右为最佳。Preferably, the pulse width of the pre-programmed pulse is 10 ns to 100 ns, and the best pulse width is about 30 ns.
优选地,所述编程脉冲为有衰减速率下降沿的脉冲组成。Preferably, the programming pulse is composed of a pulse with a falling edge of the decay rate.
优选地,所述有衰减速率下降沿的脉冲的衰减速率包括多项式、对数式和指数式等。Preferably, the decay rate of the pulse with a falling edge of the decay rate includes polynomial, logarithmic and exponential.
本发明还提供一种相变存储电路的快速擦写操作方法,所述快速擦写操作的相变存储电路包括逻辑控制电路、存储单元阵列以及分别与该逻辑控制电路连通的驱动电路、字线选通管、位线选通管和读电路;所述字线选通管和位线选通管分别与存储单元阵列连通;所述读电路与位线选通管连通;所述驱动电路包括由电流镜提供的若干路大小不同的电流脉冲;所述逻辑控制模块控制各通路的开关及导通时间;当执行擦操作SET编程时,打开各通路形成预编程脉冲,流入位线选通管,继而流入所选相变存储单元中,完成预编程操作;随后关掉大电流通路,输出的编程脉冲对所选相变存储单元进行编程,所述预编程脉冲使得相变存储单元超越相变的开关阈值,保持时间小于写操作的RESET脉冲操作时间。The present invention also provides a fast erasing and writing operation method of a phase-change storage circuit. The phase-change storage circuit for the fast erasing and writing operation includes a logic control circuit, a memory cell array, a drive circuit and a word line respectively communicated with the logic control circuit. A gating tube, a bit line gating tube and a read circuit; the word line gating tube and the bit line gating tube are respectively communicated with the memory cell array; the read circuit is communicated with the bit line gating tube; the drive circuit includes A number of current pulses of different sizes provided by the current mirror; the logic control module controls the switch and conduction time of each channel; when performing the erase operation SET programming, each channel is opened to form a pre-programmed pulse, which flows into the bit line gating tube , and then flow into the selected phase-change memory cell to complete the pre-programming operation; then turn off the large current path, and the output programming pulse programs the selected phase-change memory cell, and the pre-programming pulse makes the phase-change memory cell surpass the phase-change The switching threshold, the hold time is less than the RESET pulse operation time of the write operation.
优选地,进行SET编程时,预编程脉冲幅度与RESET脉冲幅度相当,其脉宽为10ns至100ns,脉宽在30ns左右为最佳。Preferably, when performing SET programming, the amplitude of the pre-programmed pulse is equivalent to the amplitude of the RESET pulse, and its pulse width is 10 ns to 100 ns, and the pulse width is about 30 ns.
优选地,在完成预编程操作之后,依次关断所有电流通路,使其形成有阶梯状下降沿的脉冲。Preferably, after the pre-programming operation is completed, all current paths are sequentially turned off so as to form pulses with stepped falling edges.
优选地,所述字线选通管和位线选通管选自MOS管、三极管或二极管。Preferably, the word line gate transistor and the bit line gate transistor are selected from MOS transistors, triodes or diodes.
如上所述,本发明的一种相变存储的快速擦写操作方法以及一种相变存储电路的快速擦写操作方法,具有以下有益效果:As mentioned above, a method for fast erasing and writing operation of phase-change storage and a method for quickly erasing and writing operation of phase-change memory circuit according to the present invention have the following beneficial effects:
本发明在施加普通SET脉冲之前,先施加一个大幅度、短时间的预编程脉冲,使得所有相变存储单元都超越相变的开关阈值,快速进入编程态,随后施加的编程脉冲可以用较短时间就完成高阻向低阻的转变,并且具有更优的低阻分布。In the present invention, before applying the ordinary SET pulse, a large-amplitude, short-time pre-programming pulse is first applied, so that all phase-change memory cells exceed the switching threshold of the phase-change and quickly enter the programming state, and the programming pulse applied subsequently can use a shorter Time will complete the transformation from high resistance to low resistance, and has a better low resistance distribution.
附图说明 Description of drawings
图1显示为现有技术中的用于对传统相变存储器进行编程的传统擦操作脉冲波示意图。FIG. 1 is a schematic diagram of a traditional erasing operation pulse wave for programming a traditional phase change memory in the prior art.
图2显示为本发明的相变存储的擦操作的双矩形SET脉冲波示意图。FIG. 2 is a schematic diagram of a dual rectangular SET pulse wave for the erasing operation of the phase change memory of the present invention.
图3显示为本发明的相变存储的擦操作的具有衰减速率下降沿的SET脉冲波示意图。FIG. 3 is a schematic diagram of a SET pulse wave with a falling edge of decay rate for the erasing operation of the phase-change memory of the present invention.
图4显示为本发明的快速擦写相变存储器电路框图。FIG. 4 is a circuit block diagram of the flash phase change memory of the present invention.
具体实施方式Detailed ways
以下通过特定的具体实例说明本发明的实施方式,本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用,本说明书中的各项细节也可以基于不同观点与应用,在没有背离本发明的精神下进行各种修饰或改变。Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.
由于相变电阻存在OTS效应,将脉冲加在相变电阻单元时,当电压高于一定开关阈值,相变电阻单元的电阻率会突然下降,但此时相变电阻并没有被实际编程,若去掉电压,相变电阻会重新回到原先的阻值,在超越阈值电压之后的脉冲操作才是真正的编程脉冲,我们将用于超越阈值的脉冲称为预编程脉冲。Due to the OTS effect of the phase change resistance, when the pulse is applied to the phase change resistance unit, when the voltage is higher than a certain switching threshold, the resistivity of the phase change resistance unit will suddenly drop, but at this time the phase change resistance has not been actually programmed, if When the voltage is removed, the phase change resistance will return to the original resistance value. The pulse operation after the threshold voltage is exceeded is the real programming pulse. We call the pulse used to exceed the threshold value a pre-programmed pulse.
用于对相变存储器进行擦操作的SET脉冲可分为两部分,预编程脉冲与编程脉冲。首先是施加一个预编程脉冲:其脉冲幅度与RESET脉冲幅度相当、且保持时间约为几十纳秒,小于RESET操作时间,使得器件单元中的相变材料短期内可以迅速超越开关阈值,进入编程态。接着将SET脉冲转变为编程脉冲:其幅度较低,且保持一定时间,使器件单元达到结晶温度Topt附近的温度,并在这段时间内发生较好的结晶,相变单元转变为低阻态。The SET pulse used for erasing the phase-change memory can be divided into two parts, a pre-programming pulse and a programming pulse. The first is to apply a pre-programmed pulse: its pulse amplitude is equivalent to that of the RESET pulse, and the hold time is about tens of nanoseconds, which is less than the RESET operation time, so that the phase-change material in the device unit can quickly exceed the switching threshold in a short period of time and enter programming state. Then the SET pulse is converted into a programming pulse: its amplitude is low, and it is kept for a certain period of time, so that the device unit reaches a temperature near the crystallization temperature T opt , and better crystallization occurs during this period, and the phase change unit is transformed into a low-resistance state.
我们知道, RESET写操作的重要特征是,施加一个高幅度脉冲信号,存储材料首先达到超越开关阈值,进入RESET编程态之后,迅速撤去脉冲信号可将存储单元保持在非晶态,如图1中RESET编程脉冲所示。所以,SET脉冲的初始幅度大于传统SET脉冲时,存储器可以达到温度Tm之上,超越开关阈值、进入编程态,但是由于这一高幅度的SET脉冲保持时间仅相当于相变单元超越开关阈值的时间,且其后续脉冲幅度衰减为较低脉冲幅度,使得相变材料温度降低至结晶温度Topt附近,直接进入SET编程状态。We know that the important feature of the RESET write operation is that when a high-amplitude pulse signal is applied, the storage material first reaches the switching threshold, and after entering the RESET programming state, quickly removing the pulse signal can keep the memory cell in the amorphous state, as shown in Figure 1 RESET programming pulse is shown. Therefore, when the initial amplitude of the SET pulse is greater than that of the traditional SET pulse, the memory can reach the temperature above Tm , exceed the switching threshold, and enter the programming state. time, and its subsequent pulse amplitude is attenuated to a lower pulse amplitude, so that the temperature of the phase change material is reduced to around the crystallization temperature T opt , and directly enters the SET programming state.
作为本发明的一种优选方案,所述SET编程脉冲由双矩形脉冲组合而成,如图2所示。脉冲1为预编程脉冲,其幅度与RESET脉冲相当,电流达到I1,时间在30ns左右,小于RESET写操作时间,使得相变存储单元超越开关阈值,进入编程态。脉冲2为编程脉冲:其脉冲幅度与传统SET脉冲幅度相当,电流约为I2,由于已经超越开关阈值,其时间将远小于传统SET加热时间。两路脉冲施加在相变存储单元之上,构成双脉冲的快速SET擦操作。As a preferred solution of the present invention, the SET programming pulse is composed of double rectangular pulses, as shown in FIG. 2 . Pulse 1 is a pre-programmed pulse, its amplitude is equivalent to the RESET pulse, the current reaches I 1 , and the time is about 30ns, which is less than the RESET write operation time, so that the phase-change memory cell exceeds the switching threshold and enters the programming state. Pulse 2 is a programming pulse: its pulse amplitude is equivalent to that of traditional SET pulses, and its current is about I 2 . Since it has exceeded the switching threshold, its time will be much shorter than the traditional SET heating time. Two pulses are applied to the phase-change memory cell to form a double-pulse fast SET erase operation.
作为本发明的另一种优选方案,所述SET编程脉冲由预编程脉冲与具有可变斜率的下降沿的编程脉冲组成,如图3所示。在施加预编程脉冲之后,相变单元快速超越开关阈值,进入编程态,施加下降沿具有可变斜率的编程脉冲可以使得存储单元的结晶温度变化范围增大,电流幅度能在尽可能多的相变单元中产生结晶温度Topt,以便为这些单元提供最优的SET操作电阻分布。其中,后沿部分的斜率衰减速率可包括,多项式,对数式,指数式等。As another preferred solution of the present invention, the SET programming pulse is composed of a pre-programming pulse and a programming pulse with a falling edge with a variable slope, as shown in FIG. 3 . After applying the pre-programming pulse, the phase-change unit quickly exceeds the switching threshold and enters the programming state. Applying a programming pulse with a variable slope on the falling edge can increase the range of crystallization temperature of the memory cell, and the current amplitude can be in as many phases as possible. The crystallization temperature T opt is generated in variable cells in order to provide optimal SET operation resistance distribution for these cells. Wherein, the slope decay rate of the trailing edge part may include polynomial, logarithmic, exponential and so on.
当前相变存储器写操作(即RESET编程过程)的速度约在几十纳秒到几百纳秒范围内,而擦操作(即SET编程过程)的速度约在毫秒量级,RESET与SET编程过程都需要首先超越相变存储单元的开关阈值,再进入编程状态。如果能在SET编程过程中,迅速使相变存储单元超越其开关阈值,即可提升擦操作时间,将大幅提升相变存储器的编程速度。The speed of the current phase change memory write operation (that is, the RESET programming process) is in the range of tens of nanoseconds to hundreds of nanoseconds, while the speed of the erasing operation (that is, the SET programming process) is on the order of milliseconds. The RESET and SET programming processes Both need to exceed the switching threshold of the phase-change memory cell first, and then enter the programming state. If the phase-change memory cell can be quickly exceeded its switching threshold during the SET programming process, the erasing operation time can be increased, and the programming speed of the phase-change memory will be greatly improved.
在一个实施例中,用于对相变存储器进行擦操作的SET脉冲分为两部分,预编程脉冲与编程脉冲。首先是施加一个预编程脉冲:其脉冲幅度与RESET脉冲幅度相当,且脉宽约为10ns~100ns之间,优选30ns左右,小于RESET操作时间,使得存储单元中的相变材料短期内可以迅速超越开关阈值,进入编程态。接着将SET脉冲转变为编程脉冲:其幅度较低,且保持一定时间,使存储单元达到结晶温度Topt附近的温度,并在这段时间内发生较好的结晶,相变存储单元转变为低阻态。In one embodiment, the SET pulse used for erasing the phase change memory is divided into two parts, a pre-program pulse and a program pulse. The first is to apply a pre-programmed pulse: its pulse amplitude is equivalent to that of the RESET pulse, and the pulse width is about 10ns~100ns, preferably about 30ns, which is less than the RESET operation time, so that the phase change material in the memory cell can quickly surpass it in a short period of time. switch threshold, enter the programming state. Then turn the SET pulse into a programming pulse: its amplitude is low, and it is kept for a certain period of time, so that the memory cell reaches a temperature near the crystallization temperature Topt, and better crystallization occurs during this period, and the phase-change memory cell changes into a low-resistance state.
请参阅图1至图4。需要说明的是,本实施例中所提供的图示仅以示意方式说明本发明的基本构想,遂图式中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制,其实际实施时各组件的型态、数量及比例可为一种随意的改变,且其组件布局型态也可能更为复杂。See Figures 1 through 4. It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual implementation, and the component layout type may also be more complicated.
实施例1Example 1
图4所示为本发明的快速擦写相变存储电路方框图,包括驱动电路,存储阵列,译码电路和读电路。其中,驱动电路为相变存储单元提供编程操作。存储阵列由相变存储单元与选通管串联而成,其中选通管可以是MOS管,三极管、二极管等。选通管的开关由字线控制,在相变存储单元需要擦操作的时候,由字线选通电路和位线选通电路选取特定的字线和位线。驱动电路产生擦操作电流脉冲,流至所选通位线,选通位线与存储单元相连,使得电流可以流过存储单元。FIG. 4 is a block diagram of a flash phase-change memory circuit of the present invention, including a drive circuit, a memory array, a decoding circuit and a read circuit. Wherein, the driving circuit provides programming operation for the phase-change memory cell. The memory array is composed of phase-change memory cells connected in series with gate transistors, wherein the gate transistors can be MOS transistors, triodes, diodes, and the like. The switch of the gate transistor is controlled by the word line, and when the phase-change memory cell needs to be erased, a specific word line and bit line are selected by the word line gate circuit and the bit line gate circuit. The driving circuit generates an erase operation current pulse, which flows to the selected bit line, and the selected bit line is connected with the memory unit, so that the current can flow through the memory unit.
编程操作的设计由驱动电路完成,通常的控制电路为:由电流镜提供几路大小不同的电流,由逻辑控制模块控制各路电流的开关及导通时间。如图2所示,进行RESET编程时,一般选择最大电流,几十纳秒至几百纳秒的导通时间。进行SET编程时,首先打开所有电流通路,且其导通时间控制在10ns至100ns之间,优选30ns左右,完成预编程操作,其次关掉大电流脉冲通路,保留小电流脉冲通路至编程结束,其电流脉冲通过位线流至选通相变存储单元,完成擦操作。预编程脉冲和编程脉冲呈双矩形。The design of the programming operation is completed by the drive circuit. The usual control circuit is: the current mirror provides several currents of different sizes, and the logic control module controls the switching and conduction time of each current. As shown in FIG. 2 , when performing RESET programming, the maximum current is generally selected, and the conduction time is tens of nanoseconds to hundreds of nanoseconds. When performing SET programming, firstly open all current paths, and the conduction time is controlled between 10ns and 100ns, preferably about 30ns, and the pre-programming operation is completed, and then the large current pulse path is turned off, and the small current pulse path is kept until the end of programming. Its current pulse flows to the gate phase-change memory cell through the bit line to complete the erasing operation. The preprogram and program pulses are double rectangles.
实施例2Example 2
作为本发明优选实施例二,对于由工艺制作、温度、材料等导致的低电阻分布较散的相变存储器,进行SET编程时,如图3所示, 首先打开所有电流通路,保持其导通时间为10ns至100ns之间,优选30ns左右,完成预编程操作,随后其编程脉冲电流通路由逻辑控制电路控制,可选择依次关断,使其形成有阶梯状下降沿的电流脉冲。不同的逻辑控制操作可以形成具有不同下降沿形式的电流脉冲,流至相变存储单元中,在提高SET编程速度的同时,也提高了电阻分布一致性。As the second preferred embodiment of the present invention, for a phase-change memory with scattered low-resistance distribution caused by process manufacturing, temperature, materials, etc., when performing SET programming, as shown in Figure 3, first open all current paths and keep them turned on The time is between 10 ns and 100 ns, preferably about 30 ns, to complete the pre-programming operation, and then the programming pulse current path is controlled by the logic control circuit, which can be selected to be turned off sequentially to form a current pulse with a stepped falling edge. Different logic control operations can form current pulses with different falling edge forms, which flow into the phase-change memory cells. While increasing the SET programming speed, it also improves the consistency of resistance distribution.
实施例3Example 3
对于快速SET操作,可以利用不同的驱动方式来完成,包括稍作改动的逻辑控制模块、驱动电路模块等。也可以不拘泥于芯片内的电路操作来完成快速SET操作,可通过由外部设备发送上述SET脉冲至相变存储单元进行快速擦操作。For the fast SET operation, different driving methods can be used to complete it, including a slightly modified logic control module, a driving circuit module, and the like. The fast SET operation can also be completed regardless of the circuit operation in the chip, and the fast erase operation can be performed by sending the above-mentioned SET pulse to the phase-change memory unit by an external device.
综上所述,本发明涉及一种以相变材料为相变存储单元的相变存储的快速擦写操作方法和一种相变存储电路的快速擦写操作方法,目的在于提高相变存储单元的SET编程速度。所以,本发明有效克服了现有技术中的种种缺点而具高度产业利用价值。In summary, the present invention relates to a method of fast erasing and writing operation of a phase change memory using a phase change material as a phase change memory unit and a method of rapidly erasing and writing a phase change memory circuit, the purpose of which is to improve the performance of the phase change memory unit. SET programming speed. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial application value.
上述实施例仅例示性说明本发明的原理及其功效,而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下,对上述实施例进行修饰或改变。例如,相变材料可以是硫族化合物合金或可以用作可编程相变存储器的其他合适的结构的相变材料;脉冲信号可以是电流脉冲也可以是电压脉冲;SET脉冲的驱动方式可以由芯片内部电路来完成,也可以通过外部设备来完成。因此,举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变,仍应由本发明的权利要求所涵盖。The above-mentioned embodiments only illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. For example, the phase-change material can be a chalcogenide alloy or a phase-change material with other suitable structures that can be used as a programmable phase-change memory; the pulse signal can be a current pulse or a voltage pulse; the driving mode of the SET pulse can be determined by the chip It can be done by internal circuit or by external equipment. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical ideas disclosed in the present invention shall still be covered by the claims of the present invention.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106104695A (en) * | 2014-04-29 | 2016-11-09 | 密克罗奇普技术公司 | Keep strengthening by wiping the memory cell of status modifier |
CN108417237A (en) * | 2018-03-23 | 2018-08-17 | 上海新储集成电路有限公司 | A method of accelerating phase transition storage write operation speed |
CN110797064A (en) * | 2019-10-31 | 2020-02-14 | 重庆邮电大学 | A low-power phase change memory initialization operation method |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101882462A (en) * | 2009-05-08 | 2010-11-10 | 复旦大学 | A set operation method of resistance random access memory |
CN102129886A (en) * | 2010-01-12 | 2011-07-20 | 中芯国际集成电路制造(上海)有限公司 | Methods for initializing, setting and resetting resistive random access memory |
US20120057402A1 (en) * | 2010-09-03 | 2012-03-08 | Soo Gil Kim | Write driver, semiconductor memory apparatus using the same and programming method |
CN102598143A (en) * | 2009-10-30 | 2012-07-18 | 英特尔公司 | Double-pulse write for phase change memory |
-
2012
- 2012-11-05 CN CN201210436990.4A patent/CN102945683B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101882462A (en) * | 2009-05-08 | 2010-11-10 | 复旦大学 | A set operation method of resistance random access memory |
CN102598143A (en) * | 2009-10-30 | 2012-07-18 | 英特尔公司 | Double-pulse write for phase change memory |
CN102129886A (en) * | 2010-01-12 | 2011-07-20 | 中芯国际集成电路制造(上海)有限公司 | Methods for initializing, setting and resetting resistive random access memory |
US20120057402A1 (en) * | 2010-09-03 | 2012-03-08 | Soo Gil Kim | Write driver, semiconductor memory apparatus using the same and programming method |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106104695A (en) * | 2014-04-29 | 2016-11-09 | 密克罗奇普技术公司 | Keep strengthening by wiping the memory cell of status modifier |
CN106104695B (en) * | 2014-04-29 | 2019-04-05 | 密克罗奇普技术公司 | Enhancing is kept by the memory cell that erase status is modified |
CN108417237A (en) * | 2018-03-23 | 2018-08-17 | 上海新储集成电路有限公司 | A method of accelerating phase transition storage write operation speed |
CN110797064A (en) * | 2019-10-31 | 2020-02-14 | 重庆邮电大学 | A low-power phase change memory initialization operation method |
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