CN102945683A - Quick erasing-writing operation method for phase change memory - Google Patents
Quick erasing-writing operation method for phase change memory Download PDFInfo
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Abstract
The invention provides a quick erasing-writing operation method for a phase change memory. SET programming pulses for executing erasing operation are a preprogramming pulse and a programming pulse sequentially, wherein according to the preprogramming pulse, a phase change storage unit exceeds a switch threshold of phase change and the retention time is shorter than the operation time of a RESET pulse for writing operation. The invention further provides a quick erasing-writing operation method for a phase change storage circuit. The phase change storage circuit comprises a logic control circuit, a storage unit array, a driving circuit, a word line gate tube, a bit line gate tube and a reading circuit, wherein the driving circuit, the word line gate tube, the bit line gate tube and the reading circuit are respectively communicated with the logic control circuit. The quick erasing-writing operation method comprises the following steps of: when the SET programming for erasing operation is executed, turning on each access to form the preprogramming pulse for flowing in the bit line gate tube and further flowing in the phase change storage unit to finish the preprogramming operation; and then turning off a heavy-current access and programming the phase change storage unit by the outputted programming pulse. According to the quick erasing-writing operation method disclosed by the invention, the SET programming time of the phase change storage unit is shortened, and thus the erasing operation speed of the phase change memory is increased and the low-resistance distribution after the SET programming is improved.
Description
Technical field
The invention belongs to micro-nano electronic technology field, relate to a kind of programming technique of information-storing device, particularly relate to a kind of quick erasable method of operating of phase change memory and the quick erasable method of operating of phase change memory circuitry.
Background technology
Phase transition storage (Phase Change Memory) is as the nonvolatile memory of a new generation, be based on Ovshinsky at late 1960s (Phys. Rev. Lett., 21,1450～1453,1968) beginning of the seventies (Appl. Phys. Lett., 18,254～257,1971) phase-change thin film that proposes can be applied to that the conception of phase change memory medium sets up, and is the memory device of a kind of low price, stable performance.Phase transition storage can be made on the silicon wafer substrate, and its critical material is recordable phase-change thin film, heating resistor material, thermal insulation material and extraction electrode material.
Phase transition storage is made of memory cell array and external drive circuit, and each storage unit has some phase-change materials and stores data.Such as sulfur series compound phase-change material (for example depend on, GeTeAsSi, GeTe, GeSbTe(GST), GeTeBi, GeSbAg etc.), the material of this class can be between crystalline phase and amorphous phase stably reversibly changes, and Typical Representative material wherein is the synthetic material (GST) of a kind of germanic, antimony, tellurium.Phase-change material is attached in the circuit, can be so that described storage unit plays the effect of the programmable resistance of quick conversion.Crystalline state (low-resistance rate) and the resistivity dynamic range between the amorphous state (high resistant rate) that this programmable resistance can present than 40 times are also wanted large dynamic range, and can present many storages are carried out in permission in each storage unit intermediate state.Being stored in data communication device in the storage unit crosses measuring unit resistivity and reads.
The crystalline phase of material is by providing energy to change, and the crystalline phase variation of material is decided by the accumulation of energy and two factors of speed of cooling.After material melts, cool off rapidly and can change material into amorphous state by crystalline state, and in the situation that annealing, material can be converted into crystalline state by amorphous state, can realize two value records according to this reversible transformational relation.The conventional art of phase-change memory cell programming is: apply height potential pulse or the current pulse signal different with width at phase-change memory cell and make phase-change material reversible transition occur to change its resistance sizes between amorphous state and polycrystalline attitude, low-resistance when the high resistant during by the resolution amorphous state and polycrystalline attitude can realize writing, wipe and read operation of information.Fig. 1 has shown the conventional sequence of pulses that phase transition storage is programmed.Realize that low-resistance arrives the variation of high resistant, it is write operation, need to apply a RESET rect.p. that amplitude is higher and the time is shorter, so that the rapid exceeded threshold switch of the phase-change material in the storage unit, material temperature is elevated to more than the temperature of fusion, removes fast subsequently pulse signal, material is cooled off rapidly, the long-range order of polycrystalline is destroyed, thereby realized by the conversion of polycrystalline to amorphous, make material remain on amorphous state.Realize that high resistant arrives the variation of low-resistance, namely wipe operation, need to apply a SET rect.p. that amplitude is medium and the time is long, the temperature of chalcogenide compound is elevated to below the above temperature of fusion of Tc, keep the regular hour, so that phase-change memory cell begins nucleus growth after the condition greater than switching threshold, remove pulse after, resistance keeps low resistance state.The amplitude of SET operation is converted to amorphous state less than the amplitude of RESET operation to prevent phase-change memory cell.In general, owing to being subject to manufacturing process, the impact of the factors such as environment temperature and the initial resistance of phase-change memory cell, the current flow heats time that phase-change memory cell write operation (RESET) in the phase transition storage is needed tens nanoseconds to hundreds of nanosecond, and being wiped operation (SET), the phase-change memory cell in the phase transition storage need hundreds of nanosecond to arrive several milliseconds current flow heats time.Because the SET programming is far longer than the RESET programming time, so the program speed of phase transition storage is mainly determined by the SET programming time.Reduce the SET programming time significant to improving phase transition storage speed.
Because the actual temperature of the phase-change material in the phase-change memory cell can be variant between unit, the material that this species diversity can be not intended in one or more unit of chien shih device reaches temperature of fusion T when adding traditional SET pulse
mThereby, cause these unit to remain on high-impedance state.For avoiding this problem, traditional programming technique uses the less SET pulse of amplitude to wipe operation, adds when putting phase-change memory cell in the SET pulse guaranteeing, phase-change material does not reach temperature of fusion T
mThis method so that the SET running time be far longer than the RESET running time.In addition, can have the unit that stable state significantly is lower than optimum temperature in the storage unit, this has just reduced SET and RESET distribution of resistance scope in the storage unit.
Because there is the OTS effect in phase change resistor, when voltage is added in phase-change memory cell, when voltage is higher than certain switching threshold, the resistivity of phase-change memory cell can descend suddenly, but this moment, phase change resistor did not have by actual program, if remove voltage, phase change resistor can come back to original resistance.Phase-change memory cell need at first surmount the switching threshold of material the process that changes from high-impedance state to low resistance state, enter programmed state.Traditional SET operation is to apply rectangular pulse signal than low amplitude to phase-change memory cell, need the long period just can enter and reach the energy that surmounts switching threshold, this part time and the crystallization sensitive time addition that enters after the programmed state, consisted of SET and wiped the All Time of operation.Obviously, this pulse signal than low amplitude has slowed down phase-change memory cell and has entered the time of programmed state.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of quick erasable method of operating of phase change memory and a kind of quick erasable method of operating of phase change memory circuit, be used for reducing phase-change memory cell SET programming time, wipe operating speed thereby improve phase change memory, the low-resistance of improving after SET programmes distributes.
Reach for achieving the above object other relevant purposes, the invention provides a kind of quick erasable method of operating of phase change memory, the SET programming pulse of wiping operation is followed successively by pre-programmed pulse and programming pulse, described pre-programmed pulse is so that surmount the switching threshold of phase transformation in the phase-change memory cell, retention time is less than the RESET pulse operation time of write operation, so that storage unit can enter programming state fast, and then programming pulse is finished the wiping operation.
Preferably, described pre-programmed pulse height is suitable with RESET programming pulse amplitude.
Preferably, described SET programming pulse is formed by the double square pulse combined.
Preferably, the pulsewidth of described pre-programmed pulse is 10ns to 100ns, and pulsewidth is best about 30ns.
Preferably, described programming pulse forms for the pulse by the rate of decay negative edge.
Preferably, the described rate of decay that the pulse of rate of decay negative edge arranged comprise polynomial expression, to numerical expression and exponential form etc.
The present invention also provides a kind of quick erasable method of operating of phase change memory circuit, and the phase change memory circuit of described quick erasable operation comprises logic control circuit, memory cell array and the driving circuit that is communicated with this logic control circuit respectively, word line selection siphunculus, bit line gate tube and reading circuit; Described word line selection siphunculus and bit line gate tube are communicated with memory cell array respectively; Described reading circuit is communicated with the bit line gate tube; The current impulse that some roads that described driving circuit comprises to be provided by current mirror vary in size; Described Logic control module is controlled switch and the ON time of each path; When carrying out wiping operation SET programming, open each path and form pre-programmed pulse, flow into the bit line gate tube, then flow in the selected phase-change memory cell, finish pre-programmed and operate; Turn off subsequently large current path, the programming pulse of output is programmed to selected phase-change memory cell, and described pre-programmed pulse is so that phase-change memory cell surmounts the switching threshold of phase transformation, and the retention time is less than the RESET pulse operation time of write operation.
Preferably, when carrying out the SET programming, the pre-programmed pulse height is suitable with the RESET pulse height, and its pulsewidth is 10ns to 100ns, and pulsewidth is best about 30ns.
Preferably, after finishing the pre-programmed operation, turn-off successively all current paths, make it be formed with the pulse of stepped negative edge.
Preferably, described word line selection siphunculus and bit line gate tube are selected from metal-oxide-semiconductor, triode or diode.
As mentioned above, the quick erasable method of operating of a kind of phase change memory of the present invention and a kind of quick erasable method of operating of phase change memory circuit have following beneficial effect:
The present invention is before applying common SET pulse, apply first one significantly, the pre-programmed pulse of short time, so that all phase-change memory cells all surmount the switching threshold of phase transformation, enter fast programmed state, can just finish high resistant to the transformation of low-resistance with the short period with after-applied programming pulse, and have more excellent low-resistance distribution.
Description of drawings
Fig. 1 is shown as the tradition for traditional phase transition storage is programmed of the prior art and wipes operating impulse ripple schematic diagram.
Fig. 2 is shown as the double square SET pulsating wave schematic diagram of the wiping operation of phase change memory of the present invention.
Fig. 3 is shown as the SET pulsating wave schematic diagram with rate of decay negative edge of the wiping operation of phase change memory of the present invention.
Fig. 4 is shown as quick erasable phase change memory circuitry block diagram of the present invention.
Embodiment
Below by specific instantiation explanation embodiments of the present invention, those skilled in the art can understand other advantages of the present invention and effect easily by the disclosed content of this instructions.The present invention can also be implemented or be used by other different embodiment, and the every details in this instructions also can be based on different viewpoints and application, carries out various modifications or change under the spirit of the present invention not deviating from.
Because there is the OTS effect in phase change resistor, when pulse is added in the phase change resistor unit, when voltage is higher than certain switching threshold, the resistivity of phase change resistor unit can descend suddenly, but this moment, phase change resistor did not have by actual program, if remove voltage, phase change resistor can come back to original resistance, pulse operation after exceeded threshold voltage is only real programming pulse, and we will be called for the pulse of exceeded threshold the pre-programmed pulse.
Can be divided into two parts, pre-programmed pulse and programming pulse for the SET pulse of phase transition storage being wiped operation.At first be to apply a pre-programmed pulse: its pulse height and RESET pulse height quite and the retention time be about for tens nanoseconds, less than the RESET running time, so that the phase-change material in the device cell can surmount rapidly switching threshold in a short time, enter programmed state.Be programming pulse with the SET pulse transition then: its amplitude is lower, and keeps certain hour, makes device cell reach Tc T
OptNear temperature, and preferably crystallization during this period of time occurs, phase change cells changes low resistance state into.
We know, the key character of RESET write operation is to apply a high-amplitude pulse signal, storage medium at first reaches and surmounts switching threshold, enter after the RESET programmed state, remove rapidly pulse signal and storage unit can be remained on amorphous state, shown in RESET programming pulse among Fig. 1.So the initial amplitude of SET pulse is during greater than traditional SET pulse, storer can reach temperature T
mOn, surmount switching threshold, enter programmed state, but because SET pulse retention time of this high-amplitude only is equivalent to the time that phase change cells surmounts switching threshold, and its follow-up pulse height decays to low pulse height, so that phase-change material temperature is reduced to Tc T
OptNear, directly enter the SET programming state.
As a preferred embodiment of the present invention, described SET programming pulse is formed by the double square pulse combined, as shown in Figure 2.Pulse 1 is the pre-programmed pulse, and its amplitude and RESET pulsion phase are worked as, and electric current reaches I
1, the time less than the RESET write operation time, so that phase-change memory cell surmounts switching threshold, enters programmed state about 30ns.Pulse 2 is programming pulse: its pulse height is suitable with traditional SET pulse height, and electric current is about I
2, owing to having surmounted switching threshold, its time will be much smaller than traditional SET heat time heating time.The two-way pulse is applied on the phase-change memory cell, and the quick SET that consists of dipulse wipes operation.
As another kind of preferred version of the present invention, described SET programming pulse is comprised of pre-programmed pulse and the programming pulse with negative edge of variable slope, as shown in Figure 3.After applying the pre-programmed pulse, phase change cells surmounts switching threshold fast, enter programmed state, applying the programming pulse that negative edge has variable slope can be so that the Tc variation range of storage unit increases, and current amplitude can produce Tc T in phase change cells as much as possible
Opt, in order to distribute for these unit provide optimum SET operation resistance.Wherein, rear slope rate of decay along part can comprise, polynomial expression, and to numerical expression, exponential form etc.
The speed of current phase transition storage write operation (being the RESET programming process) is about arriving tens nanoseconds in the hundreds of nano-seconds, and the speed of wiping operation (being the SET programming process) is about the millisecond magnitude, RESET and SET programming process all need at first to surmount the switching threshold of phase-change memory cell, enter programming state again.If can in the SET programming process, make rapidly phase-change memory cell surmount its switching threshold, can promote and wipe the running time, will significantly promote the program speed of phase transition storage.
In one embodiment, be divided into two parts, pre-programmed pulse and programming pulse for the SET pulse of phase transition storage being wiped operation.At first be to apply a pre-programmed pulse: its pulse height is suitable with the RESET pulse height, and pulsewidth is about between 10ns ~ 100ns, about preferred 30ns, less than the RESET running time, so that the phase-change material in the storage unit can surmount rapidly switching threshold in a short time, enter programmed state.Be programming pulse with the SET pulse transition then: its amplitude is lower, and keeps certain hour, makes storage unit reach near the temperature of Tc Topt, and preferably crystallization during this period of time occurs, and phase-change memory cell changes low resistance state into.
See also Fig. 1 to Fig. 4.Need to prove, the diagram that provides in the present embodiment only illustrates basic conception of the present invention in a schematic way, satisfy only show in graphic with the present invention in relevant assembly but not component count, shape and size drafting when implementing according to reality, kenel, quantity and the ratio of each assembly can be a kind of random change during its actual enforcement, and its assembly layout kenel also may be more complicated.
Embodiment 1
Figure 4 shows that quick erasable phase change memory circuit block diagram of the present invention, comprise driving circuit, storage array, decoding scheme and reading circuit.Wherein, driving circuit provides programming operation for phase-change memory cell.Storage array is in series by phase-change memory cell and gate tube, and wherein gate tube can be metal-oxide-semiconductor, triode, diode etc.The switch of gate tube when phase-change memory cell need to be wiped operation, is chosen specific word line and bit line by word line selection circuit passband and bit line gating circuit by the word line traffic control.Driving circuit produces wipes the operating current pulse, flow to institute's gating bit line, and the gating bit line links to each other with storage unit, so that electric current can flow through storage unit.
The design of programming operation is finished by driving circuit, and common control circuit is: by the electric current that current mirror provides several roads to vary in size, controlled switch and the ON time of each road electric current by Logic control module.As shown in Figure 2, when carrying out the RESET programming, generally select maximum current, tens nanoseconds are to the ON time of hundreds of nanosecond.When carrying out the SET programming, at first open all current paths, and its ON time is controlled between the 10ns to 100ns, about preferred 30ns, finish the pre-programmed operation, next turns off the heavy current pulse path, keeps little current impulse path to programming and finishes, its current impulse flow to the gating phase-change memory cell by bit line, finishes and wipes operation.Pre-programmed pulse and programming pulse are double square.
Embodiment 2
As the preferred embodiment of the present invention two, for the loose phase transition storage of low resistance distribution that is caused by technique making, temperature, material etc., when carrying out the SET programming, as shown in Figure 3, at first open all current paths, keeping its ON time is between the 10ns to 100ns, about preferred 30ns, finish the pre-programmed operation, its programming pulse current path is controlled by logic control circuit subsequently, can select to turn-off successively, make it be formed with the current impulse of stepped negative edge.Different logic control operations can form the current impulse with different negative edge forms, flow in the phase-change memory cell, when improving the SET program speed, have also improved the distribution of resistance consistance.
Embodiment 3
For quick SET operation, can utilize different type of drive to finish, comprise the Logic control module slightly doing to change, drive circuit module etc.The circuit operation that also can be not limited in the chip is finished quick SET operation, can wipe fast operation by sent above-mentioned SET pulse to phase-change memory cell by external unit.
In sum, the present invention relates to a kind of quick erasable method of operating of the phase change memory take phase-change material as phase-change memory cell and a kind of quick erasable method of operating of phase change memory circuit, purpose is to improve the SET program speed of phase-change memory cell.So the present invention has effectively overcome various shortcoming of the prior art and the tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not is used for restriction the present invention.Any person skilled in the art scholar all can be under spirit of the present invention and category, and above-described embodiment is modified or changed.For example, phase-change material can be the phase-change material that chalcogenide alloy maybe can be used as other suitable structures of programmable phase-change memory; Pulse signal can be that current impulse also can be potential pulse; The type of drive of SET pulse can be finished by the chip internal circuit, also can finish by external unit.Therefore, have in the technical field under such as and know that usually the knowledgeable modifies or changes not breaking away from all equivalences of finishing under disclosed spirit and the technological thought, must be contained by claim of the present invention.
Claims (10)
1. the quick erasable method of operating of a phase change memory, it is characterized in that, the SET programming pulse of wiping operation is followed successively by pre-programmed pulse and programming pulse, described pre-programmed pulse is so that phase-change memory cell surmounts the switching threshold of phase transformation, and the retention time is less than the RESET pulse operation time of write operation.
2. the quick erasable method of operating of a kind of phase change memory according to claim 1, it is characterized in that: described pre-programmed pulse height is suitable with RESET programming pulse amplitude.
3. the quick erasable method of operating of a kind of phase change memory according to claim 2, it is characterized in that: described SET programming pulse is formed by the double square pulse combined.
4. the quick erasable method of operating of a kind of phase change memory according to claim 1, it is characterized in that: the pulsewidth of described pre-programmed pulse is 10ns to 100ns.
5. the quick erasable method of operating of a kind of phase change memory according to claim 1 is characterized in that: described programming pulse forms for the pulse by the rate of decay negative edge.
6. the quick erasable method of operating of a kind of phase change memory according to claim 5 is characterized in that: describedly have the rate of decay of the pulse of rate of decay negative edge to comprise polynomial expression, to numerical expression and exponential form.
7. the quick erasable method of operating of a phase change memory circuit, it is characterized in that: the phase change memory circuit of described quick erasable operation comprises logic control circuit, memory cell array and the driving circuit that is communicated with this logic control circuit respectively, word line selection siphunculus, bit line gate tube and reading circuit; Described word line selection siphunculus and bit line gate tube are communicated with memory cell array respectively; Described reading circuit is communicated with the bit line gate tube; The current impulse that some roads that described driving circuit comprises to be provided by current mirror vary in size; Described Logic control module is controlled switch and the ON time of each path; When carrying out wiping operation SET programming, open each path and form pre-programmed pulse, flow into the bit line gate tube, then flow in the selected phase-change memory cell, finish pre-programmed and operate; Turn off subsequently large current path, the programming pulse of output is programmed to selected phase-change memory cell; Described pre-programmed pulse is so that phase-change memory cell surmounts the switching threshold of phase transformation, and the retention time is less than the RESET pulse operation time of write operation.
8. the quick erasable method of operating of a kind of phase change memory circuit according to claim 7, it is characterized in that: the pre-programmed pulse height is suitable with the RESET pulse height, and its pulsewidth is 10ns to 100ns.
9. the quick erasable method of operating of a kind of phase change memory circuit according to claim 7 is characterized in that: after finishing the pre-programmed operation, turn-off successively all current paths, make it be formed with the pulse of stepped negative edge.
10. the quick erasable method of operating of a kind of phase change memory circuit according to claim 7, it is characterized in that: described word line selection siphunculus and bit line gate tube are selected from metal-oxide-semiconductor, triode or diode.
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| CN106104695A (en) * | 2014-04-29 | 2016-11-09 | 密克罗奇普技术公司 | Keep strengthening by wiping the memory cell of status modifier |
| CN108417237A (en) * | 2018-03-23 | 2018-08-17 | 上海新储集成电路有限公司 | A method of accelerating phase transition storage write operation speed |
| CN110797064A (en) * | 2019-10-31 | 2020-02-14 | 重庆邮电大学 | Low-power-consumption phase change memory initialization operation method |
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