CN102916781A - Calibration method and calibration device - Google Patents
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Abstract
The embodiment of the invention discloses a calibration method and a calibration device. The calibration method comprises the following steps: receiving parallel data, wherein the byte number of the parallel data is X, the bit width of the parallel data is Y bytes, and X and Y are both positive integers; using a cyclic redundancy check CRC circuit to calculate the parallel data, to obtain a first CRC value; comparing to determine whether the first CRC value and a second CRC value are the same, wherein the second CRC value is a CRC value obtained by performing CRC to the first data, the first data is one obtained by adding data with M bytes to the tail part of the second data, the second data is one obtained by adding a third CRC value to the tail part of a third data, the third CRC value is the CRC value of the third data, and M is equal to a remainder obtained by using Y to subtract X and then divide Y; and determining that the parallel data passes through the CRC if the first CRC value is equal to the second CRC value. The technical scheme only needs one CRC circuit. Compared with the prior art, the technical scheme requires less hardware sources.
Description
Technical field
The present invention relates to technical field of data processing, particularly relate to a kind of method of calibration and calibration equipment.
Background technology
CRC(Cyclic Redundancy Check, cyclic redundancy check (CRC)) technology is widely used in data communication field.CRC can table look-up or the hardware realization by software.High-speed data is carried out CRC, generally realize by hardware.
In the prior art, be the parallel data of a plurality of bytes when carrying out CRC by hardware to bit wide, need a plurality of CRC circuit.For instance, be that the parallel data of 4 bytes is carried out CRC for bit wide, need 1 CRC circuit, 2 CRC circuit, 3 CRC circuit and 4 CRC circuit that byte is corresponding that byte is corresponding that byte is corresponding that byte is corresponding.It is more that prior art is to bit wide that the parallel data of a plurality of bytes is carried out the hardware resource that CRC needs.
Summary of the invention
A kind of CRC check method and device are provided in the embodiment of the invention, can have reduced required hardware resource.
In order to solve the problems of the technologies described above, the embodiment of the invention discloses following technical scheme:
First aspect provides a kind of method of calibration, comprising:
Receive parallel data, the byte number of described parallel data is X, and the bit wide of described parallel data is Y byte, and X is positive integer, and Y is positive integer;
Adopt the CRC circuit that described parallel data is carried out computing, obtain the first crc value;
Whether more described the first crc value is identical with the second crc value, described the second crc value is that the first data are carried out the crc value that CRC obtains, the data that described the first data obtain for the data of adding M byte at the afterbody of the second data, described the second data are added the data that the 3rd crc value obtains for the afterbody in the 3rd data, described the 3rd crc value is the crc value of described the 3rd data, and M equals Y and deducts X divided by the remainder of Y;
If described the first crc value is identical with described the second crc value, then definite described parallel data is passed through CRC.
In conjunction with described first aspect, in the possible implementation of the first of described first aspect, the described CRC circuit of described employing carries out computing to described parallel data and comprises:
If X is not equal to 0 divided by the remainder of Y, then the afterbody in described parallel data adds the 4th data, and the length of described the 4th data is M byte, obtains new parallel data;
Adopt described CRC circuit that described new parallel data is carried out computing.
In conjunction with described first aspect, or the possible implementation of the first of described first aspect, in the possible implementation of the second of described first aspect, the described CRC circuit of described employing carries out computing to described parallel data and comprises:
If X equals 0 divided by the remainder of Y, then not in the afterbody interpolation data of described parallel data, adopt described CRC circuit that described parallel data is carried out computing.
In conjunction with described first aspect, or the possible implementation of the first of described first aspect, or the possible implementation of the second that provides of described first aspect, in the third possible implementation that described first aspect provides, before whether more described the first crc value and described the second crc value be identical, described method also comprised:
Add respectively the data of 1 to Y byte at the afterbody of described the second data, obtain Y data;
Respectively described Y data are carried out CRC, obtain Y crc value;
Determine in the described Y crc value with a described Y data in to add crc value corresponding to data that the data of a described M byte obtain by the afterbody in described the second data be described the second crc value.
Second aspect provides a kind of calibration equipment, comprising:
Receiving element is used for receiving parallel data, and the byte number of described parallel data is X, and the bit wide of described parallel data is Y byte, and X is positive integer, and Y is positive integer;
The CRC circuit is used for the described parallel data that described receiving element receives is carried out computing, obtains the first crc value;
Comparing unit, whether described the first crc value that is used for more described CRC circuit evolving is identical with the second crc value, described the second crc value is that the first data are carried out the crc value that CRC obtains, the data that described the first data obtain for the data of adding M byte at the afterbody of the second data, described the second data are added the data that the 3rd crc value obtains for the afterbody in the 3rd data, described the 3rd crc value is the crc value of described the 3rd data, and M equals Y and deducts X divided by the remainder of Y;
The first determining unit is that described the first crc value is identical with described the second crc value if be used for the comparative result of described comparing unit, and then definite described parallel data is passed through CRC.
In conjunction with described second aspect, in the possible implementation of the first of described second aspect, described CRC circuit specifically is used for:
If X is not equal to 0 divided by the remainder of Y, then the afterbody in described parallel data adds the 4th data, and the length of described the 4th data is M byte, obtains new parallel data;
Described new parallel data is carried out computing.
In conjunction with described second aspect, or the possible implementation of the first of described second aspect, in the possible implementation of the second of described second aspect, described CRC circuit specifically is used for:
If X equals 0 divided by the remainder of Y, then not in the afterbody interpolation data of described parallel data, described parallel data is carried out computing.
In conjunction with described second aspect, or the possible implementation of the first of described second aspect, or the possible implementation of the second of described second aspect, in the third possible implementation of described second aspect, described calibration equipment also comprises:
Adding device, the data for add respectively 1 to Y byte at the afterbody of described the second data obtain Y data;
Computing unit, described Y data that are used for respectively described adding device being generated are carried out CRC, obtain Y crc value;
Adding crc value corresponding to data that the data of a described M byte obtain by the afterbody in described the second data in described Y the data that the second determining unit, described Y the crc value that is used for that definite described computing unit obtains before more described the first crc value of described comparing unit and described the second crc value be whether identical and described adding device obtain is described the second crc value.
The third aspect, a kind of network equipment is provided, the described network equipment comprises described second aspect, or the possible implementation of the first of described second aspect, or the possible implementation of the second of described second aspect, or the calibration equipment that provides of the third possible implementation of described second aspect.
In the technique scheme, whether identical with described the second crc value by described first crc value of described CRC circuit evolving corresponding to the bit wide of more described parallel data, can determine whether described parallel data passes through CRC.That is to say, technique scheme only needs a CRC circuit.In prior art, be the technical scheme that the parallel data of a plurality of bytes is carried out a plurality of CRC circuit that CRC check needs to bit wide, the required hardware resource of technique scheme is less.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art, apparently, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
A kind of method of calibration flow chart that Fig. 1 embodiment of the invention provides;
A kind of method flow diagram that obtains Y data that the second data are processed that Fig. 2 embodiment of the invention provides;
The structural representation of a kind of calibration equipment that Fig. 3 provides for the embodiment of the invention;
The structural representation of a kind of calibration equipment that Fig. 4 provides for the embodiment of the invention.
Embodiment
In order to make those skilled in the art person understand better technical scheme in the embodiment of the invention, and the above-mentioned purpose of the embodiment of the invention, feature and advantage can be become apparent more, below in conjunction with accompanying drawing technical scheme in the embodiment of the invention is described in further detail.
The flow chart of a kind of method of calibration that Fig. 1 provides for the embodiment of the invention.Referring to Fig. 1, described method comprises:
101, receive parallel data.
For instance, 101 executive agent can be receiver.
For instance, described parallel data can obtain in the following way:
Deserializer is processed the serial data that receives, and is converted into described parallel data.
The byte number of described parallel data is X, and the bit wide of parallel data is Y byte, and wherein, X is positive integer, and Y is positive integer.For instance, the value of Y can be 1,2 or 3.
102, adopt the CRC circuit that described parallel data is carried out computing, obtain the first crc value.
For instance, 102 executive agent can be hardware circuit, ASIC(Application SpecificIntegrated Circuit for example, application-specific integrated circuit (ASIC)) or FPGA(Field-Programmable Gate Array, field programmable gate array).
Those skilled in the art will appreciate that described CRC circuit is the circuit corresponding with the bit wide of described parallel data.
103, whether more described the first crc value is identical with the second crc value.
Described the second crc value is that the first data are carried out the crc value that CRC obtains, the data that described the first data obtain for the data of adding M byte at the afterbody of the second data, described the second data are added the data that the 3rd crc value obtains for the afterbody in the 3rd data, described the 3rd crc value is the crc value of described the 3rd data, M equals Y and deducts X divided by the remainder of Y, be M=Y-MOD (X, Y).MOD (X, Y) equals X divided by the remainder of Y.The data of a described M byte can be constants, for example can be M byte 0 an or M byte 1.
For instance, 103 executive agent can be comparator.
104, if described the first crc value is identical with described the second crc value, then definite described parallel data is passed through CRC.
104 executive agent can be central processing unit (central processing unit, CPU), also can be network processing unit (network processor, NP).For example, 104 executive agent can be the retransmission unit of described NP.For instance, if described retransmission unit is determined described parallel data by CRC, described retransmission unit can be transmitted described parallel data.If described retransmission unit is determined described parallel data not by CRC, described retransmission unit can abandon described parallel data.
Those skilled in the art will appreciate that in the technique scheme, if described the 3rd data are got different values, described the second data also must be got different values, and described the first data also must be got different values, but described the second crc value is got identical value.
For example, if the 3rd data are 0x55, adopting ether CRC32 that the 3rd data are carried out described the 3rd crc value that computing obtains is 0xfb4a03c9, then adding the data that described the 3rd crc value obtains at the afterbody of described the 3rd data is 0x55fb4a03c9, also is that described the second data are 0x55fb4a03c9.The data of adding N byte in this second data trailer obtain described the first data.Described the first data are 0x55fb4a03c900.The data of a described N byte are 0x00.Wherein, N is 1.Then these first data are carried out CRC and calculate, for example adopt ether CRC32, the crc value of described first data of acquisition is 0x1df722c6.Therefore, described the second crc value is 0x1df722c6.
If the 3rd data are 0x55aa, adopting ether CRC32 that the 3rd data are carried out described the 3rd crc value that computing obtains is 0x18f116b0, then adding the data that described the 3rd crc value obtains at the afterbody of described the 3rd data is 0x55aa18f116b0, also is that described the second data are 0x55aa18f116b0.The data of also adding N byte in this second data trailer obtain described the first data.Described the first data are 0x55aa18f116b000, and the data of a described N byte are 0x00.Wherein, N is 1.Then these first data are carried out CRC and calculate, for example adopt ether CRC32, the crc value of described first data of acquisition also is 0x1df722c6.Therefore, described the second crc value is 0x1df722c6.
If the 3rd data are 0x55aa55, adopting ether CRC32 that the 3rd data are carried out described the 3rd crc value that computing obtains is 0x51c4dfda, then adding the data that described the 3rd crc value obtains at the afterbody of described the 3rd data is 0x55aa5551c4dfda, also is that described the second data are 0x55aa5551c4dfda.The data of also adding N byte in this second data trailer obtain described the first data.Described the first data are 0x55aa5551c4dfda00, and the data of a described N byte are 0x00.Wherein, N is 1.Then these first data are carried out CRC and calculate, for example adopt ether CRC32, the crc value of described first data of acquisition also is 0x1df722c6.Therefore, described the second crc value is 0x1df722c6.
Can find out according to foregoing description, described the second crc value is relevant with M, and is with described the 3rd data independence, with described the second data independence, irrelevant with the value of a described M byte.After the value of M was determined, described the second crc value was also determined.According to above-mentioned rule, after obtaining the first crc value of described parallel data, if the first crc value is identical with described the second crc value, can determine that then described parallel data passes through CRC.
In the technique scheme, whether identical with described the second crc value by described first crc value of described CRC circuit evolving corresponding to the bit wide of more described parallel data, can determine whether described parallel data passes through CRC.That is to say, technique scheme only needs a CRC circuit.In prior art, be the technical scheme that the parallel data of a plurality of bytes is carried out a plurality of CRC circuit that CRC check needs to bit wide, the required hardware resource of technique scheme is less.
Optionally, in the method shown in Figure 1, adopting described CRC circuit that described parallel data is carried out computing can comprise:
If X is not equal to 0 divided by the remainder of Y, then the afterbody in described parallel data adds the 4th data, and the length of described the 4th data is M byte, obtains new parallel data; The 4th data can be constants, such as can be M byte 0 an or M byte 1 etc.The byte length of the data that the byte length of the 4th data and the second data trailer are added is M.
Adopt described CRC circuit that described new parallel data is carried out computing.
Optionally, in the method shown in Figure 1, adopting described CRC circuit that described parallel data is carried out computing can comprise:
If X equals 0 divided by the remainder of Y, then not in the afterbody interpolation data of described parallel data, adopt described CRC circuit that described parallel data is carried out computing.
Optionally, in the method shown in Figure 1, before whether more described the first crc value and described the second crc value be identical, the method can also comprise:
201, add respectively the data of 1 to Y byte at the afterbody of described the second data, obtain Y data.
For example, if the bit wide of described parallel data is 8 bytes, then add respectively the data of 1 to 8 byte at the afterbody of described the second data, obtain 8 data.Adding data that the data of 4 bytes obtain at the afterbody of described the second data is data in described 8 data.
202, respectively described Y data are carried out CRC, obtain Y crc value.
For instance, after obtaining a described Y crc value, a described Y crc value can be stored, concrete, the byte number of interpolation and corresponding crc value thereof can be stored with the form of tabulation.
203, determine in the described Y crc value with a described Y data in to add the data that the data of a described M byte obtain by the afterbody in described the second data be described the second crc value for corresponding crc value.
For instance, if the byte number of described parallel data is 36, the bit wide of described parallel data is 8 bytes, then according to formula M=Y-MOD(X, Y) can determine that M is 4, the data that then data of adding described 4 bytes in described the second data trailer in described 8 data obtained are as described the first data.Crc value corresponding to described the first data is described the second crc value.
About 201,202 and 203, specifically see also Fig. 2.
The structural representation of a kind of calibration equipment that Fig. 3 provides for the embodiment of the invention.Described calibration equipment can be carried out method shown in Figure 1.Referring to Fig. 3, described calibration equipment comprises:
Receiving element 301 is used for receiving parallel data, and the byte number of described parallel data is X, and the bit wide of described parallel data is Y byte, and X is positive integer, and Y is positive integer.
For instance, described receiving element 301 can be receiver.
For instance, described parallel data can obtain in the following way:
Deserializer is processed the serial data that receives, and is converted into described parallel data.
The byte number of described parallel data is X, and the bit wide of parallel data is Y byte, and wherein, X is positive integer, and Y is positive integer.For instance, the value of Y can be 1,2 or 3.
For instance, described CRC circuit 302 can be hardware circuit.Described hardware circuit can be ASIC or FPGA.
Those skilled in the art will appreciate that described CRC circuit is the circuit corresponding with the bit wide of described parallel data.
Comparing unit 303, whether described the first crc value that is used for more described cyclic redundancy check (CRC) circuit 302 generations is identical with the second crc value, described the second crc value is that the first data are carried out the crc value that CRC obtains, the data that described the first data obtain for the data of adding M byte at the afterbody of the second data, described the second data are added the data that the 3rd crc value obtains for the afterbody in the 3rd data, described the 3rd crc value is the crc value of described the 3rd data, and M equals Y and deducts X divided by the remainder of Y.
Described the second crc value is that the first data are carried out the crc value that CRC obtains, the data that described the first data obtain for the data of adding M byte at the afterbody of the second data, described the second data are added the data that the 3rd crc value obtains for the afterbody in the 3rd data, described the 3rd crc value is the crc value of described the 3rd data, M equals Y and deducts X divided by the remainder of Y, be M=Y-MOD (X, Y).MOD (X, Y) equals X divided by the remainder of Y.The data of a described M byte can be constants, for example can be M byte 0 an or M byte 1.
For instance, described comparing unit 303 can be comparator.
The first determining unit 304 is that described the first crc value is identical with described the second crc value if be used for the comparative result of described comparing unit 303, and then definite described parallel data is passed through CRC.
Described the first determining unit 304 can be CPU, also can be NP.For example, described the first determining unit 304 can be the retransmission unit of described NP.For instance, if described retransmission unit is determined described parallel data by CRC, described retransmission unit can be transmitted described parallel data.If described retransmission unit is determined described parallel data not by CRC, described retransmission unit can abandon described parallel data.
Whether above-mentioned calibration equipment is identical with described the second crc value by described first crc value of described CRC circuit evolving corresponding to the bit wide of more described parallel data, can determine whether described parallel data passes through CRC.That is to say, above-mentioned calibration equipment only needs a CRC circuit.In prior art, be the device that the parallel data of a plurality of bytes is carried out a plurality of CRC circuit that CRC check needs to bit wide, the required hardware resource of above-mentioned calibration equipment is less.
Optionally, in the calibration equipment shown in Figure 3, described CRC circuit specifically can be used for: if X is not equal to 0 divided by the remainder of Y, then the afterbody in described parallel data adds the 4th data, and the length of described the 4th data is M byte, obtains new parallel data; Described new parallel data is carried out computing.
Optionally, in the calibration equipment shown in Figure 3, described CRC circuit specifically can be used for: if X equals 0 divided by the remainder of Y, then do not add data at the afterbody of described parallel data, described parallel data is carried out computing.
Optionally, in the calibration equipment shown in Figure 3, can also comprise:
Adding device 405, the data for add respectively 1 to Y byte at the afterbody of described the second data obtain Y data;
Adding crc value corresponding to data that the data of a described M byte obtain by the afterbody in described the second data in described Y the data that the second determining unit 407, described Y the crc value that is used for that definite described computing unit 406 obtains before described comparing unit 303 more described the first crc values and described the second crc value be whether identical and described adding device 405 obtain is described the second crc value.
For instance, whether described comparing unit 303 can identical with described the second crc value according to more described the first crc value of described the second crc value that described the second determining unit 407 is determined.
About described adding device 405, described computing unit 406 and described the second determining unit 407, specifically see also Fig. 4.
The embodiment of the invention also provides a kind of network equipment, and this network equipment comprises calibration equipment shown in Figure 3 or calibration equipment shown in Figure 4.
For instance, the described network equipment can be router, switch, Broadband Remote Access Server (broadbandremote access server, BRAS), fire compartment wall or load equalizer.
Those of ordinary skills can recognize, unit and the algorithm steps of each example of describing in conjunction with embodiment disclosed herein can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions are carried out with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.The professional and technical personnel can specifically should be used for realizing described function with distinct methods to each, but this realization should not thought and exceeds scope of the present invention.
The those skilled in the art can be well understood to, and is the convenience described and succinct, and the specific works process of the system of foregoing description, device and unit can with reference to the corresponding process among the preceding method embodiment, not repeat them here.
In several embodiment that the application provides, should be understood that disclosed system, apparatus and method can realize by another way.For example, device embodiment described above only is schematic, for example, the division of described unit, only be that a kind of logic function is divided, during actual the realization other dividing mode can be arranged, for example a plurality of unit or assembly can in conjunction with or can be integrated into another system, or some features can ignore, or do not carry out.Another point, the shown or coupling each other discussed or direct-coupling or communication connection can be by some interfaces, indirect coupling or the communication connection of device or unit can be electrically, machinery or other form.
Described unit as separating component explanation can or can not be physically to separate also, and the parts that show as the unit can be or can not be physical locations also, namely can be positioned at a place, perhaps also can be distributed on a plurality of network element.Can select according to the actual needs wherein some or all of unit to realize the purpose of the present embodiment scheme.
In addition, each functional unit in each embodiment of the present invention can be integrated in the processing unit, also can be that the independent physics of unit exists, and also can be integrated in the unit two or more unit.
If described function realizes with the form of SFU software functional unit and during as independently production marketing or use, can be stored in the computer read/write memory medium.Based on such understanding, the part that technical scheme of the present invention contributes to prior art in essence in other words or the part of this technical scheme can embody with the form of software product, this computer software product is stored in the storage medium, comprise that some instructions are with so that a computer equipment (can be personal computer, server, the perhaps network equipment etc.) or processor (processor) carry out all or part of step of the described method of each embodiment of the present invention.And aforesaid storage medium comprises: the various media that can be program code stored such as USB flash disk, portable hard drive, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disc or CD.
The above; be the specific embodiment of the present invention only, but protection scope of the present invention is not limited to this, anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion by described protection range with claim.
Claims (9)
1. a method of calibration is characterized in that, comprising:
Receive parallel data, the byte number of described parallel data is X, and the bit wide of described parallel data is Y byte, and X is positive integer, and Y is positive integer;
Adopt the cyclic redundancy check (CRC) circuit that described parallel data is carried out computing, obtain the first crc value;
Whether more described the first crc value is identical with the second crc value, described the second crc value is that the first data are carried out the crc value that CRC obtains, the data that described the first data obtain for the data of adding M byte at the afterbody of the second data, described the second data are added the data that the 3rd crc value obtains for the afterbody in the 3rd data, described the 3rd crc value is the crc value of described the 3rd data, and M equals Y and deducts X divided by the remainder of Y;
If described the first crc value is identical with described the second crc value, then definite described parallel data is passed through CRC.
2. method according to claim 1 is characterized in that, the described CRC circuit of described employing carries out computing to described parallel data and comprises:
If X is not equal to 0 divided by the remainder of Y, then the afterbody in described parallel data adds the 4th data, and the length of described the 4th data is M byte, obtains new parallel data;
Adopt described CRC circuit that described new parallel data is carried out computing.
3. method according to claim 1 and 2 is characterized in that, the described CRC circuit of described employing carries out computing to described parallel data and comprises:
If X equals 0 divided by the remainder of Y, then not in the afterbody interpolation data of described parallel data, adopt described CRC circuit that described parallel data is carried out computing.
4. arbitrary described method in 3 according to claim 1 is characterized in that, before whether more described the first crc value and described the second crc value be identical, described method also comprised:
Add respectively the data of 1 to Y byte at the afterbody of described the second data, obtain Y data;
Respectively described Y data are carried out CRC, obtain Y crc value;
Determine in the described Y crc value with a described Y data in to add crc value corresponding to data that the data of a described M byte obtain by the afterbody in described the second data be described the second crc value.
5. a calibration equipment is characterized in that, comprising:
Receiving element is used for receiving parallel data, and the byte number of described parallel data is X, and the bit wide of described parallel data is Y byte, and X is positive integer, and Y is positive integer;
The cyclic redundancy check (CRC) circuit is used for the described parallel data that described receiving element receives is carried out computing, obtains the first crc value;
Comparing unit, whether described the first crc value that is used for more described CRC circuit evolving is identical with the second crc value, described the second crc value is that the first data are carried out the crc value that CRC obtains, the data that described the first data obtain for the data of adding M byte at the afterbody of the second data, described the second data are added the data that the 3rd crc value obtains for the afterbody in the 3rd data, described the 3rd crc value is the crc value of described the 3rd data, and M equals Y and deducts X divided by the remainder of Y;
The first determining unit is that described the first crc value is identical with described the second crc value if be used for the comparative result of described comparing unit, and then definite described parallel data is passed through CRC.
6. calibration equipment according to claim 5 is characterized in that, described CRC circuit specifically is used for:
If X is not equal to 0 divided by the remainder of Y, then the afterbody in described parallel data adds the 4th data, and the length of described the 4th data is M byte, obtains new parallel data;
Described new parallel data is carried out computing.
7. according to claim 5 or 6 described calibration equipments, it is characterized in that, described CRC circuit specifically is used for:
If X equals 0 divided by the remainder of Y, then not in the afterbody interpolation data of described parallel data, described parallel data is carried out computing.
8. arbitrary described calibration equipment in 7 according to claim 5 is characterized in that, described calibration equipment also comprises:
Adding device, the data for add respectively 1 to Y byte at the afterbody of described the second data obtain Y data;
Computing unit, described Y data that are used for respectively described adding device being generated are carried out CRC, obtain Y crc value;
Adding crc value corresponding to data that the data of a described M byte obtain by the afterbody in described the second data in described Y the data that the second determining unit, described Y the crc value that is used for that definite described computing unit obtains before more described the first crc value of described comparing unit and described the second crc value be whether identical and described adding device obtain is described the second crc value.
9. a network equipment is characterized in that, the described network equipment comprises such as arbitrary described calibration equipment in the claim 5 to 8.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103701566A (en) * | 2013-12-18 | 2014-04-02 | 华为技术有限公司 | Check method and check device |
| CN105790887A (en) * | 2014-12-26 | 2016-07-20 | 上海贝尔股份有限公司 | Method and device for generating parallel CRC values for packets |
| CN107046541A (en) * | 2017-04-18 | 2017-08-15 | 深圳市法马新智能设备有限公司 | A kind of wireless receiving and dispatching encryption communication method and its device |
| CN112269424A (en) * | 2020-11-19 | 2021-01-26 | 珠海零边界集成电路有限公司 | Chip clock frequency calibration method, device, equipment and medium |
| CN112306741A (en) * | 2020-11-19 | 2021-02-02 | 山东云海国创云计算装备产业创新中心有限公司 | CRC (Cyclic redundancy check) method and related device |
| CN114006678A (en) * | 2021-11-01 | 2022-02-01 | 合肥国科天迅科技有限公司 | Method for FC-AE equipment to quickly obtain received frame source |
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| CN101527615A (en) * | 2009-04-07 | 2009-09-09 | 华为技术有限公司 | Implementation method of cyclic redundancy check (CRC) codes and device |
| CN102394719A (en) * | 2011-09-21 | 2012-03-28 | 浙江铭道通信技术有限公司 | Multichannel HDLC data processing method based on FPGA |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103701566A (en) * | 2013-12-18 | 2014-04-02 | 华为技术有限公司 | Check method and check device |
| CN103701566B (en) * | 2013-12-18 | 2017-09-12 | 华为技术有限公司 | A kind of method of calibration and device |
| CN105790887A (en) * | 2014-12-26 | 2016-07-20 | 上海贝尔股份有限公司 | Method and device for generating parallel CRC values for packets |
| CN107046541A (en) * | 2017-04-18 | 2017-08-15 | 深圳市法马新智能设备有限公司 | A kind of wireless receiving and dispatching encryption communication method and its device |
| CN107046541B (en) * | 2017-04-18 | 2023-02-03 | 深圳市法马新智能设备有限公司 | Wireless transceiving encryption communication method and device thereof |
| CN112269424A (en) * | 2020-11-19 | 2021-01-26 | 珠海零边界集成电路有限公司 | Chip clock frequency calibration method, device, equipment and medium |
| CN112306741A (en) * | 2020-11-19 | 2021-02-02 | 山东云海国创云计算装备产业创新中心有限公司 | CRC (Cyclic redundancy check) method and related device |
| CN112306741B (en) * | 2020-11-19 | 2022-12-23 | 山东云海国创云计算装备产业创新中心有限公司 | CRC (Cyclic redundancy check) method and related device |
| CN114006678A (en) * | 2021-11-01 | 2022-02-01 | 合肥国科天迅科技有限公司 | Method for FC-AE equipment to quickly obtain received frame source |
| CN114006678B (en) * | 2021-11-01 | 2024-04-19 | 合肥华控天芯科技有限公司 | Method for quickly acquiring source of received frame by FC-AE equipment |
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