CN105528325B - A kind of guard method and system of standard SPI protocol high-speed transfer - Google Patents
A kind of guard method and system of standard SPI protocol high-speed transfer Download PDFInfo
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Abstract
The invention discloses the guard methods and system of a kind of standard SPI protocol high-speed transfer; by way of adding CRC algorithm on the basis of existing standard SPI protocol; it can be when SPI protocol be applied to the data transmission environments of high frequency and high speed; reliable verification protection is improved, SPI protocol is enable more extensively, efficiently and reliably to be applied.The method of the present invention includes: that SPI host carries out CRC check to transmission data, and generates the first cyclic redundancy check；SPI host is increased the verification width type and the first cyclic redundancy check of CRC check by setting rule to transmission data, obtains examining transmission data；Verification transmission data are sent to SPI slave by SPI host；SPI slave parses transmission data, verification width type and the first cyclic redundancy check from verification transmission data by preset rules；SPI slave carries out CRC check to the transmission data parsed according to verification width type, obtains the second CRC validation code；The first cyclic redundancy check and the second CRC validation code are compared, comparing result is obtained.
Description
Technical field
The present embodiments relate to data processing fields, and in particular to a kind of protection side of standard SPI protocol high-speed transfer
Method and system.
Background technique
Serial Peripheral Interface (SPI) (Serial Peripheral Interface, SPI) agreement has been widely used for passing now
It unites among peripheral hardware, the SPI protocol of standard, such as SPI flash are operated.
SPI flash before is transmitted using the data of single line, and the clock of transmission is up to 50Mhz, at last very
High frequency., it is not only compatible with traditional 1 line of SPI flash at present
Data-transmission mode further increases 2 lines, and the transmission mode of 4 lines, clock frequency reaches 104MHz when two lines, 4
It can achieve 80Mhz when line, it is seen that the communication of SPI interface is simply transmitted by low speed, to the quick complexity of high frequency
Data transfer direction development.And since SPI transport protocol is simple, number of pin is few, is just being widely used in various electronics and is setting
The digital interface of standby communication, the application of the SPI interface understood at present, including memory SPI flash, SPI camera
Sensor, SPI tvout and SPI cmmb interface etc..
However due to the formulation of SPI standard agreement at the beginning of, be not included in the too many consideration of the transmission stability of SPI,
Do not expect that spi interface is just more and more widely used, and application also becomes increasingly complex, therefore SPI interface transmission is stablized
Property, increasingly severe test will be faced, also will appear more and more bottleneck problems.
Therefore existing SPI standard agreement how is improved, so as to provide stabilization for the complicated applications of SPI, reliable number
According to transmission protection mechanism, SPI protocol is enable to be compeled to be essential using as those skilled in the art more extensively, efficiently and reliably
It solves the problems, such as.
Summary of the invention
The embodiment of the invention provides the guard methods and system of a kind of standard SPI protocol high-speed transfer, by existing
The side of cyclic redundancy check (Cyclical Redundancy Check, CRC) algorithm is added on the basis of standard SPI protocol
Formula can improve reliable verification protection, make SPI protocol when SPI protocol is applied to the data transmission environments of high frequency and high speed
It can more extensively, efficiently and reliably be applied.
The guard method of standard SPI protocol high-speed transfer provided in an embodiment of the present invention, comprising:
SPI host and SPI slave, wherein the SPI host provides communication clock；
The SPI host carries out CRC check to transmission data, and generates the first cyclic redundancy check；
The SPI host is increased the verification width type and described the of CRC check by setting rule to the transmission data
One cyclic redundancy check obtains examining transmission data；
Verification transmission data are sent to the SPI slave by the SPI host；
The SPI slave parses transmission data, verification width by the preset rules from verification transmission data
Type and the first cyclic redundancy check；
The SPI slave carries out CRC check to the transmission data parsed according to the verification width type, obtains second
CRC validation code；
First cyclic redundancy check and the second CRC validation code are compared, comparing result is obtained；
It is handled according to the comparing result.
Optionally,
The SPI host is increased the verification width type and described the of CRC check by setting rule to the transmission data
One cyclic redundancy check, obtaining inspection transmission data includes:
The SPI host increases the verification width type and described the of CRC check to any position of the transmission data
One cyclic redundancy check obtains examining transmission data.
Optionally,
The CRC check is realized by software mode and/or hardware mode.
Optionally,
The comparing result includes that comparison is consistent and comparison is inconsistent.
Optionally,
It is described according to the comparing result carry out processing include:
It determines that the comparing result is consistent for comparison, then transmits and receives normal information to the SPI host；
It is inconsistent to compare to determine the comparing result, then returns to transmission abnormality information to the SPI host.
Optionally,
After the return transmission abnormality information to the SPI host further include:
The SPI host is retransmitted to the SPI slave examines transmission data.
The protection system of standard SPI protocol high-speed transfer provided in an embodiment of the present invention, comprising:
SPI host and SPI slave, wherein the SPI host provides communication clock；
The SPI host includes correction verification module, increases module, sending module；
The correction verification module for carrying out CRC check to transmission data, and generates the first cyclic redundancy check；
The increase module, for by setting rule to it is described transmission data increase CRC check verification width type and
First cyclic redundancy check obtains examining transmission data；
The sending module, for verification transmission data to be sent to the SPI slave；
The SPI slave includes parsing module, correction verification module, contrast module and processing module；
The parsing module, for parsing transmission data, school from verification transmission data by the preset rules
Test width type and the first cyclic redundancy check；
The correction verification module is obtained for carrying out CRC check to the transmission data parsed according to the verification width type
To the second CRC validation code；
The contrast module obtains comparison knot for comparing first cyclic redundancy check and the second CRC validation code
Fruit；
The processing module, for being handled according to the comparing result.
Optionally,
The processing module includes the first determination unit and the second determination unit:
First determination unit when for determining the comparing result to compare consistent, connects to SPI host transmission
Receive normal information；
Second determination unit when for determining the comparing result to compare inconsistent, is returned to the SPI host
Transmission abnormality information.
Optionally,
The SPI host further includes delivery module:
The delivery module examines transmission data for retransmitting to the SPI slave.
By way of adding CRC algorithm on the basis of existing standard SPI protocol, standard provided in an embodiment of the present invention
The guard method of SPI protocol high-speed transfer and system can when SPI protocol is applied to the data transmission environments of high frequency and high speed,
Reliable verification protection is improved, SPI protocol is enable more extensively, efficiently and reliably to be applied.
Detailed description of the invention
Fig. 1 is the guard method flow chart of first embodiment of standard SPI protocol high-speed transfer of the present invention；
Fig. 2 is the guard method flow chart of the second embodiment of standard SPI protocol high-speed transfer of the present invention；
Fig. 3 is the first structure diagram of the protection system of standard SPI protocol high-speed transfer of the present invention；
Fig. 4 is the second structural schematic diagram of the protection system of standard SPI protocol high-speed transfer of the present invention.
Specific embodiment
The embodiment of the invention provides the guard methods and system of a kind of standard SPI protocol high-speed transfer, by existing
The side of cyclic redundancy check (Cyclical Redundancy Check, CRC) algorithm is added on the basis of standard SPI protocol
Formula can improve reliable verification protection, make SPI protocol when SPI protocol is applied to the data transmission environments of high frequency and high speed
It can more extensively, efficiently and reliably be applied.
Cyclic redundancy check English name is Cyclical Redundancy Check, abbreviation CRC, it is to utilize to remove
Method and the principle of remainder do error detection (Error Detecting).When practical application, sending device calculates crc value
And it is sent to reception device together with data, reception device recalculates CRC to the data received and compared with the CRC received
Compared with if two crc value differences, illustrate that mistake occurs in data communication.
Referring to Fig. 1, the first embodiment packet of the guard method of Plays SPI protocol high-speed transfer of the embodiment of the present invention
It includes:
SPI host and SPI slave, wherein SPI host provides communication clock；
It should be noted that the differentiation of SPI host and SPI slave are as follows: SPI host is the sender of data, SPI slave
The as recipient of data, therefore the guard method of Plays SPI protocol high-speed transfer of the embodiment of the present invention can be used to SPI master
Machine sends the process of data to SPI slave, it can also be used to which SPI slave sends the process of data to SPI host, can also use simultaneously
The transmission process of various data, is not construed as limiting here between SPI host and SPI slave.
101, SPI host carries out CRC check to transmission data, and generates the first cyclic redundancy check；
Data are transmitted before being transmitted, SPI host carries out CRC check to transmission data first, and generates the first CRC
Check code.
102, SPI host is increased verification width type and the first CRC check of CRC check by setting rule to transmission data
Code obtains examining transmission data；
After obtaining the first cyclic redundancy check, SPI host is wide by the verification that setting rule increases CRC check to transmission data
Type and the first cyclic redundancy check are spent, obtains examining transmission data.
Above-mentioned setting rule can specifically include: increase the verification width type of CRC check before transmission data,
Increase by the first cyclic redundancy check behind transmission data.Specific setting rule can be set according to actual needs, herein
Place is not construed as limiting.
103, verification transmission data are sent to SPI slave by SPI host；
It obtains after examining transmission data, verification transmission data can be sent to SPI slave by SPI host.
104, SPI slave parses transmission data, verification width type and the from verification transmission data by preset rules
One cyclic redundancy check；
After SPI slave receives inspection transmission data, biography then is parsed from verification transmission data by preset rules
Transmission of data, verification width type and the first cyclic redundancy check.
It is stored in advance in SPI slave it should be noted that the preset rules in this step can be, it can also be
It receives from SPI host when data are transmitted in SPI slave acceptance inspection, is not construed as limiting here simultaneously.
105, SPI slave carries out CRC check to the transmission data parsed according to verification width type, obtains the 2nd CRC
Identifying code；
After obtaining transmission data and verifying width type, SPI slave is according to above-mentioned verification width type to parsing
It transmits data and carries out CRC check, available second CRC validation code.
106, the first cyclic redundancy check and the second CRC validation code are compared, comparing result is obtained；
After obtaining the second CRC validation code, the first cyclic redundancy check and the second CRC validation code are compared, comparing result is obtained.
107, it is handled according to comparing result.
The embodiment of the present invention includes SPI host and SPI slaves, and wherein SPI host provides communication clock；SPI host is first
CRC check is carried out to transmission data, and generates the first cyclic redundancy check；Then increase CRC check to transmission data by setting rule
Verification width type and the first cyclic redundancy check, obtain examine transmission data；Then will verification transmission data be sent to SPI from
Machine；SPI slave parses transmission data, verification width type and the first CRC check from verification transmission data by preset rules
Code；CRC check is carried out to the transmission data parsed then according to verification width type, obtains the second CRC validation code；Then right
Than the first cyclic redundancy check and the second CRC validation code, comparing result is obtained；Finally handled according to comparing result.By existing
There are the mode that CRC algorithm is added on the basis of standard SPI protocol, standard SPI protocol high-speed transfer provided in an embodiment of the present invention
Guard method can improve reliable verification protection when SPI protocol is applied to the data transmission environments of high frequency and high speed, make
SPI protocol more extensively, can be applied efficiently and reliably.
The first embodiment of the guard method of standard SPI protocol high-speed transfer of the present invention has been as briefly described above, below it is right
The second embodiment of the guard method of standard SPI protocol high-speed transfer of the present invention is described in detail, referring to Fig. 2, this hair
The guard method second embodiment of bright embodiment Plays SPI protocol high-speed transfer includes:
201, SPI host carries out CRC check to transmission data, and generates the first cyclic redundancy check；
Data are transmitted before being transmitted, SPI host carries out CRC check to transmission data first, and generates the first CRC
Check code.
It should be noted that CRC check of the invention can be realized by software mode and/or hardware mode, here
It is not construed as limiting.
202, SPI host is increased verification width type and the first CRC check of CRC check by setting rule to transmission data
Code obtains examining transmission data；
After obtaining the first cyclic redundancy check, SPI host is wide by the verification that setting rule increases CRC check to transmission data
Type and the first cyclic redundancy check are spent, obtains examining transmission data.
Above-mentioned setting rule can specifically include: increase the verification width type of CRC check before transmission data,
Increase by the first cyclic redundancy check behind transmission data.Specific setting rule can be set according to actual needs, herein
Place is not construed as limiting.Assuming that transmission data are eight-digit binary number data, verification width type is triad data, the first CRC
Check code is two bit binary datas, specifically respectively 10110101,101,11, and setting rule is before transmission data
Increase CRC check verification width type, transmission data below increase the first cyclic redundancy check, then examine transmit data be
1011011010111。
203, verification transmission data are sent to SPI slave by SPI host；
It obtains after examining transmission data, verification transmission data can be sent to SPI slave by SPI host.In SPI host
And in the case that the transmission of SPI slave is normal, and transmission data and rule are the data illustrated in step 202, SPI is received from chance
Data are transmitted in inspection to 1011011010111.
204, SPI slave parses transmission data, verification width type and the from verification transmission data by preset rules
One cyclic redundancy check；
After SPI slave receives inspection transmission data, biography then is parsed from verification transmission data by preset rules
Transmission of data, verification width type and the first cyclic redundancy check.It is normal in SPI host and the transmission of SPI slave, and transmit data and rule
In the case where being then the data illustrated in step 202, SPI is parsed from 1011011010111 inspection transmission data from chance
10110101 transmission data, 101 verification width type and 11 the first cyclic redundancy check out.
It is stored in advance in SPI slave it should be noted that the preset rules in this step can be, it can also be
It receives from SPI host when data are transmitted in SPI slave acceptance inspection, is not construed as limiting here simultaneously.
205, SPI slave carries out CRC check to the transmission data parsed according to verification width type, obtains the 2nd CRC
Identifying code；
After obtaining transmission data and verifying width type, SPI slave is according to above-mentioned verification width type to parsing
It transmits data and carries out CRC check, available second CRC validation code.
206, the first cyclic redundancy check and the second CRC validation code are compared, comparing result is obtained；
After obtaining the second CRC validation code, the first cyclic redundancy check and the second CRC validation code are compared, comparing result is obtained.
When SPI host and SPI slave transmission abnormality, can occur extremely in transmission data, verification width type and the
One cyclic redundancy check three it is any one or more in, if anomaly occurring in transmission data and verifying appointing for both width types
In meaning one or more, then the second CRC validation code obtained will be different with the first cyclic redundancy check, if anomaly occurring in the
In one cyclic redundancy check, then the second CRC validation code obtained is the first cyclic redundancy check before being abnormal, that is, is anomaly occurred in
Transmit data, verification width type and the first cyclic redundancy check three it is any one or more in, then the 2nd CRC obtained is tested
Demonstrate,proving code will be different with the first cyclic redundancy check.
207, it is handled according to comparing result；
Above-mentioned comparing result includes that comparison is consistent and comparison is inconsistent.So carrying out processing according to comparing result can wrap
It includes:
It determines that comparing result is consistent for comparison, thens follow the steps 208；It is inconsistent to compare to determine comparing result, then to SPI
Host returns to transmission abnormality information and executes step 209.
208, SPI slave transmits and receives normal information to SPI host；
Determine that the second CRC validation code and the comparison of the first cyclic redundancy check are consistent, SPI slave can be transmitted and received to SPI host
Normal information.
209, SPI host is retransmitted to SPI slave examines transmission data.
After SPI host receives transmission abnormality information, it can be retransmitted to SPI slave and examine transmission data, until really
Determine SPI slave and receives correctly transmission data.
By way of adding CRC algorithm on the basis of existing standard SPI protocol, standard provided in an embodiment of the present invention
The guard method of SPI protocol high-speed transfer can be when SPI protocol be applied to the data transmission environments of high frequency and high speed, and raising can
The verification protection leaned on enables SPI protocol more extensively, efficiently and reliably to be applied, in addition, the subsequent place to comparing result
Reason enables to the guard method of standard SPI protocol high-speed transfer of the present invention more perfect, can further increase standard SPI association
Discuss the protection of high speed transmission method.
The second embodiment of the guard method of standard SPI protocol high-speed transfer of the present invention has been as briefly described above, below it is right
The protection system embodiment of standard SPI protocol high-speed transfer of the present invention is described in detail, and please refers to Fig. 3 and Fig. 4, the present invention
The protection system embodiment of embodiment Plays SPI protocol high-speed transfer includes:
SPI host 31 and SPI slave 32, wherein SPI host 31 provides communication clock；
SPI host 31 includes correction verification module 311, increases module 312, sending module 313；
Correction verification module 311 for carrying out CRC check to transmission data, and generates the first cyclic redundancy check；
Increase module 312, for increasing the verification width type and first of CRC check to transmission data by setting rule
Cyclic redundancy check obtains examining transmission data；
Sending module 313 is sent to SPI slave for that will verify transmission data；
SPI slave 32 includes parsing module 321, correction verification module 322, contrast module 323 and processing module 324；
Parsing module 321, for parsing transmission data, verification width type from verification transmission data by preset rules
And first cyclic redundancy check；
Correction verification module 322 obtains for carrying out CRC check to the transmission data that parse according to verification width type
Two CRC validation codes；
Contrast module 323 obtains comparing result for comparing the first cyclic redundancy check and the second CRC validation code；
Processing module 324, for being handled according to comparing result.
Optionally,
Processing module 324 includes the first determination unit 3241 and the second determination unit 3242:
First determination unit 3241 when for determining comparing result to compare consistent, transmits and receives normal letter to SPI host
Breath；
Second determination unit 3242 when for determining comparing result to compare inconsistent, returns to transmission abnormality to SPI host
Information.
Optionally,
SPI host further includes delivery module 314:
Delivery module 314 examines transmission data for retransmitting to SPI slave.
The protection system of standard SPI protocol high-speed transfer is and standard SPI protocol of the present invention high speed by the embodiment of the present invention
The corresponding system embodiment of first embodiment and second embodiment of the guard method of transmission, therefore also there is standard of the present invention
The advantages of first embodiment and second embodiment of the guard method of SPI protocol high-speed transfer.By in existing standard SPI protocol
On the basis of add the mode of CRC algorithm, the protection system of standard SPI protocol high-speed transfer provided in an embodiment of the present invention can
When SPI protocol is applied to the data transmission environments of high frequency and high speed, improve reliable verification protection, enable SPI protocol by
More extensively, it efficiently and reliably applies.
It is apparent to those skilled in the art that for convenience and simplicity of description, the system of foregoing description,
The specific work process of device and unit, can refer to corresponding processes in the foregoing method embodiment, and details are not described herein.
In several embodiments provided herein, it should be understood that disclosed system, device and method can be with
It realizes by another way.For example, the apparatus embodiments described above are merely exemplary, for example, the division of unit,
Only a kind of logical function partition, there may be another division manner in actual implementation, such as multiple units or components can be with
In conjunction with or be desirably integrated into another system, or some features can be ignored or not executed.Another point, it is shown or discussed
Mutual coupling, direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING of device or unit or
Communication connection can be electrical property, mechanical or other forms.
Unit may or may not be physically separated as illustrated by the separation member, shown as a unit
Component may or may not be physical unit, it can and it is in one place, or may be distributed over multiple networks
On unit.It can some or all of the units may be selected to achieve the purpose of the solution of this embodiment according to the actual needs.
It, can also be in addition, the functional units in various embodiments of the present invention may be integrated into one processing unit
It is that each unit physically exists alone, can also be integrated in one unit with two or more units.Above-mentioned integrated list
Member both can take the form of hardware realization, can also realize in the form of software functional units.
It, can if integrated unit is realized in the form of SFU software functional unit and when sold or used as an independent product
To be stored in a computer readable storage medium.Based on this understanding, technical solution of the present invention substantially or
Say that all or part of the part that contributes to existing technology or the technical solution can embody in the form of software products
Out, which is stored in a storage medium, including some instructions are used so that a computer equipment
(can be personal computer, server-side or the network equipment etc.) executes all or part of each embodiment method of the present invention
Step.And storage medium above-mentioned include: USB flash disk, it is mobile hard disk, read-only memory (ROM, Read-Only Memory), random
Access various Jie that can store program code such as memory (RAM, Random Access Memory), magnetic or disk
Matter.
More than, the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although referring to aforementioned reality
Applying example, invention is explained in detail, those skilled in the art should understand that: it still can be to aforementioned each
Technical solution documented by embodiment is modified or equivalent replacement of some of the technical features；And these are modified
Or replacement, the spirit and scope for technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution.
Claims (8)
1. a kind of guard method of standard SPI protocol high-speed transfer characterized by comprising
SPI host and SPI slave, wherein the SPI host provides communication clock；
The SPI host carries out CRC check to transmission data, and generates the first cyclic redundancy check；
The SPI host is increased the verification width type and the first CRC of CRC check by setting rule to the transmission data
Check code obtains examining transmission data；
Verification transmission data are sent to the SPI slave by the SPI host；
The SPI slave parses transmission data, verification width type by the setting rule from verification transmission data
And first cyclic redundancy check；
The SPI slave carries out CRC check to the transmission data parsed according to the verification width type, obtains the 2nd CRC
Identifying code；
First cyclic redundancy check and the second CRC validation code are compared, comparing result is obtained；
It is handled according to the comparing result；
The SPI host is increased the verification width type and the first CRC of CRC check by setting rule to the transmission data
Check code, obtaining inspection transmission data includes:
The SPI host increases the verification width type and the first CRC of CRC check to any position of the transmission data
Check code obtains examining transmission data.
2. the guard method of standard SPI protocol high-speed transfer according to claim 1, which is characterized in that the CRC check
It is realized by software mode and/or hardware mode.
3. the guard method of standard SPI protocol high-speed transfer according to claim 1, which is characterized in that the comparison knot
Fruit includes that comparison is consistent and comparison is inconsistent.
4. the guard method of standard SPI protocol high-speed transfer according to claim 3, which is characterized in that described according to institute
It states comparing result and handle and include:
It determines that the comparing result is consistent for comparison, then transmits and receives normal information to the SPI host；
It is inconsistent to compare to determine the comparing result, then returns to transmission abnormality information to the SPI host.
5. the guard method of standard SPI protocol high-speed transfer according to claim 4, which is characterized in that described to described
SPI host returns after transmission abnormality information further include:
The SPI host is retransmitted to the SPI slave examines transmission data.
6. a kind of protection system of standard SPI protocol high-speed transfer characterized by comprising
SPI host and SPI slave, wherein the SPI host provides communication clock；
The SPI host includes correction verification module, increases module, sending module；
The correction verification module for carrying out CRC check to transmission data, and generates the first cyclic redundancy check；
The increase module, for regular to the verification width type for transmitting data increase CRC check and described by setting
First cyclic redundancy check obtains examining transmission data；
The sending module, for verification transmission data to be sent to the SPI slave；
The SPI slave includes parsing module, correction verification module, contrast module and processing module；
The parsing module, for parsing transmission data, verification width from verification transmission data by the setting rule
Spend type and the first cyclic redundancy check；
The correction verification module obtains for carrying out CRC check to the transmission data that parse according to the verification width type
Two CRC validation codes；
The contrast module obtains comparing result for comparing first cyclic redundancy check and the second CRC validation code；
The processing module, for being handled according to the comparing result；
The module that increases is specifically used for increasing verification width type and the institute of CRC check to any position of the transmission data
The first cyclic redundancy check is stated, obtains examining transmission data.
7. the protection system of standard SPI protocol high-speed transfer according to claim 6, which is characterized in that the processing mould
Block includes the first determination unit and the second determination unit:
First determination unit when for determining the comparing result to compare consistent, transmits and receives just to the SPI host
Normal information；
Second determination unit when for determining the comparing result to compare inconsistent, being returned to the SPI host and being transmitted
Exception information.
8. the protection system of standard SPI protocol high-speed transfer according to claim 6, which is characterized in that the SPI host
Further include delivery module:
The delivery module examines transmission data for retransmitting to the SPI slave.
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| CN107943739B (en) * | 2017-12-04 | 2021-01-19 | 上海无线电设备研究所 | FPGA-based multi-group SPI code signal detection and verification method |
| CN109408447A (en) * | 2018-12-11 | 2019-03-01 | 北京地平线机器人技术研发有限公司 | A kind of data transmission method based on SPI, device and electronic equipment |
| CN112445659B (en) * | 2019-08-27 | 2023-07-21 | 烽火通信科技股份有限公司 | Multi-protocol high-speed serdes test implementation method and system |
| CN110855686B (en) * | 2019-11-18 | 2022-08-16 | 深圳开立生物医疗科技股份有限公司 | SPI protocol communication method, system, equipment and computer storage medium |
| US11663100B2 (en) | 2020-06-02 | 2023-05-30 | Analog Devices International Unlimited Company | Serial interface with improved diagnostic coverage |
| CN113176966B (en) * | 2021-03-12 | 2024-07-12 | 青芯半导体科技(上海)有限公司 | System and method for checking SPI received data validity |
| CN114466045A (en) * | 2022-02-10 | 2022-05-10 | 武汉中旗生物医疗电子有限公司 | SPI communication method, monitor and medium |
| CN114760008B (en) * | 2022-03-29 | 2023-04-25 | 苏州联讯仪器股份有限公司 | Communication method, device, equipment and storage medium for SPI bus |
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| CN103838691A (en) * | 2012-11-27 | 2014-06-04 | 中兴通讯股份有限公司 | Method for achieving high-speed data transmission and universal interface chip |
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| US7013354B1 (en) * | 1998-10-05 | 2006-03-14 | Canon Kabushiki Kaisha | Channel protocol for IEEE 1394 data transmission |
| CN102487282A (en) * | 2010-12-03 | 2012-06-06 | 上海华虹集成电路有限责任公司 | Circuit for realizing variable length CRC operation |
| CN102263612A (en) * | 2011-07-18 | 2011-11-30 | 杭州晟联通信技术有限公司 | Error detection method used for data block and equipment thereof |
| CN103838691A (en) * | 2012-11-27 | 2014-06-04 | 中兴通讯股份有限公司 | Method for achieving high-speed data transmission and universal interface chip |
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