CN102882754B - Repeated interruptions mode 485 direction-controlling method - Google Patents
Repeated interruptions mode 485 direction-controlling method Download PDFInfo
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- CN102882754B CN102882754B CN201210372192.XA CN201210372192A CN102882754B CN 102882754 B CN102882754 B CN 102882754B CN 201210372192 A CN201210372192 A CN 201210372192A CN 102882754 B CN102882754 B CN 102882754B
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Abstract
The present invention relates to a kind of repeated interruptions mode RTS/485 direction-controlling method, 16550 compatible UART control chips are standard serial port controllers of PC, also a large amount of in embedded system, its RTS signal can be used for the transmit-receive position control of 485, use and interrupt regeneration control RTS pin signal, the transmission enable signal of timely withdrawal 485, the object accurately controlling 485 sending directions can be reached, and without the need to changing hardware designs, be applicable to middle and high fast 485 communications, low speed 485 is communicated, still can adopt delays time to control mode.
Description
Technical field
The invention belongs to Industry Control and power system automation technology field, relate to a kind of repeated interruptions mode RTS/485 direction-controlling method.
Background technology
Along with the development of power system automation technology, a large amount of uses of smart machine in transformer and distribution station, exchanges data between smart machine and system seems more and more important, therefore connects the indispensable visual plant having become Automation of Electric Systems system with the data communication interface managed between each equipment and system.
RS-485 serial line interface is the low speed long haul communication interface that Industry Control and power system automatic field are commonly used.
RS-485 develops from RS-232, RS-422 basis.RS485 adopts differential signal negative logic, and+2V ~+6V represents " 0 ", and-6V ~-2V represents " 1 ".RS485 has two-wire system and four-wire system two kinds of wiring, four-wire system can only realize point-to-point communication mode, existing seldom employing, and adopt now is the two-wire system mode of connection more, this mode of connection is bus type topological structure, and same bus can mount at most 32 nodes.In RS485 communication network, general employing is master-slave communication mode, and namely a main frame band is multiple from machine.
RS-485 has 2 holding wires: sending and receiving is all A and B, adopts differential level mode transmit and allow to mount multiple node on a communication bus.Due to RS-485 receipts with send out be shared two lines, each node of inevitable requirement can turn off or open the normal communication ensureing to have influence on other node by control bus driver independently, so can not receive and send out for the individual node in bus simultaneously, the transmitting-receiving enable signal of necessary accurate control bus chip, switches transmit-receive position.
For 485 buses of bus-type, the transmit-receive position of 485 control chips controls to be a basic problem needing to solve.At present, the main method that 485 transmit-receive positions control has RTS signal lag to control, directly control, specialized hardware control, the automatic direction controlling of 485 bus transceiving chip etc. after TX/DI signal inversion.Wherein, are common practices of 485 interface equipments based on PC by the transmit-receive position of RTS signal lag control 485, the system timer produced in traditional design controls, when sending aerial disconnected arrival, the timer of a setting byte time, after timer time arrives, regains RTS signal.But the non-real time operating system that similar Windows is such, the highest resolution of its core clock is exactly 1ms, the precision of timer is between 1-2ms, when 9600 baud rate, 1 byte time is about 1ms, actual measurement timer can cause the transmission driver of MAX485 to open the time of more than 1 byte more, can have problems when 485 terminal rooms communicate at a high speed.Because the clock resolution of operating system limits, the precision of delays time to control is lower, can not meet the demands when high speed degree 485 communicates.
Summary of the invention
The object of the invention is to solve in existing design, at a high speed during 485 communication, the accurate control problem of transmit-receive position of 485 control chips, proposes a kind of new control method.
Technical scheme of the present invention is:
1: adopt the compatible UART chip of 16C550
The compatible UART chip of 16C550 is have employed, as ST16C554 in the design of a large amount of maturation.Have following characteristics: technical grade, 5V or 3.3V powers, and the acceptance of 16 bytes and transmission FIFO, support the highest 1.5Mbps speed.The register set of 16C550 compatibility, 4 tunnel independence UART passages, support that MODEM controls.
2: adopt MAX485 bus transceiving chip.
3: adopt FIFO interrupt mode to send.
Each transmission can write 16 bytes to 16C554 at most, and during reception, according to setting, when receiving 1,2,4 or 14 byte continuously, generation is interrupted, or produces interruption after the byte stream received stops about 5 byte times.
4: after adopting RTS signal inversion, enable 485 send, realize 485 transmit-receive positions and control.
Every road UART has the independently MODEM such as RTS, DTR and controls pin, wherein RTS pin anti-phase after be usually used in 485 transmit-receive positions and control.Enable RTS before each frame serial data sends, and then open the transmission driver of MAX485 chip.Then process of transmitting is started.After transmission terminates, regain RTS signal, close the transmission driver of MAX485 chip, MAX485 enters accepting state.
5: when sending aerial disconnected arrival, repeating enable transmission and breaking in the air, and detecting TSR(shift register) sky mark, after TSR sky mark produces, regains RTS signal.
Because the compatible UART controller of 16C550 does not have automatic RTS to control, and do not produce interruption when TSR is empty, bring very large difficulty to program control RTS.And use repeated interruptions mode, or similar real time polling mode, by initiatively checking the sky mark of TSR, regaining RTS signal, reaching the object accurately controlled.
Preferred version of the present invention is, A chip is ST16C554D chip, ST16C554D is the UART control chip of a 16C550, WINDOWS operating system compatibility, there is 4 tunnels independently serial ports passage, each paths only uses TX, RX, RTS signal in line side, these 3 signals are after isolating through optocoupler T1-T3, connect DI, DE and RD pin of MAX485 chip, wherein between RTS and DE through inverter U4, the DE of MAX485 chip and/RE signal also connect, and MAX485 is operated in semiduplex mode.
Preferred version of the present invention is, the bus transceiving chip in B is MAX481 or MAX483 or MAX485 or MAX487 – MAX491 is conventional low-power consumption RS-485/RS-422 bus transceiver, has and independently receives and dispatches loop, supports half-duplex and full-duplex operation.
The invention has the beneficial effects as follows:
1, enable characteristic is interrupted in the transmission that present invention utilizes the compatible UART chip of ST16C554D, by the mode of repeatedly interrupting, poll TSR(shift register) sky mark.Due to the real-time of interrupt processing, the present invention can the accurately transmission of control RTS signal, MAX485, accepting state switching time.
2, the present invention is applicable to middle and high fast 485 communications of more than 9600 baud rates, on the basis not changing existing hardware design, can improve control precision.
3, adopt current hardware scheme, without the need to changing existing hardware, only slightly need make an amendment on drive software, 485 control chip transmit-receive positions can be realized and accurately control.The present invention tries out in WTX-65A/U sequence of communications device, achieves good effect, has certain applicability and application prospect.
Accompanying drawing explanation
Fig. 1 is the electrical schematic diagram of the general RS-485 serial communication interface of the embodiment of the present invention.
Fig. 2 is the interrupt processing flow chart of the embodiment of the present invention.
Embodiment
below in conjunction with the drawings and specific embodiments, the present invention is further elaborated.
A kind of repeated interruptions mode 485 direction-controlling method, comprises following structure and step, A, chip, adopts the compatible UART chip of 16C550, B, employing bus transceiving chip,
C, employing FIFO interrupt mode send, each transmission can write 16 bytes, during reception, according to setting to 16C554 at most, when receiving 1,2,4 or 14 byte continuously, generation is interrupted, or produces interruption after the byte stream received stops about 5 byte times;
D, adopt RTS signal inversion after enable 485 to send, realize 485 transmit-receive positions and control, every road UART has the independently MODEM such as RTS, DTR and controls pin, wherein RTS pin anti-phase after be usually used in 485 transmit-receive positions and control.Enable RTS before each frame serial data sends, and then open the transmission driver of MAX485 chip, then start process of transmitting, regain RTS signal after transmission terminates, close the transmission driver of MAX485 chip, MAX485 enters accepting state;
E, when sending aerial disconnected arrival, repeating enable transmission and breaking in the air, and detecting TSR(shift register) sky mark, after TSR sky mark produces, regain RTS signal.
In Fig. 1, ST16C554D is the UART control chip of a 16C550, WINDOWS operating system compatibility, has 4 tunnels independently serial ports passage.In industry and power automatic system communications applications, each paths only uses TX, RX, RTS signal in line side.These 3 signals, after isolating through optocoupler T1-T3, connect DI, DE and RD pin of MAX485 chip, wherein between RTS and DE through inverter U4.The DE of MAX485 chip and/RE signal also connect, and closedown receiving loop during enable transmissions, MAX485 is operated in semiduplex mode.
In initial condition, RTS invalidating signal, MAX485 is in accepting state.When needing when there being data to send, first enable RTS, is placed in transmission state by MAX485 chip, then sends frame data.After being sent completely, needing to regain (reset) RTS signal in time, MAX485 chip is placed in accepting state, to receive the response of the other side.If fail to regain RTS signal in time, when the other side respond very fast time, correctly can not receive the header byte in back message.
Fig. 2 is the process chart that serial ports interrupts.Multi-serial-port card shares an interrupt signal.When interrupt signal occurs, first CPU judges it is the interruption which serial ports occurs, and obtains serial ports number.Then read the status register of corresponding serial ports, judgement is receive interruption or sends interruption.If receive interruption, read and receive data, be saved in the reception buffer zone in internal memory.Interrupt if send, checked whether that data send.If had, then enable RTS signal, is placed in transmission state by MAX485 chip, then sends data to ST16C554D write.Wait for and interrupting next time.If do not have data to send, then check TSR(shift register) sky mark.If be not empty, then enable transmission is interrupted again, waits for and interrupting next time.If be empty, then reset (withdrawal) RTS signal, and MAX485 chip is placed in accepting state, and a frame process of transmitting terminates.
More than show and describe general principle of the present invention and principal character and advantage of the present invention.The technical staff of the industry should be appreciated that; the present invention is not restricted to the described embodiments; what describe in above-described embodiment and specification just illustrates principle of the present invention; without departing from the spirit and scope of the present invention; the present invention also has various changes and modifications; these changes and improvements all fall in the claimed scope of the invention, and application claims protection range is defined by its equivalent of appending claims.
Claims (1)
1. repeated interruptions mode 485 direction-controlling method, comprising:
A, chip, adopt the compatible UART chip of 16C550, chip is ST16C554D chip, ST16C554D is the UART control chip of a 16C550, WINDOWS operating system compatibility, there is 4 tunnels independently serial ports passage, each paths only uses TX, RX, RTS signal in line side, these 3 signals are after isolating through optocoupler T1-T3, connect DI, DE and RD pin of MAX485 chip, wherein between RTS and DE through inverter U4, the DE of MAX485 chip and/RE signal also connect, and MAX485 is operated in semiduplex mode;
B, employing bus transceiving chip, bus transceiving chip is MAX481 or MAX483 or MAX485 or MAX487 – MAX491, has and independently receives and dispatches loop;
It is characterized in that, step is:
Step one, employing FIFO interrupt mode send, each transmission can write 16 bytes, during reception, according to setting to 16C554 at most, produce when continuous reception 1,2,4 or 14 byte and interrupt, or generation interruption after the byte stream received stops 5 byte times;
After step 2, employing RTS signal inversion, enable 485 send, realize 485 transmit-receive positions to control, every road UART has independently MODEM and controls pin, wherein RTS pin anti-phase after be usually used in 485 transmit-receive positions and control, enable RTS before each frame serial data sends, and then opens the transmission driver of MAX485 chip, then process of transmitting is started, after transmission terminates, regain RTS signal, close the transmission driver of MAX485 chip, MAX485 enters accepting state;
Step 3, when sending aerial disconnected arrival, repeating enable transmission and breaking in the air, and detecting the sky mark of shift register TSR, after TSR sky mark produces, regain RTS signal.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103268301B (en) * | 2013-05-30 | 2016-08-31 | 华南理工大学广州学院 | A kind of half-duplex UART interface circuit of automatic stream |
| CN105446925A (en) * | 2015-06-16 | 2016-03-30 | 北京天诚盛业科技有限公司 | Method and device for improving data receiving correctness of serial port |
| CN105512061A (en) * | 2015-11-24 | 2016-04-20 | 北京天诚盛业科技有限公司 | UART data receiving and analyzing method and apparatus |
| CN105721171B (en) * | 2016-02-05 | 2019-04-09 | 福建师范大学 | A kind of Low-power-consumptiocontrol control method of 485 interface circuit |
| CN109062847B (en) * | 2018-07-31 | 2023-08-25 | 深圳职业技术学院 | System on chip, IP core for RS485 serial port communication and control method thereof |
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| WO2008134732A1 (en) * | 2007-04-30 | 2008-11-06 | Zelmanovich, Victor | Packet sniffer for ad hoc network |
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