CN102857227A - Digital to analog (DA) conversion data bit expander circuit - Google Patents
Digital to analog (DA) conversion data bit expander circuit Download PDFInfo
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- CN102857227A CN102857227A CN2012103555898A CN201210355589A CN102857227A CN 102857227 A CN102857227 A CN 102857227A CN 2012103555898 A CN2012103555898 A CN 2012103555898A CN 201210355589 A CN201210355589 A CN 201210355589A CN 102857227 A CN102857227 A CN 102857227A
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Abstract
The invention discloses a digital to analog (DA) conversion data bit expander circuit which comprises an internal-section DA conversion circuit, a compressor circuit, a paragraph coding circuit, a paragraph weight control circuit, a weight generation circuit and a summing circuit. The DA conversion data bit expander circuit is characterized in that digital signals received by the internal-section DA conversion circuit are converted in a DA mode to be output to the compressor circuit, the compressor circuit can receive signals output by the internal-section DA conversion circuit to generate compressed analog voltage which is input to the summing circuit, digital signals received by the paragraph coding circuit are coded to be output to the paragraph weight control circuit, the paragraph weight control circuit can receive signals output by the paragraph coding circuit and outputs control signals to the weight generation circuit to control the weight generation circuit to generate required weight voltage, and the weight generation circuit can receive control signals output by the paragraph weight control circuit to generate required weight voltage which is output to the summing circuit.
Description
Technical field:
The present invention relates to the DA change-over circuit, be specifically related to DA translation data figure place expanded circuit.
Technical background:
In the information technology, the AD conversion becomes one of key technology of information processing with the DA switch technology.When carrying out when digital control, need to realize the control to controlled module by DA translation interface output analog quantity.High accuracy control or the occasion of reappearing need high-precision DA modular converter.Existing DA conversion chip is limited to the reason of technology, and that the digit of DA conversion chip can not be done is too many, and high accuracy DA mostly is 24 most at present, and high accuracy DA conversion chip price is also higher.To have the expansion of DA conversion chip figure place now, have realistic meaning.
Summary of the invention:
Technical problem to be solved by this invention provides a kind of DA translation data figure place expanded circuit.
In order to address the above problem, technical solution of the present invention is that DA translation data figure place expanded circuit comprises: DA change-over circuit, compressor circuit, paragraph decoding circuit, paragraph control of right circuit, weights produce circuit and summing circuit in the section;
It is characterized in that: after the DA change-over circuit carries out the DA conversion with the digital signal of receiving in described section, output to described compressor circuit;
The signal of DA change-over circuit output in described compressor circuit receives described section, the aanalogvoltage that produces after compressing outputs to described summing circuit;
After described paragraph decoding circuit is deciphered processing with the digital signal of receiving, output to described paragraph control of right circuit;
Described paragraph control of right circuit receives the signal of described paragraph decoding circuit output, outputs a control signal to described weights and produces circuit, controls described weights and produces the weights voltage that circuit produces to be needed;
Described weights produce the control signal that circuit receives described paragraph control of right circuit output, produce the weights Voltage-output that needs and arrive described summing circuit;
Described summing circuit receives the voltage signal that described weights produce circuit and the output of described compressor circuit, and the processing of suing for peace outputs to the outside.
According to a kind of preferred version of DA translation data figure place expanded circuit of the present invention, described paragraph control of right circuit comprises analog switch; The switching of the described analog switch of signal controlling of described paragraph decoding circuit output is controlled described weights by analog switch and is produced the weights voltage that circuit produces to be needed.
According to a kind of preferred version of DA translation data figure place expanded circuit of the present invention, described weights produce circuit and comprise constant-current source circuit, voltage conversion circuit and emitter follower; The control of the control signal of described constant-current source circuit paragraph control of right circuit output produces the electric current that needs, and this electric current converts the weights voltage that needs to by voltage conversion circuit, is undertaken outputing to described summing circuit after the impedance matching by emitter follower.
A kind of preferred version according to DA translation data figure place expanded circuit of the present invention, described summing circuit is made of amplifier, the first resistance to the four resistance, wherein, the positive input of amplifier receives the voltage of described compressor circuit output by the first resistance, the positive input of described amplifier also receives the voltage of described emitter follower output by the second resistance, the reverse input end of described amplifier is by the 3rd grounding through resistance, and the reverse input end of described amplifier also connects the output of described amplifier by the 4th resistance.
The beneficial effect of DA translation data figure place expanded circuit of the present invention is: the present invention has adopted the frequency range compress technique, can now the expansion of DA conversion chip figure place will be had, improve data output figure place, it is simple to have circuit, cost is low, the characteristics that control precision is high can be widely used in the DA change-over circuit.
Description of drawings
Fig. 1 is the schematic block circuit diagram of DA translation data figure place expanded circuit of the present invention.
Fig. 2 is the circuit theory diagrams of the embodiment of the invention 1.
Fig. 3 is the circuit theory diagrams of the embodiment of the invention 2.
Embodiment
Referring to Fig. 1, DA translation data figure place expanded circuit is made of DA change-over circuit 1, compressor circuit 2, paragraph decoding circuit 3, paragraph control of right circuit 4, weights generation circuit 5 and summing circuit 6 in the section; Wherein:
After DA change-over circuit 1 carries out the DA conversion with the digital signal of receiving in described section, output to described compressor circuit 2;
The signal of DA change-over circuit 1 output in described compressor circuit 2 receives described section, the aanalogvoltage that produces after compressing outputs to described summing circuit 6;
After described paragraph decoding circuit 3 is deciphered processing with the digital signal of receiving, output to described paragraph control of right circuit 4;
Described paragraph control of right circuit 4 receives the signal of described paragraph decoding circuit 3 outputs, outputs a control signal to described weights and produces circuit 5, controls described weights and produces the weights voltage that circuit 5 generations need;
Described weights produce the control signal that circuit 5 receives described paragraph control of right circuit 4 outputs, and the weights Voltage-output that generation needs is to described summing circuit 6;
Described summing circuit 6 receives the voltage signal that described weights produce circuit 5 and 2 outputs of described compressor circuit, and the processing of suing for peace outputs to the outside.
In specific embodiment, described paragraph control of right circuit 4 comprises analog switch; The switching of the described analog switch of signal controlling of described paragraph decoding circuit 3 outputs is controlled described weights by analog switch and is produced the weights voltage that circuit 5 generations need.
In specific embodiment, described weights produce circuit 5 and comprise constant-current source circuit, voltage conversion circuit and emitter follower; The control of the control signal of described constant-current source circuit paragraph control of right circuit 4 outputs produces the electric current that needs, and this electric current converts the weights voltage that needs to by voltage conversion circuit, is undertaken outputing to described summing circuit 6 after the impedance matching by emitter follower.
In specific embodiment, described summing circuit 6 is made of amplifier U2:C, resistance R 15～R18, wherein, the positive input of amplifier U2:C receives the voltage of described compressor circuit 2 outputs by the first resistance R 18, the positive input of described amplifier U2:C also receives the voltage of described emitter follower output by the second resistance R 15, the reverse input end of described amplifier U2:C is by the 3rd resistance R 16 ground connection, and the reverse input end of described amplifier U2:C also connects the output of described amplifier U2:C by the 4th resistance R 17.
In specific embodiment, described compressor circuit 2 comprises amplifier U2:B, resistance R 1, R2, R3; The signal of DA change-over circuit 1 output in described compressor circuit 2 receives described section produces the aanalogvoltage output after compressing.
Referring to Fig. 2 and Fig. 3, in specific embodiment, DA change-over circuit 1 comprises D/A conversion chip U1 and amplifier U2:A in the section, and concrete D/A conversion chip can adopt da0832, and the DI0 of D/A conversion chip～DI7 end connects the output of external digital signal; The CS end of D/A conversion chip connects chip selection signal, and this signal is sent by external microcontroller in the specific embodiment; The WR1 end of D/A conversion chip connects read-write control signal, and this signal is sent by external microcontroller in the specific embodiment; The WR2 end of D/A conversion chip connects earth potential; The XFER end of D/A conversion chip connects earth potential; Output IOUT1, the IOUT2 of D/A conversion chip connects respectively the input of amplifier U2:A, and the output of amplifier U2:A connects described compressor circuit 2.
Embodiment 1: referring to Fig. 2, Fig. 2 is 11 DA conversion out-expanders, wherein: D/A conversion chip U1, DA conversion in the amplifier U2:A composition section, 1/8 compression, decoder U3 realize that 3-8 decoding, decoder U3 can adopt 74HC238 in amplifier U2:B, resistance R 1, R2, the R3 section of finishing; The A of decoder U3, B, C end connects the Senior Three position of external microcontroller data: E2, the E3 end that the E1 of decoder U3 meets high level, decoder U3 connects earth potential, and namely single-chip microcomputer is sent in three terminals of a control signal control one; Analog switch U4:A-U4:D, U5:A-U5:C finish the paragraph control of right, and resistance R 4～R13, triode Q1, Q2 and amplifier U2:D form the paragraph weights and produce circuit.
The operation principle of this embodiment is: exporting in the Senior Three position of single-chip microcomputer or other data chip is respectively 000,001,010,011,100,101,110 o'clock, the paragraph weights are output as respectively 0,0.625V, 1.25V, 1.875V, 2.5V, 3.125V, 3.75V, 4.375V, are respectively the initial value of paragraph.Its process is that three bit data signals produce control signal control simulation switch U4:A-U4:D by 3-8 decoding, U5:A-U5:C opens and closes, make the different electric current of constant-current source circuit output, this electric current produces the weights voltage that needs in resistance R 14, and the emitter follower that consists of through amplifier U2:D carries out outputing to summing circuit behind the impedance transformation.
8 bit data signals of single-chip microcomputer or the output of other data chip are sent into DA conversion chip U1, be converted to the aanalogvoltage of 0～4.96V by amplifier U2:A, finish 1/8 compression through amplifier U2:B, form analog signal in the section, output to summing circuit and the addition of paragraph weights voltage output, become 11 DA conversion outputs.
Embodiment 2: referring to Fig. 3, Fig. 3 is 10 DA conversion out-expanders; In the time only need to expanding to 10 bit data, decoder then only needs 2-4 coding chips, and corresponding analog switch only needs three, produces four paragraph weights: namely 0,1.25V, 2.5V and 3.75V; Single-chip microcomputer or other data chip output least-significant byte data-signal are sent into DA conversion chip U1, be converted to the aanalogvoltage of 0～4.96V by amplifier U2:A, through 1/4 compression, form analog signal in the section, output to summing circuit and the addition of paragraph weights voltage output, expand to 10 DA conversion outputs.
Claims (4)
1. a DA translation data figure place expanded circuit comprises: DA change-over circuit (1), compressor circuit (2), paragraph decoding circuit (3), paragraph control of right circuit (4), weights generation circuit (5) and summing circuit (6) in the section;
It is characterized in that: after DA change-over circuit (1) carries out the DA conversion with the digital signal of receiving in described section, output to described compressor circuit (2);
The signal of DA change-over circuit (1) output in described compressor circuit (2) receives described section, the aanalogvoltage that produces after compressing outputs to described summing circuit (10);
Described paragraph decoding circuit (3) outputs to described paragraph control of right circuit (4) after the digital signal of receiving is deciphered processing;
Described paragraph control of right circuit (4) receives the signal of described paragraph decoding circuit (3) output, outputs a control signal to described weights and produces circuit (5), controls described weights and produces the weights voltage that circuit (5) produces to be needed;
Described weights produce the control signal that circuit (5) receives described paragraph control of right circuit (4) output, and the weights Voltage-output that generation needs is to described summing circuit (6);
Described summing circuit (6) receives the voltage signal that described weights produce circuit (5) and described compressor circuit (11) output, and the processing of suing for peace outputs to the outside.
2. DA translation data figure place expanded circuit according to claim 1, it is characterized in that: described paragraph control of right circuit (4) comprises analog switch; The switching of the described analog switch of signal controlling of described paragraph decoding circuit (3) output is controlled described weights by analog switch and is produced the weights voltage that circuit (5) produces to be needed.
3. DA translation data figure place expanded circuit according to claim 1 and 2 is characterized in that: described weights produce circuit (5) and comprise constant-current source circuit, voltage conversion circuit and emitter follower; The control of the control signal of described constant-current source circuit paragraph control of right circuit (4) output, produce the electric current that needs, this electric current converts the weights voltage that needs to by voltage conversion circuit, is undertaken outputing to described summing circuit (6) after the impedance matching by emitter follower.
4. DA translation data figure place expanded circuit according to claim 3 is characterized in that:
Described summing circuit (6) is made of amplifier, the first resistance to the four resistance, wherein, the positive input of amplifier receives the voltage of described compressor circuit (2) output by the first resistance, the positive input of described amplifier also receives the voltage of described emitter follower output by the second resistance, the reverse input end of described amplifier is by the 3rd grounding through resistance, and the reverse input end of described amplifier also connects the output of described amplifier by the 4th resistance.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210355589.8A CN102857227B (en) | 2012-09-21 | 2012-09-21 | Digital to analog (DA) conversion data bit expander circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210355589.8A CN102857227B (en) | 2012-09-21 | 2012-09-21 | Digital to analog (DA) conversion data bit expander circuit |
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| CN102857227A true CN102857227A (en) | 2013-01-02 |
| CN102857227B CN102857227B (en) | 2015-06-17 |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060284752A1 (en) * | 2005-06-21 | 2006-12-21 | Kim Byung H | Digital/analog converter |
| US20080030390A1 (en) * | 2006-08-02 | 2008-02-07 | Samsung Electronics Co., Ltd. | Digital to analog converter and source driver |
| CN101237238A (en) * | 2007-12-29 | 2008-08-06 | 湖南大学 | CMOS current helm DA converter based on switch current technology |
| CN101471670A (en) * | 2007-12-24 | 2009-07-01 | 瑞昱半导体股份有限公司 | Table-look-up type data weighting balance circuit and dynamic component matching method |
| CN102130688A (en) * | 2010-01-20 | 2011-07-20 | 上海华虹Nec电子有限公司 | Resistance network type digital to analog converter structure |
| CN202798675U (en) * | 2012-09-21 | 2013-03-13 | 重庆电力高等专科学校 | Data bit expanding circuit of digital-analog (DA) converting chip |
-
2012
- 2012-09-21 CN CN201210355589.8A patent/CN102857227B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060284752A1 (en) * | 2005-06-21 | 2006-12-21 | Kim Byung H | Digital/analog converter |
| US20080030390A1 (en) * | 2006-08-02 | 2008-02-07 | Samsung Electronics Co., Ltd. | Digital to analog converter and source driver |
| CN101471670A (en) * | 2007-12-24 | 2009-07-01 | 瑞昱半导体股份有限公司 | Table-look-up type data weighting balance circuit and dynamic component matching method |
| CN101237238A (en) * | 2007-12-29 | 2008-08-06 | 湖南大学 | CMOS current helm DA converter based on switch current technology |
| CN102130688A (en) * | 2010-01-20 | 2011-07-20 | 上海华虹Nec电子有限公司 | Resistance network type digital to analog converter structure |
| CN202798675U (en) * | 2012-09-21 | 2013-03-13 | 重庆电力高等专科学校 | Data bit expanding circuit of digital-analog (DA) converting chip |
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| CN102857227B (en) | 2015-06-17 |
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