CN102856289A - First etched and then packaged packaging structure with single chip reversedly installed and base islands exposed and preparation method of structure - Google Patents
First etched and then packaged packaging structure with single chip reversedly installed and base islands exposed and preparation method of structure Download PDFInfo
- Publication number
- CN102856289A CN102856289A CN2012101407919A CN201210140791A CN102856289A CN 102856289 A CN102856289 A CN 102856289A CN 2012101407919 A CN2012101407919 A CN 2012101407919A CN 201210140791 A CN201210140791 A CN 201210140791A CN 102856289 A CN102856289 A CN 102856289A
- Authority
- CN
- China
- Prior art keywords
- pin
- chip
- dao
- metal
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Abstract
The invention relates to a first etched and then packaged packaging structure with a single chip reversedly installed and base islands exposed and a preparation method of the structure. The structure comprises base islands (1), pins (2) and a chip (3), wherein the chip (3) is reversedly installed on the front faces of the base islands (1) and the pins (2); underfills (14) are arranged among the bottom of the chip (3), the fronts of the base islands (1) and the pins (2); plastic package materials (4) are arranged in the peripheral regions of the base islands (1), the regions between the base islands (1) and the pins (2) and the regions between the pins (2) and outside the chip (3); small holes (5) are formed on the surfaces of the plastic package materials (4) on the lower parts of the base islands (1) and the pins (2); and metal balls (7) are arranged in the small holes (5). The packaging structure and the preparation method have the following beneficial effects that the preparation cost is reduced; the safety and reliability of the packaging body are improved; environmental pollution is reduced; and design and preparation of high-density circuits are truly achieved.
Description
Technical field
The present invention relates to encapsulate base island exposed encapsulating structure and manufacture method thereof after the first etching of a kind of single-chip upside-down mounting, belong to the semiconductor packaging field.
Background technology
The manufacturing process flow of traditional high-density base board encapsulating structure is as follows:
Above-mentioned traditional high-density base board encapsulating structure has the following disadvantages and defective:
1, many glass fiber materials of one deck, same also many costs of layer of glass;
2, because must use glass fibre, so with regard to the about thickness space of 100 ~ 150 μ m of many layer of glass thickness;
3, glass fibre itself is exactly a kind of foaming substance, so easily because the time of placing and environment suck moisture and moisture, directly have influence on the security capabilities of reliability or the grade of reliability;
4, the fiberglass surfacing coating the about Copper Foil metal layer thickness of 50 ~ 100 μ m of one deck, and the etching of metal level circuit and circuit distance is also because the characteristic of etching factor can only accomplish that the etched gap of 50 ~ 100 μ m is (referring to Figure 40, best making ability is the thickness that etched gap approximately is equal to etched object), so the design of accomplishing high-density line and manufacturing that can't be real;
5, because must use the Copper Foil metal level, and the Copper Foil metal level is the mode that the employing high pressure is pasted, so the thickness of Copper Foil is difficult to be lower than the thickness of 50 μ m, otherwise just is difficult to operation such as out-of-flatness or Copper Foil breakage or Copper Foil extension displacement etc.;
6, also because whole baseplate material is to adopt glass fiber material, thus significantly increased thickness 100 ~ 150 μ m of glass layer, can't be real accomplish ultra-thin encapsulation;
7, the traditional glass fiber is sticked on the technology of Copper Foil because material property difference very large (coefficient of expansion) easily causes stress deformation in the operation of adverse circumstances, directly has influence on precision and element and substrate adherence and reliability that element loads.
Summary of the invention
The object of the invention is to overcome above-mentioned deficiency, after being provided, the first etching of a kind of single-chip upside-down mounting encapsulates base island exposed encapsulating structure and manufacture method thereof, its technique is simple, need not use glass layer, reduce manufacturing cost, improved the safety and reliability of packaging body, reduced the environmental pollution that glass fiber material brings, and the metal substrate line layer adopts is electro-plating method, can really accomplish the Design and manufacture of high-density line.
The object of the present invention is achieved like this: the base island exposed encapsulating structure of encapsulation after the first etching of a kind of single-chip upside-down mounting, it comprises Ji Dao, pin and chip, described flip-chip is positive in Ji Dao and pin, be provided with underfill between described chip bottom and Ji Dao and the pin front, the zone of periphery, described basic island, zone between Ji Dao and the pin, zone between pin and the pin, the zone on Ji Dao and pin top, the zone of Ji Dao and pin bottom and chip all are encapsulated with plastic packaging material outward, offer aperture on the plastic packaging material surface of described Ji Dao and pin bottom, described aperture is connected with Ji Dao or the pin back side, be provided with Metal Ball in the described aperture, described Metal Ball contacts with Ji Dao or the pin back side.
The manufacture method of the base island exposed encapsulating structure of encapsulation after the first etching of a kind of single-chip upside-down mounting, it comprises following processing step:
Electroplate one deck copper material film in metallic substrate surfaces,
Utilize subsides photoresistance film device to carry out the coating of photoresistance film in the metal substrate front of finishing preplating copper material film and the back side,
Part photoresistance film is removed at step 4, the metal substrate back side
Utilize exposure imaging equipment to carry out graph exposure, develop and window at the metal substrate back side that step 3 is finished the pad pasting operation, the graphics field of electroplating to expose the follow-up needs in the metal substrate back side,
The graphics field of windowing has been finished at the metal substrate back side has electroplated upper inert metal line layer,
Carry out the plating of high-conductive metal layer on inert metal line layer surface,
The photoresistance film of metallic substrate surfaces is removed,
Carry out sealing in advance of plastic packaging material at the metal substrate back side,
Finish the plastic packaging material surface of sealing in advance in step 8 and carry out the follow-up perforate operation that will plant the Metal Ball zone,
In the metal substrate front and back side coating photoresistance film,
Utilize exposure imaging equipment to finish the metal substrate front of pasting the operation of photoresistance film in step 10 and carry out graph exposure, develop and window, the graphics field of carrying out chemical etching to expose the positive follow-up needs of metal substrate,
The graphics field of windowing is finished in step 11 metal substrate front carries out chemical etching,
The plating of the enterprising row metal layer of inert metal line layer that exposes after step 12 is finished chemical etching forms Ji Dao and pin at the metal substrate vis-a-vis,
The photoresistance film of metallic substrate surfaces is removed,
Step 15, load and chip bottom are filled
Chip and chip bottom filling epoxy resin in the relative Ji Dao that forms of step 13 and the positive upside-down mounting of pin,
Carry out sealing of plastic packaging material in the metal substrate front of finishing after flip-chip and chip bottom are filled,
Metal substrate back side plastic packaging material tapping is cleaned,
Be implanted into Metal Ball in step 10 seven through the aperture that cleans,
The seven pairs of metal substrate back side of described step 10 plastic packaging material tapping cleans and carries out simultaneously the coat of metal coating.
Cross-over connection passive device between described pin and the pin, described passive device are connected across between pin front and the pin front or are connected across between the pin back side and the pin back side.
Described pin has multi-turn.
Described Ji Dao has a plurality of.
Described Ji Dao comprises Ji Dao top, Ji Dao bottom and intermediate barrier layers, and described Ji Dao top and Ji Dao bottom form by the single or multiple lift metal plating, and described intermediate barrier layers is nickel dam, titanium layer or copper layer.
Described pin comprises pin top, pin bottom and intermediate barrier layers, and described pin top and pin bottom form by the single or multiple lift metal plating, and described intermediate barrier layers is nickel dam, titanium layer or copper layer.
Compared with prior art, the invention has the beneficial effects as follows:
1, the present invention does not need to use glass layer, so can reduce the cost that glass layer brings;
2, the present invention does not use the foaming substance of glass layer, so the grade of reliability can improve again, relatively will improve the fail safe of packaging body;
3, the present invention does not need to use the glass layer material, so just can reduce the environmental pollution that glass fiber material brings;
What 4, two-dimensional metallic substrate circuit layer of the present invention adopted is electro-plating method, and the gross thickness of electrodeposited coating is about 10 ~ 15 μ m, and the gap between circuit and the circuit can reach the following gap of 25 μ m easily, so can accomplish veritably the technical capability of pin circuit tiling in the high density;
5, two-dimensional metallic substrate of the present invention is the metal level galvanoplastic because of what adopt, so the technique than glass fibre high pressure Copper Foil metal level is come simply, and do not have metal level because high pressure produces bad or puzzled that metal level out-of-flatness, metal level breakage and metal level extend and be shifted;
6, two-dimensional metallic substrate circuit layer of the present invention is to carry out metal plating on the surface of metal base, so the material characteristic is basic identical, so the internal stress of coating circuit and metal base is basic identical, can carries out easily the rear engineering (such as the surface mount work of high temperature eutectic load, high temperature tin material scolder load and high temperature passive device) of adverse circumstances and be not easy to produce stress deformation.
Description of drawings
Fig. 1 ~ Figure 19 is each operation schematic diagram of base island exposed encapsulating structure embodiment 1 manufacture method of encapsulation after the first etching of single-chip upside-down mounting of the present invention.
Figure 20 (A) is the structural representation of the base island exposed encapsulating structure embodiment 1 of encapsulation after the first etching of single-chip upside-down mounting of the present invention.
Figure 20 (B) is the vertical view of Figure 20 (A).
Figure 21 (A) is the structural representation of the base island exposed encapsulating structure embodiment 2 of encapsulation after the first etching of single-chip upside-down mounting of the present invention.
Figure 21 (B) is the vertical view of Figure 21 (A).
Figure 22 (A) is the structural representation of the base island exposed encapsulating structure embodiment 3 of encapsulation after the first etching of single-chip upside-down mounting of the present invention.
Figure 22 (B) is the vertical view of Figure 22 (A).
Figure 23 (A) is the structural representation of the base island exposed encapsulating structure embodiment 4 of encapsulation after the first etching of single-chip upside-down mounting of the present invention.
Figure 23 (B) is the vertical view of Figure 23 (A).
Figure 24 (A) is the structural representation of the base island exposed encapsulating structure embodiment 5 of encapsulation after the first etching of single-chip upside-down mounting of the present invention.
Figure 24 (B) is the vertical view of Figure 24 (A).
Figure 25 (A) is the structural representation of the base island exposed encapsulating structure embodiment 6 of encapsulation after the first etching of single-chip upside-down mounting of the present invention.
Figure 25 (B) is the vertical view of Figure 25 (A).
Figure 26 (A) is the structural representation of the base island exposed encapsulating structure embodiment 7 of encapsulation after the first etching of single-chip upside-down mounting of the present invention.
Figure 26 (B) is the vertical view of Figure 26 (A).
Figure 27 (A) is the structural representation of the base island exposed encapsulating structure embodiment 8 of encapsulation after the first etching of single-chip upside-down mounting of the present invention.
Figure 27 (B) is the vertical view of Figure 27 (A).
Figure 28 ~ Figure 39 is each operation schematic diagram of the manufacturing process flow of traditional high-density base board encapsulating structure.
Figure 40 is the etching situation schematic diagram of fiberglass surfacing Copper Foil metal level.
Wherein:
Coat of metal 6
Inert metal line layer 12
High-conductive metal layer 13
Embodiment
The base island exposed encapsulating structure of encapsulation and manufacture method thereof are as follows after the first etching of single-chip upside-down mounting of the present invention:
Embodiment 1: single basic island individual pen pin
Referring to Figure 20 (A) and Figure 20 (B), the structural representation of the base island exposed encapsulating structure embodiment 1 of encapsulation after the etching of Figure 20 (A) single-chip upside-down mounting of the present invention elder generation.Figure 20 (B) is the vertical view of Figure 20 (A).Can be found out by Figure 20 (A) and Figure 20 (B), the base island exposed encapsulating structure of encapsulation after the first etching of single-chip upside-down mounting of the present invention, it comprises basic island 1, pin 2 and chip 3, described chip 3 upside-down mountings are in basic island 1 and pin 2 fronts, be provided with underfill 14 between described chip 3 bottoms and basic island 1 and pin 2 fronts, the zone of 1 periphery, described basic island, zone between base island 1 and the pin 2, zone between pin 2 and the pin 2, the zone on base island 1 and pin 2 tops, zone and the chip 3 outer plastic packaging materials 4 that all are encapsulated with of base island 1 and pin 2 bottoms, offer aperture 5 on plastic packaging material 4 surfaces of described basic island 1 and pin 2 bottoms, described aperture 5 is connected with basic island 1 or pin 2 back sides, be provided with Metal Ball 7 in the described aperture 5, described Metal Ball 7 contacts with basic island 1 or pin 2 back sides.
Be provided with coat of metal 6 between described Metal Ball 7 and basic island 1 or pin 2 back sides, described coat of metal 6 is antioxidant.
Described Metal Ball 7 materials adopt tin or ashbury metal.
Described basic island 1 comprises Ji Dao top, Ji Dao bottom and intermediate barrier layers, and described Ji Dao top and Ji Dao bottom form by the single or multiple lift metal plating, and described intermediate barrier layers is nickel dam, titanium layer or copper layer.
Described pin 2 comprises pin top, pin bottom and intermediate barrier layers, and described pin top and pin bottom form by the single or multiple lift metal plating, and described intermediate barrier layers is nickel dam, titanium layer or copper layer.
Its manufacture method is as follows:
Referring to Fig. 1, get the suitable metal substrate of a slice thickness, the material of described metal substrate can be carried out conversion according to function and the characteristic of chip, such as: copper material, iron material, ferronickel material or zinc-iron material etc.;
Referring to Fig. 2, electroplate one deck copper material film in metallic substrate surfaces, purpose is to do the basis for follow-up plating, the mode of described plating can adopt chemical plating or metallide;
Referring to Fig. 3, utilize subsides photoresistance film device to carry out the coating of photoresistance film in the metal substrate front of finishing preplating copper material film and the back side, described photoresistance film can adopt wet type photoresistance film or dry type photoresistance film;
Part photoresistance film is removed at step 4, the metal substrate back side
Referring to Fig. 4, utilize exposure imaging equipment to carry out graph exposure, develop and window at the metal substrate back side that step 3 is finished the pad pasting operation, the graphics field of electroplating to expose the follow-up needs in the metal substrate back side;
Referring to Fig. 5, the graphics field of windowing has been finished at the metal substrate back side electroplated upper inert metal line layer, as the barrier layer of subsequent etch operation, described inert metal wiring material layer adopts nickel, titanium or copper etc., and described plating mode adopts chemical plating or metallide mode;
Referring to Fig. 6, carry out the plating of high-conductive metal layer on inert metal line layer surface, described high-conductive metal layer can be single or multiple lift, the material of described high-conductive metal layer adopts golden nickel, copper nickel gold, copper NiPdAu, porpezite or copper material, and described plating mode adopts chemical plating or metallide mode;
Referring to Fig. 7, the photoresistance film of metallic substrate surfaces to be removed, the removal method adopts chemical medicinal liquid to soften and adopts high pressure water jets to remove;
Referring to Fig. 8, carry out sealing in advance of plastic packaging material at the metal substrate back side, the mode that plastic packaging material is sealed in advance adopts mould encapsulating mode, spraying equipment spraying method or pad pasting mode, and the described plastic packaging material of sealing in advance can adopt packing material or without the epoxy resin of packing material;
Referring to Fig. 9, to finish the plastic packaging material surface of sealing in advance in step 8 and carry out the follow-up perforate operation that will plant the Metal Ball zone, described perforate mode can adopt the dry laser sintering to window or the method for wet chemistry corrosion;
Referring to Figure 10, in the metal substrate front and back side coating photoresistance film, described photoresistance film can adopt wet type photoresistance film or dry type photoresistance film;
Referring to Figure 11, utilize exposure imaging equipment to finish the metal substrate front of pasting the operation of photoresistance film in step 10 and carry out graph exposure, develop and window, the graphics field of carrying out chemical etching to expose the positive follow-up needs of metal substrate;
Referring to Figure 12, the graphics field of windowing to be finished in step 11 metal substrate front carry out chemical etching, chemical etching is to the inert metal line layer and till sealing in advance the position of plastic packaging material, and etching solution can adopt copper chloride or iron chloride;
Referring to Figure 13, the plating of the enterprising row metal layer of inert metal line layer that after step 12 is finished chemical etching, exposes, form Ji Dao and pin at the metal substrate vis-a-vis, described metal level can adopt single or multiple lift, described metal layer material adopts copper nickel gold, copper nickeline, porpezite, gold or copper etc., and described plating mode adopts chemical plating or metallide mode;
Referring to Figure 14, the photoresistance film of metallic substrate surfaces to be removed, the removal method adopts chemical medicinal liquid to soften and adopts high pressure water jets to remove;
Step 15, load and chip bottom are filled
Referring to Figure 15, chip and chip bottom filling epoxy resin in the relative Ji Dao that forms of step 13 and the positive upside-down mounting of pin;
Referring to Figure 16, sealing of plastic packaging material carried out in the metal substrate front that reaches the chip bottom filling after finishing flip-chip, the mode that plastic packaging material is sealed adopts spraying method or the brush coating mode of mould encapsulating mode, spraying equipment, and the described plastic packaging material of sealing can adopt packing material or without the epoxy resin of packing material;
Referring to Figure 17, metal substrate back side plastic packaging material tapping is cleaned to remove oxidation material or grease material etc., can carry out the coating of coat of metal simultaneously, described coat of metal adopts antioxidant;
Referring to Figure 18, be implanted into Metal Ball in step 10 seven through the aperture that cleans, Metal Ball contacts with the back side of Ji Dao or pin, plant the ball mode and can adopt conventional ball attachment machine or adopt the metal paste printing can form orbicule again after high-temperature digestion, the Metal Ball material can adopt tin or ashbury metal;
Referring to Figure 19, step 10 eight is finished the semi-finished product of planting ball carry out cutting operation, make originally to integrate in array aggregate mode and to contain more than cuttings of plastic-sealed body module of chip independent, encapsulate base island exposed encapsulating structure finished product after making the etching of single-chip upside-down mounting elder generation.
Embodiment 2: single basic island individual pen pin passive device
Referring to Figure 21 (A) and Figure 21 (B), the structural representation of the base island exposed encapsulating structure embodiment 2 of encapsulation after the etching of Figure 21 (A) single-chip upside-down mounting of the present invention elder generation.Figure 21 (B) is the vertical view of Figure 21 (A).Can be found out by Figure 21 (A) and Figure 21 (B), the difference of embodiment 2 and embodiment 1 only is: pass through conduction bonding material cross-over connection passive device 8 between described pin 2 and the pin 2, described passive device 8 can be connected across between pin 2 fronts and pin 2 fronts, also can be connected across between pin 2 back sides and pin 2 back sides.
Embodiment 3: single basic island multi-circle pin
Referring to Figure 22 (A) and Figure 22 (B), the structural representation of the base island exposed encapsulating structure embodiment 3 of encapsulation after the etching of Figure 22 (A) single-chip upside-down mounting of the present invention elder generation.Figure 22 (B) is the vertical view of Figure 22 (A).Can be found out by Figure 22 (A) and Figure 22 (B), embodiment 3 only is with the difference of embodiment 1: described pin 2 has multi-turn.
Embodiment 4: single basic island multi-circle pin passive device
Referring to Figure 23 (A) and Figure 23 (B), the structural representation of the base island exposed encapsulating structure embodiment 4 of encapsulation after the etching of Figure 23 (A) single-chip upside-down mounting of the present invention elder generation.Figure 23 (B) is the vertical view of Figure 23 (A).Can be found out by Figure 23 (A) and Figure 23 (B), embodiment 4 only is with the difference of embodiment 2: described pin 2 has multi-turn.
Embodiment 5: how basic island individual pen pin
Referring to Figure 24 (A) and Figure 24 (B), the structural representation of the base island exposed encapsulating structure embodiment 5 of encapsulation after the etching of Figure 24 (A) single-chip upside-down mounting of the present invention elder generation.Figure 24 (B) is the vertical view of Figure 24 (A).Can be found out by Figure 24 (A) and Figure 24 (B), embodiment 5 only is with the difference of embodiment 1: described basic island 1 has a plurality of.
Embodiment 6: how basic island individual pen pin passive device
Referring to Figure 25 (A) and Figure 25 (B), the structural representation of the base island exposed encapsulating structure embodiment 6 of encapsulation after the etching of Figure 25 (A) single-chip upside-down mounting of the present invention elder generation.Figure 25 (B) is the vertical view of Figure 25 (A).Can be found out by Figure 25 (A) and Figure 25 (B), embodiment 6 only is with the difference of embodiment 2: described basic island 1 has a plurality of.
Embodiment 7: how basic island multi-circle pin
Referring to Figure 26 (A) and Figure 26 (B), the structural representation of the base island exposed encapsulating structure embodiment 7 of encapsulation after the etching of Figure 26 (A) single-chip upside-down mounting of the present invention elder generation.Figure 26 (B) is the vertical view of Figure 26 (A).Can be found out by Figure 26 (A) and Figure 26 (B), embodiment 7 only is with the difference of embodiment 3: described basic island 1 has a plurality of.
Embodiment 8: how basic island multi-circle pin passive device
Referring to Figure 27 (A) and Figure 27 (B), the structural representation of the base island exposed encapsulating structure embodiment 8 of encapsulation after the etching of Figure 27 (A) single-chip upside-down mounting of the present invention elder generation.Figure 27 (B) is the vertical view of Figure 27 (A).Can be found out by Figure 27 (A) and Figure 27 (B), embodiment 8 only is with the difference of embodiment 4: described basic island 1 has a plurality of.
Claims (8)
1. encapsulate base island exposed encapsulating structure after the single-chip upside-down mounting elder generation etching, it is characterized in that: it comprises Ji Dao (1), pin (2) and chip (3), described chip (3) upside-down mounting is in Ji Dao (1) and pin (2) front, be provided with underfill (14) between described chip (3) bottom and Ji Dao (1) and pin (2) front, the zone that described Ji Dao (1) is peripheral, zone between Ji Dao (1) and the pin (2), zone between pin (2) and the pin (2), the zone on Ji Dao (1) and pin (2) top, the outer plastic packaging material (4) that all is encapsulated with of the zone of Ji Dao (1) and pin (2) bottom and chip (3), offer aperture (5) on plastic packaging material (4) surface of described Ji Dao (1) and pin (2) bottom, described aperture (5) is connected with Ji Dao (1) or pin (2) back side, be provided with Metal Ball (7) in the described aperture (5), described Metal Ball (7) contacts with Ji Dao (1) or pin (2) back side.
2. the manufacture method of the base island exposed encapsulating structure of encapsulation after the single-chip upside-down mounting as claimed in claim 1 elder generation etching is characterized in that described method comprises following processing step:
Step 1, get metal substrate
Step 2, metallic substrate surfaces preplating copper material
Electroplate one deck copper material film in metallic substrate surfaces,
Step 3, the operation of subsides photoresistance film
Utilize subsides photoresistance film device to carry out the coating of photoresistance film in the metal substrate front of finishing preplating copper material film and the back side,
Part photoresistance film is removed at step 4, the metal substrate back side
Utilize exposure imaging equipment to carry out graph exposure, develop and window at the metal substrate back side that step 3 is finished the pad pasting operation, the graphics field of electroplating to expose the follow-up needs in the metal substrate back side,
Step 5, plating inert metal line layer
The graphics field of windowing has been finished at the metal substrate back side has electroplated upper inert metal line layer,
Step 6 is electroplated the high-conductive metal layer
Carry out the plating of high-conductive metal layer on inert metal line layer surface,
Step 7 is removed metallic substrate surfaces photoresistance film
The photoresistance film of metallic substrate surfaces is removed,
Step 8, seal in advance
Carry out sealing in advance of plastic packaging material at the metal substrate back side,
Step 9, plastic packaging material surface perforate
Finish the plastic packaging material surface of sealing in advance in step 8 and carry out the follow-up perforate operation that will plant the Metal Ball zone,
Step 10, the operation of subsides photoresistance film
In the metal substrate front and back side coating photoresistance film,
Step 11, the positive part photoresistance film of removing of metal substrate
Utilize exposure imaging equipment to finish the metal substrate front of pasting the operation of photoresistance film in step 10 and carry out graph exposure, develop and window, the graphics field of carrying out chemical etching to expose the positive follow-up needs of metal substrate,
Step 12, chemical etching
The graphics field of windowing is finished in step 11 metal substrate front carries out chemical etching,
Step 13, electroplated metal layer
The plating of the enterprising row metal layer of inert metal line layer that exposes after step 12 is finished chemical etching forms Ji Dao and pin at the metal substrate vis-a-vis,
Step 14, removal metallic substrate surfaces photoresistance film
The photoresistance film of metallic substrate surfaces is removed,
Step 15, load and chip bottom are filled
Chip and chip bottom filling epoxy resin in the relative Ji Dao that forms of step 13 and the positive upside-down mounting of pin,
Step 10 six, seal
Carry out sealing of plastic packaging material in the metal substrate front of finishing after flip-chip and chip bottom are filled,
Step 10 seven, cleaning
Metal substrate back side plastic packaging material tapping is cleaned,
Step 10 eight, plant ball
Be implanted into Metal Ball in step 10 seven through the aperture that cleans,
Step 10 nine, cutting finished product
Step 10 eight is finished the semi-finished product of planting ball carry out cutting operation, make originally to integrate in array aggregate mode and to contain more than cuttings of plastic-sealed body module of chip independent, encapsulate base island exposed encapsulating structure finished product after making the etching of single-chip upside-down mounting elder generation.
3. encapsulate the manufacture method of base island exposed encapsulating structure after the first etching of a kind of single-chip upside-down mounting according to claim 2, it is characterized in that: cross-over connection passive device (8) between described pin (2) and the pin (2), described passive device (8) are connected across between pin (2) front and pin (2) front or are connected across between pin (2) back side and pin (2) back side.
4. the manufacture method of the base island exposed encapsulating structure of encapsulation according to claim 2 or after the etching of 3 described a kind of single-chip upside-down mountings elder generations, it is characterized in that: described pin (2) has multi-turn.
5. encapsulate the manufacture method of base island exposed encapsulating structure after the first etching of a kind of single-chip upside-down mounting according to claim 2, it is characterized in that: the seven pairs of metal substrate back side of described step 10 plastic packaging material tapping cleans and carries out simultaneously the coat of metal coating.
6. encapsulate the manufacture method of base island exposed encapsulating structure after the first etching of a kind of single-chip upside-down mounting according to claim 2, it is characterized in that: described Ji Dao (1) has a plurality of.
7. encapsulate base island exposed encapsulating structure after the first etching of a kind of single-chip upside-down mounting according to claim 1, it is characterized in that: described Ji Dao (1) comprises Ji Dao top, Ji Dao bottom and intermediate barrier layers, described Ji Dao top and Ji Dao bottom form by the single or multiple lift metal plating, and described intermediate barrier layers is nickel dam, titanium layer or copper layer.
8. encapsulate base island exposed encapsulating structure after the first etching of a kind of single-chip upside-down mounting according to claim 1, it is characterized in that: described pin (2) comprises pin top, pin bottom and intermediate barrier layers, described pin top and pin bottom form by the single or multiple lift metal plating, and described intermediate barrier layers is nickel dam, titanium layer or copper layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210140791.9A CN102856289B (en) | 2012-05-09 | 2012-05-09 | First etched and then packaged packaging structure with single chip reversedly installed and base islands exposed and preparation method of structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210140791.9A CN102856289B (en) | 2012-05-09 | 2012-05-09 | First etched and then packaged packaging structure with single chip reversedly installed and base islands exposed and preparation method of structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102856289A true CN102856289A (en) | 2013-01-02 |
| CN102856289B CN102856289B (en) | 2014-10-29 |
Family
ID=47402738
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210140791.9A Active CN102856289B (en) | 2012-05-09 | 2012-05-09 | First etched and then packaged packaging structure with single chip reversedly installed and base islands exposed and preparation method of structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102856289B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080105973A1 (en) * | 2006-11-06 | 2008-05-08 | Broadcom Corporation | Semiconductor assembly with one metal layer after base metal removal |
| CN201681868U (en) * | 2010-04-26 | 2010-12-22 | 江苏长电科技股份有限公司 | Chip inversion encapsulating structure |
| CN102376672A (en) * | 2011-11-30 | 2012-03-14 | 江苏长电科技股份有限公司 | Foundation island-free ball grid array packaging structure and manufacturing method thereof |
-
2012
- 2012-05-09 CN CN201210140791.9A patent/CN102856289B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080105973A1 (en) * | 2006-11-06 | 2008-05-08 | Broadcom Corporation | Semiconductor assembly with one metal layer after base metal removal |
| CN201681868U (en) * | 2010-04-26 | 2010-12-22 | 江苏长电科技股份有限公司 | Chip inversion encapsulating structure |
| CN102376672A (en) * | 2011-11-30 | 2012-03-14 | 江苏长电科技股份有限公司 | Foundation island-free ball grid array packaging structure and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102856289B (en) | 2014-10-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102723293A (en) | Etching-first and packaging-later manufacturing method for chip inversion single-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit | |
| CN102723280A (en) | Flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and packaging structure of flip-chip single-face three-dimensional circuit | |
| CN102856212A (en) | Flip etching-after-packaging manufacture method and packaging structure for chips with two sides and three-dimensional lines | |
| CN102723288A (en) | Flip chip single-faced three-dimensional circuit manufacture method by encapsulation prior to etching and flip chip single-faced three-dimensional circuit encapsulation structure | |
| CN102856284B (en) | Multi-chip flip, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof | |
| CN102867802B (en) | Multi-chip reversely-arranged etched-encapsulated base island-exposed encapsulating structure and manufacturing method thereof | |
| CN102760668B (en) | Single-side three-dimensional circuit chip upside-down-charging packaging-before-etching method and packaging structure thereof | |
| CN102856291B (en) | First etched and then packaged packaging structure with multiple chips normally installed and without base islands as well as preparation method thereof | |
| CN102856289B (en) | First etched and then packaged packaging structure with single chip reversedly installed and base islands exposed and preparation method of structure | |
| CN102856271B (en) | Multi-chip flip, packaging-after-etching and non-pad packaging structure and manufacturing method thereof | |
| CN102856292B (en) | Single-chip flip, packaging-after-etching and non-pad packaging structure and manufacturing method thereof | |
| CN102867791B (en) | Multi-chip reversely-arranged etched-encapsulated base island-buried encapsulating structure and manufacturing method thereof | |
| CN102856269B (en) | Single-chip flip, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof | |
| CN102856290A (en) | First etched and then packaged packaging structure with single chip reversedly installed and base islands buried as well as preparation method thereof | |
| CN102856285B (en) | Single-chip flip, etching-after-packaging and pad embedded packaging structure and manufacturing method thereof | |
| CN102881671B (en) | Single-chip front-mounted etching-first package-followed island-exposed package structure and manufacturing method thereof | |
| CN102856287A (en) | Multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof | |
| CN102856270B (en) | Single-chip flip, etching-after-packaging and non-pad packaging structure and manufacturing method thereof | |
| CN102881664B (en) | Multi-chip inversely-mounted package-first etching-followed island-free package structure and manufacturing method thereof | |
| CN102856268B (en) | First packaged and then etched packaging structure with multiple chips normally installed and without base islands and preparation method of structure | |
| CN102856267B (en) | First packaged and then etched packaging structure with multiple chips reversedly installed and base islands buried and preparation method of structure | |
| CN102856286B (en) | First packaged and then etched packaging structure with single chip normally installed and without base islands and preparation method of structure | |
| CN102867790B (en) | Multi-chip positively-arranged etched-encapsulated base island-exposed encapsulating structure and manufacturing method thereof | |
| CN102856283A (en) | First packaged and then etched packaging structure with single chip normally installed and base islands buried and preparation method of structure | |
| CN102856293B (en) | First etched and then packaged packaging structure with single chip normally installed and without base islands as well as preparation method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |