CN102856216A - Method for packaging square and flat soldering lug without pin - Google Patents
Method for packaging square and flat soldering lug without pin Download PDFInfo
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- CN102856216A CN102856216A CN201210340580XA CN201210340580A CN102856216A CN 102856216 A CN102856216 A CN 102856216A CN 201210340580X A CN201210340580X A CN 201210340580XA CN 201210340580 A CN201210340580 A CN 201210340580A CN 102856216 A CN102856216 A CN 102856216A
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Abstract
The invention relates to the technical field of semiconductor processing, in particular to a method for packaging a square and flat soldering lug without a pin, which sequentially comprises the steps: 1) soldering a plug by solder; 2) welding a line by a wafer; 3) pasting a lead frame; and 4) plastic packaging and moulding. The wafer is welded by the solder. Compared with the prior art, the manufacturing steps are reduced, thereby shortening the manufacturing period of products; the cost of the solder is lower than that of elargol or solder paste, and the radiating and conducting performance of the solder is superior to those of the elargol or solder paste. Therefore, the welding period of the wafer is shortened, so that the production efficiency is improved, the manufacturing cost is further reduced, and the product performance is improved.
Description
Technical field
The present invention relates to the semiconductor processing technology field, particularly relate to a kind of method of quad flat non-pin package weld tabs.
Background technology
Semiconductor device is before encapsulation, it is the weld tabs district that wafer is welded in lead frame, lead frame is as the chip carrier of integrated circuit, it is a kind of electrical connection that realizes chip internal circuit exit and outer lead by means of bonding material (spun gold, aluminium wire, copper wire), form the key structure spare of electric loop, it has played the function served as bridge that is connected with outer lead, all needs to use lead frame in the semiconductor integrated block of the overwhelming majority.
In the prior art, wafer is welded in the pad area of lead frame, mostly adopt elargol or tin cream, adopt that the step of elargol or tin cream welding wafer generally comprises 1, the lead frame pad pasting: paste a glued membrane at the lead frame back side, the problem of the overflowed colloid impact heat radiation in heating panel zone when overcoming the plastic packaging moulding; 2, elargol (or tin cream) weld tabs: about 25 ° of C of room temperature, carry out a glue, then carry out the die bond operation; 3, elargol (or tin cream) baking: in the high temperature roaster of 175 ° of C, solidified 3 hours; 4, wafer bonding wire: under the rail temperature of 220 ° of C, carry out ultrasonic bonding, make wafer and the conducting of lead frame connection line; 5, plastic packaging moulding: plastic packaging material melts under the temperature of 175 ° of C, sees through the closed extruding of mould, makes plastic packaging material pour into die cavity, and the functional area embedding of wafer and lead frame, thereby the protection product is not damaged and oxidation.
The step of the welding wafer of prior art is more loaded down with trivial details, cause production efficiency low owing to the processing procedure time is long, the cost that this processing procedure uses elargol or tin cream also higher, performance is general.
Summary of the invention
The method that the object of the invention is to avoid weak point of the prior art and a kind of quad flat non-pin package weld tabs is provided, the method of this quad flat non-pin package weld tabs is owing to thereby the cycle that shortens the wafer welding enhances productivity, also can reduce cost of manufacture, enhance product performance.
Purpose of the present invention is achieved through the following technical solutions.
A kind of method of quad flat non-pin package weld tabs is provided, comprises the step that next coming in order carry out:
1) solder weld tabs; 2) wafer bonding wire; 3) lead frame pad pasting; 4) plastic packaging moulding.
Preferably, the solder weld tabs of step 1), concrete steps are as follows:
After the weld tabs district of lead frame puts into solder, when the high-temperature region of automatically being sent into track is preheated to solder and is molten into liquid tin, then utilize the press mold head according to the size of wafer with the moulding of liquid tin press mold, then the lead frame crystal bonding area that is transported to track is inhaled the wafer die bond, cool off the cooling zone that lead frame was transported to track after die bond was finished, and is sent to the magazine discharging finally by the room-temperature zone of crossing track.
Preferred, the consumption of solder decides according to wafer size in the step 1), be under the solder condition of 0.5mm in wire diameter, the solder consumption was 1mm when wafer size was 1x1mm, the solder consumption was 2.3mm when wafer size was 2x2mm, the solder consumption was 3.1mm when wafer size was 3x3mm, and the solder consumption was 5mm when wafer size was 4x4mm, and consumption was 6mm when wafer size was 5x5mm.
Another is preferred, and the variations in temperature of the high-temperature region of track is: track length is every 100 ± 10mm, and the rail temperature variation is followed successively by 300 ± 10 ° of C, 360 ± 10 ° of C, 360 ± 10 ° of C, 370 ± 10 ° of C, 375 ± 10 ° of C.
Preferred, solder is fused into liquid state at lead frame when the temperature of 375 ± 10 ° of C.
Another is preferred, and the temperature of press mold head is 420 ± 30 ° of C.
Another is preferred, and the temperature of the crystal bonding area of track is 375 ± 10 ° of C.
Another is preferred, and the temperature of the cooling zone of track is 360 ± 10 ° of C of elder generation, rear 290 ± 10 ° of C, and two temperature settings are divided into 100 ± 10mm place mutually at track length.
Another is preferred, and the room-temperature zone of track is the obturator of the supply of nitrogen inert gas.
Another is preferred, and the lead frame pad pasting of step 3) is specially: paste a glued membrane at the lead frame back side.
Beneficial effect of the present invention is as follows:
The present invention compared with prior art, has reduced making step by welding wafer with solder, thereby has shortened the production cycle; The cost of solder is lower than the cost of elargol or tin cream, and solder is more superior than elargol or tin cream on heat radiation and electric conductivity, and therefore, thereby the present invention also can reduce cost of manufacture because the cycle of shortening wafer welding enhances productivity, and enhances product performance.
Embodiment
The invention will be further described with the following Examples.
The method of a kind of quad flat non-pin package weld tabs of present embodiment comprises the step that next coming in order carry out:
1) solder weld tabs; 2) wafer bonding wire; 3) lead frame pad pasting; 4) plastic packaging moulding.
The present invention compared with prior art, has reduced making step by welding wafer with solder, thereby has shortened the production cycle; The cost of solder is lower than the cost of elargol or tin cream, and solder is more superior than elargol or tin cream on heat radiation and electric conductivity, and therefore, thereby the present invention also can reduce cost of manufacture because the cycle of shortening wafer welding enhances productivity, and enhances product performance.
Concrete, the solder weld tabs of step 1), concrete steps are as follows:
After the weld tabs district of lead frame puts into solder, when the high-temperature region of automatically being sent into track is preheated to solder and is molten into liquid tin, then utilize the press mold head according to the size of wafer with the moulding of liquid tin press mold, then the lead frame crystal bonding area that is transported to track is inhaled the wafer die bond, cool off the cooling zone that lead frame was transported to track after die bond was finished, and is sent to the magazine discharging finally by the room-temperature zone of crossing track.
Concrete, the consumption of solder decides according to wafer size in the step 1), be under the solder condition of 0.5mm in wire diameter, the solder consumption was 1mm when wafer size was 1x1mm, the solder consumption was 2.3mm when wafer size was 2x2mm, the solder consumption was 3.1mm when wafer size was 3x3mm, and the solder consumption was 5mm when wafer size was 4x4mm, and consumption was 6mm when wafer size was 5x5mm.
Concrete, the variations in temperature of track high-temperature region is: track length is every 100 ± 10mm, and the rail temperature variation is followed successively by 300 ± 10 ° of C, 360 ± 10 ° of C, 360 ± 10 ° of C, 370 ± 10 ° of C, 375 ± 10 ° of C.
Concrete, solder is fused into liquid state at lead frame when the temperature of 375 ± 10 ° of C.
Concrete, the temperature of press mold head is 420 ± 30 ° of C.
Concrete, the temperature of the crystal bonding area of track is 375 ± 10 ° of C.
Concrete, the temperature of the cooling zone of track is 360 ± 10 ° of C of elder generation, rear 290 ± 10 ° of C, and two temperature settings are divided into 100 ± 10mm place mutually at track length.
Concrete, the room-temperature zone of track is the obturator of the supply of nitrogen inert gas.Can prevent the product oxidation.
Concrete, the lead frame pad pasting of step 3) is specially: paste a glued membrane at the lead frame back side.Prior art is first at the lead frame pad pasting, when overcoming the plastic packaging moulding overflow glue and affect heat radiation in the heating panel zone, pad pasting processing procedure of the present invention is chosen in and finishes behind the bonding wire is to avoid glued membrane at solder weld tabs processing procedure because rail temperature is too high to be caused glued membrane to bear and cause glued membrane viscosity to descend, and does not reach the glue effect of overflowing that prevents.The maximum bearing temperature of glued membrane is 220 ° of C.
Of the present invention 2) wafer bonding wire and 4) two processing procedures of plastic packaging moulding are same as the prior art, do not repeat them here.
Should be noted that at last; above embodiment only is used for technical scheme of the present invention being described but not limiting the scope of the invention; although with reference to preferred embodiment the present invention has been done detailed description; those of ordinary skill in the art is to be understood that; can make amendment or be equal to replacement technical scheme of the present invention, and not break away from essence and the scope of technical solution of the present invention.
Claims (10)
1. the method for a quad flat non-pin package weld tabs is characterized in that: comprise the step that next coming in order carry out:
1) solder weld tabs; 2) wafer bonding wire; 3) lead frame pad pasting; 4) plastic packaging moulding.
2. the method for a kind of quad flat non-pin package weld tabs according to claim 1 is characterized in that: the solder weld tabs of step 1), and concrete steps are as follows:
After the weld tabs district of lead frame puts into solder, when the high-temperature region of automatically being sent into track is preheated to solder and is molten into liquid tin, then utilize the press mold head according to the size of wafer with the moulding of liquid tin press mold, then the lead frame crystal bonding area that is transported to track is inhaled the wafer die bond, cool off the cooling zone that lead frame was transported to track after die bond was finished, and is sent to the magazine discharging finally by the room-temperature zone of crossing track.
3. the method for a kind of quad flat non-pin package weld tabs according to claim 2, it is characterized in that: the consumption of solder decides according to wafer size in the step 1), be specially: be under the solder condition of 0.5mm in wire diameter, when wafer size is 1x1mm, the solder consumption is 1mm, and the solder consumption was 2.3mm when wafer size was 2x2mm, and the solder consumption was 3.1mm when wafer size was 3x3mm, the solder consumption was 5mm when wafer size was 4x4mm, and consumption was 6mm when wafer size was 5x5mm.
4. the method for a kind of quad flat non-pin package weld tabs according to claim 2, it is characterized in that: the variations in temperature of the high-temperature region of track is: track length is every 100 ± 10mm, the rail temperature variation is followed successively by 300 ± 10 ° of C, 360 ± 10 ° of C, 360 ± 10 ° of C, 370 ± 10 ° of C, 375 ± 10 ° of C.
5. the method for a kind of quad flat non-pin package weld tabs according to claim 4, it is characterized in that: solder is fused into liquid state at lead frame when the temperature of 375 ± 10 ° of C.
6. the method for a kind of quad flat non-pin package weld tabs according to claim 2, it is characterized in that: the temperature of press mold head is 420 ± 30 ° of C.
7. the method for a kind of quad flat non-pin package weld tabs according to claim 2, it is characterized in that: the temperature of the crystal bonding area of track is 375 ± 10 ° of C.
8. the method for a kind of quad flat non-pin package weld tabs according to claim 2 is characterized in that: the temperature of the cooling zone of track is first 360 ± 10 ° of C, rear 290 ± 10 ° of C, and two temperature settings are divided into 100 ± 10mm place mutually at track length.
9. the method for a kind of quad flat non-pin package weld tabs according to claim 2, it is characterized in that: the room-temperature zone of track is the obturator of the supply of nitrogen inert gas.
10. the method for a kind of quad flat non-pin package weld tabs according to claim 1, it is characterized in that: the lead frame pad pasting of step 3) is specially: paste a glued membrane at the lead frame back side.
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CN201210340580.XA CN102856216B (en) | 2012-09-14 | 2012-09-14 | Method for packaging square and flat soldering lug without pin |
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CN201210340580.XA CN102856216B (en) | 2012-09-14 | 2012-09-14 | Method for packaging square and flat soldering lug without pin |
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CN102856216A true CN102856216A (en) | 2013-01-02 |
CN102856216B CN102856216B (en) | 2015-01-07 |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103681319A (en) * | 2013-12-18 | 2014-03-26 | 常州星海电子有限公司 | Manufacturing technology of diodes |
CN107993945A (en) * | 2016-10-26 | 2018-05-04 | 汕尾德昌电子有限公司 | A kind of manufacturing process of DFN diodes |
CN108155106A (en) * | 2017-12-22 | 2018-06-12 | 珠海市大鹏电子科技有限公司 | A kind of length climbs the preparation process of electric light electric coupler |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060125062A1 (en) * | 2004-12-15 | 2006-06-15 | Zuniga-Ortiz Edgar R | Semiconductor package having improved adhesion and solderability |
CN101325190A (en) * | 2007-06-13 | 2008-12-17 | 南茂科技股份有限公司 | Square flat non-pin encapsulation structure with pattern on the conductor frame |
CN102117753A (en) * | 2010-01-05 | 2011-07-06 | 飞思卡尔半导体公司 | Method for packaging semiconductor device |
CN102202827A (en) * | 2010-07-20 | 2011-09-28 | 联发软件设计(深圳)有限公司 | A tin pre-coating method used for a multicolumn quad flat no-lead chip and a rework method |
-
2012
- 2012-09-14 CN CN201210340580.XA patent/CN102856216B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060125062A1 (en) * | 2004-12-15 | 2006-06-15 | Zuniga-Ortiz Edgar R | Semiconductor package having improved adhesion and solderability |
CN101325190A (en) * | 2007-06-13 | 2008-12-17 | 南茂科技股份有限公司 | Square flat non-pin encapsulation structure with pattern on the conductor frame |
CN102117753A (en) * | 2010-01-05 | 2011-07-06 | 飞思卡尔半导体公司 | Method for packaging semiconductor device |
CN102202827A (en) * | 2010-07-20 | 2011-09-28 | 联发软件设计(深圳)有限公司 | A tin pre-coating method used for a multicolumn quad flat no-lead chip and a rework method |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103681319A (en) * | 2013-12-18 | 2014-03-26 | 常州星海电子有限公司 | Manufacturing technology of diodes |
CN103681319B (en) * | 2013-12-18 | 2016-08-17 | 常州星海电子有限公司 | A kind of preparation technology of diode |
CN107993945A (en) * | 2016-10-26 | 2018-05-04 | 汕尾德昌电子有限公司 | A kind of manufacturing process of DFN diodes |
CN108155106A (en) * | 2017-12-22 | 2018-06-12 | 珠海市大鹏电子科技有限公司 | A kind of length climbs the preparation process of electric light electric coupler |
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CN102856216B (en) | 2015-01-07 |
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