CN102843109B - A kind of category D amplifier chip - Google Patents
A kind of category D amplifier chip Download PDFInfo
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- CN102843109B CN102843109B CN201210361831.2A CN201210361831A CN102843109B CN 102843109 B CN102843109 B CN 102843109B CN 201210361831 A CN201210361831 A CN 201210361831A CN 102843109 B CN102843109 B CN 102843109B
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Abstract
The invention discloses a kind of category D amplifier chip of integrated circuit fields, comprise PWM module, first and export driving, the second output driving, load and current foldback circuit; Described first exports the output driven arranges the first power tube, and described second exports the output driven arranges the second power tube, and described current foldback circuit is provided with filter; Voltage difference between described PWM module two inputs can regulate between 0 to rail to rail voltage difference, when voltage difference between described PWM module two inputs is rail to rail voltage difference, described PWM module continues to export the first mutually anti-phase full width pwm signal and the second full width pwm signal.Its technique effect is: the high potential pulsewidth that can solve due to over-current signal is too low, causes over-current signal to be missed the technical problem of pulsewidth filtering by the filter on described current foldback circuit.
Description
Technical field
The present invention relates to a kind of category D amplifier chip of integrated circuit fields.
Background technology
Refer to Fig. 1, current category D amplifier chip comprises: amplification module 11, PWM module 12, first export driving 13, second and export driving 14, load 17 and current foldback circuit 2.The P output of described PWM module 12 connects described first and exports driving 13, and the N output of described PWM module 12 connects described second and exports driving 14.Described first output exporting driving 13 is provided with the first power tube 15, and the described second output exporting driving 14 is provided with the second power tube 16, and described load 17 connects described first power tube 15 and described second power tube 16.Input the waveform of the audio input signal of described amplification module 11 as shown in Figure 2, this audio input signal is after described amplification module 11 amplifies, input described PWM module 12 to modulate, described PWM module 12 exports the first pwm signal and the second pwm signal.Described first pwm signal and described second pwm signal are mutually anti-phase.Described first pwm signal is after the driving exporting driving 13 through described first, the P end of described load 17 is loaded, described second pwm signal is after the driving exporting driving 14 through described second, the N end of described load 17 is loaded, between described load 17 two ends, coating-forming voltage is poor, described load 17 output pulse signal.The waveform of described pulse signal as shown in Figure 3.In Fig. 3, Vpower represents that described pulse signal is in high potential, and-Vpower represents that described pulse signal is in negative potential.When described pulse signal be high potential or negative potential time, described load 17 has electric current to flow through.
Export driving 13 to make described first and carry out signal feedback to described PWM module 12, described first power tube 15 takes back the P input of described PWM module 12 through the first tieback resistance 18.Export driving 14 to make described second and carry out signal feedback to described PWM module 12, described second power tube 16 takes back the N input of described PWM module 12 through the second tieback resistance 19.The resistance of described first tieback resistance 18 and described second tieback resistance 19 is equal.Such circuit design easily makes described first power tube 15 and described second power tube 16 occur short circuit, thus cause big current, short circuit current flows through described first power tube 15 and described second power tube 16, wafer damage in other words conj.or perhaps, now very little by the electric current in described load 17.Because the high potential level of the pulse signal exported from described load 17 is directly proportional to the electric current that described load 17 is flow through, therefore now the high potential level of this pulse signal is very low, lower than overcurrent threshold value b.Category D amplifier chip can be arranged the current foldback circuit 2 in parallel with described load 17 for this reason, be used for monitoring the electric current in described load 17.Described overcurrent threshold value b is by default.
Described current foldback circuit 2 comprises: the second over-current detection module 22 of holding the first over-current detection module 21 of being connected and the N of described load 17 to hold to be connected with the P of described load 17 and the Logic control module 23 between described first over-current detection module 21 and described second over-current detection module 22; when the high potential level of the pulse signal that described load 17 exports is lower than overcurrent threshold value b; described first over-current detection module 21 produces OC+ over-current signal (positive over-current signal), described second over-current detection module 22 produces OC-over-current signal (negative over-current signal).Described Logic control module 23 receives described OC+ over-current signal and described OC-over-current signal and carries out signal conversion, export and turn off the cut-off signals that described first exports driving 13 and described second output driving 14, and described PWM module 12 keeps normal operating conditions.Described category D amplifier chip enters overcurrent protection state.
After described first output driving 13 and described second output driving 14 reopen, if category D amplifier chip is operated near DC point, the power supply amplitude inputting the audio input signal of described PWM mould 12 is very low, described first pwm signal causing PWM module 12 to export and the high potential pulsewidth of described second pwm signal very low, the high potential pulsewidth of the pulse signal that described load 17 exports is very low, cause the high potential pulsewidth of described OC+ over-current signal and described OC-over-current signal very low, namely lower than filter threshold a, as shown in Figure 4.This filter threshold a is by default.Therefore, described OC+ over-current signal and described OC-over-current signal can be filtered away by the described filter pulsewidth crossed on current circuit 2, these filters both can be built in described first over-current detection module 21 and described second over-current detection module 22 simultaneously, also only can be built in described Logic control module 23.Therefore described Logic control module 23 cannot turn off described first and export driving 13 and described second output driving 14, described first power tube 15 and described second power tube 16 can because cannot turn off the repeated stock suffering big current, thus affect the useful life of chip, even direct chip to be burnt out.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, a kind of category D amplifier chip is provided, its high potential pulsewidth that can solve due to over-current signal is too low, cause over-current signal by pulsewidth filtering by mistake, cause in category D amplifier chip first to export driving and second and export the technical problem driving and cannot turn off.
A kind of technical scheme realizing above-mentioned purpose is: a kind of category D amplifier chip, comprises PWM module, first and exports driving, the second output driving, load and current foldback circuit; Described first exports the output that the output driven arranges the first power tube, described second output drives arranges the second power tube, and described current foldback circuit is provided with at least one filter;
Voltage difference between described PWM module two inputs can regulate between rail to rail voltage difference, when voltage difference between described PWM module two inputs is rail to rail voltage difference, described PWM module receives external audio input signal, the first full width pwm signal that lasting output is mutually anti-phase and the second full width pwm signal.
Further, two inputs of described PWM module are other respectively connects a switch, the other switch connect of one of them input is mains switch, the other switch connect of another input is earthed switch, described mains switch and described earthed switch are opened simultaneously, and the voltage difference between described PWM module two inputs is rail to rail voltage difference.
Further, two inputs of described PWM module are arranged respectively the resistance of similar resistance, the switch described in two is the other input being connected on two described resistance correspondingly.
Further, a kind of category D amplifier chip according to claim, is characterized in that: described current foldback circuit comprises the first over-current detection module, Logic control module and the second over-current detection module of connecting successively; Described first over-current detection module and described second over-current detection module detect the high potential level of the pulse signal that described load exports respectively, when the high potential level of described pulse signal being detected lower than overcurrent threshold value b, produce OC+ over-current signal in described first over-current detection module, in described second over-current detection module, produce OC-over-current signal.
Also want further, described first over-current detection module and described second over-current detection module built-in first filter respectively, carry out pulsewidth filtering to described OC+ over-current signal and described OC-over-current signal, in OC+ over-current signal described in elimination and described OC-over-current signal, high potential pulsewidth is lower than the burr of filter threshold a.
Also want further, described Logic control module exports with described first respectively and drives and described second export to drive and be connected, described Logic control module receives described OC+ over-current signal and described OC-over-current signal and carries out signal conversion, exports to turn off described first and export and drive and the described second cut-off signals exporting driving.
Also will further, described Logic control module also exports opens the start signal that described first exports driving and described second output driving.
Also will be further, built-in second filter of described Logic control module, described Logic control module receives described OC+ over-current signal and described OC-over-current signal, first by described second filter, pulsewidth filtering is carried out to described OC+ over-current signal and described OC-over-current signal, in OC+ over-current signal described in elimination and described OC-over-current signal, high potential pulsewidth is lower than the burr of filter threshold a, again signal conversion is carried out to described OC+ over-current signal and described OC-over-current signal, export and turn off the cut-off signals that described first output drives and described second output drives.
Further, described Logic control module is connected with described mains switch and described earthed switch respectively, arrange reverser between wherein said Logic control module and described earthed switch, described Logic control module controls unlatching and the shutoff of described mains switch and described earthed switch.
Have employed the technical scheme of a kind of category D amplifier chip of the present invention, the voltage difference between two inputs of the PWM module namely in category D amplifier chip can carry out the technical scheme regulated between 0 to rail to rail voltage difference.Its technique effect is: it can ensure the high potential pulsewidth of over-current signal; make over-current signal not by the pulsewidth filtering by mistake of the filter on current foldback circuit; ensure that the summary responses of Logic control module to big current; turn off described first and export driving and described second output driving; protect the first power tube and the second power tube not by the impact of big current, thus ensure that the safe operation of category D amplifier chip.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of the category D amplifier chip of prior art.
Fig. 2 is the oscillogram of the audio input signal of input PWM module.
Fig. 3 is the oscillogram of the pulse signal that load exports.
Fig. 4 is the oscillogram of over-current signal.
Fig. 5 is the circuit diagram of a kind of category D amplifier chip of the present invention.
Embodiment
Refer to Fig. 5, the present inventor, in order to understand technical scheme of the present invention better, below by embodiment particularly, and is described in detail by reference to the accompanying drawings:
Fig. 5 display be the circuit diagram of a kind of category D amplifier chip of the present invention, this category D amplifier chip comprises amplification module 11, PMW modulation module 12, first exports driving 13, second and exports driving 14, load 17 and current foldback circuit 2.Described first output exporting driving 13 arranges the first power tube 15, and the described second output exporting driving 14 arranges the second power tube 16, and described first power tube 15 and described second power tube 16 are all connected in series by two output switch pipes and form.
The P output of described amplification module 11 is connected with the second resistance 111 by first resistance 110 of connecting successively with the P input of described PMW modulation module 12, the N output of described amplification module 11 is connected with the 4th resistance 113 by the 3rd resistance 112 of connecting successively with the N input of described PMW modulation module 12, the resistance of described first resistance 110 and described 3rd resistance 112 is equal, and the resistance of described second resistance 111 and described 4th resistance 113 is equal.
Described first output driving 13 connects the P output of described PMW modulation module 12, and described second output driving 14 connects the N output of described PMW modulation module 12.The P end of described load 17 connects described first power tube 15, and the N end of described load 17 connects described second power tube 16.In addition described first power tube 15 takes back the P input of described PWM module 12 by the first tieback resistance 18, make described first to export driving 13 and can carry out signal feedback to described PWM module 12, described second power tube 16 takes back the N input of described PWM module 12 by the second tieback resistance 19, making described second to export driving 14 can carry out signal feedback to described PWM module 12.
Described current foldback circuit 2 comprises the first over-current detection module 21, Logic control module 23 and the second over-current detection module 22 of connecting successively.This current foldback circuit 2 is in parallel with described load 17.Wherein said first over-current detection module 21 connects the P end of described load 17, and described second over-current detection module 22 connects the N end of described load 17.Section Point on described Logic control module 23 and described first exports driving 13 and described second and exports driving 14 and be connected respectively.Described first over-current detection module 21 and described second over-current detection module 22 distinguish built-in first filter, built-in second filter of described Logic control module 22.
Described category D amplifier chip also comprises: mains switch 24 and earthed switch 25.The other input being connected on described second resistance 111 in one end of described mains switch 24, the power end of another termination category D amplifier chip, therefore the other P input being connected on described PWM module 12 of described mains switch 24, the other input being connected on described 4th resistance 113 in one end of described earthed switch 25, the earth terminal of another termination category D amplifier chip, the therefore other N input being connected on described PWM module 12 of described earthed switch 25.The object arranging described second resistance 111 and described 4th resistance 113 is to protect described mains switch 24, described earthed switch 25 and described PWM module 12.First node on described Logic control module 23 is connected with described earthed switch 25 and described mains switch 24 respectively, arranges reverser 26 between wherein said Logic control module 23 and described mains switch 24.
The object of such design is: due to described mains switch 24 and described earthed switch 25 open simultaneously time, the N input of described PWM module 12 is pulled to the earth terminal of category D amplifier chip, and namely the voltage of the N input of described PWM module 12 equals the voltage of category D amplifier chip earth terminal.The P input of described PWM module 12 is pulled to the power end of category D amplifier chip, namely the voltage of the P input of described PWM module 12 equals the voltage of category D amplifier chip power end, produces a rail to rail voltage difference between the P input of described PWM module and N input.Now described PWM module 12 receives the audio input signal amplified through described amplification module 11 and carries out full width PMW and modulate, and described PWM module 12 exports mutually anti-phase the first full width pwm signal and second expires width pwm signal.
Under overcurrent protection state, the course of work of the current foldback circuit of described category D amplifier chip is:
First node on described Logic control module 23 exports the first skip signal, opens described mains switch 24 and described earthed switch 25.The mains switch 24 being connected on the P input of described PWM module 12 due to side connects the power end of category D amplifier chip, the earthed switch 25 that side is connected on the N input of described PWM module 12 connects the earth terminal of category D amplifier chip, so described mains switch 24 and described earthed switch 25 are opened simultaneously, a rail to rail voltage difference is produced between the P input of described PWM module 12 and N input, the P output of described PWM module 12 continues the full width pwm signal of output first, and the N output of described PWM module 12 continues the full width pwm signal of output second.Described first full width pwm signal and the described second full width pwm signal are mutually anti-phase.
After waiting for a period of time, the Section Point on described Logic control module 23 exports start signal, and open described first and export driving 13 and described second output driving 14, described first power tube 15 and described second power tube 16 are also opened thereupon.Described first exports driving 13 drives the described first full width pwm signal to load the P end of described load 17, and the P end of described load 17 is pulled to the power end of described category D amplifier chip.Described second exports driving 14 drives the described second full width pwm signal to load the N end of described load 17, and the N end of described load 17 is pulled to the earth terminal with described category D amplifier chip, forms rail to rail voltage difference between the P end of described load 17 and N end.Described load 17 is finally made to continue to export full width pulse signal.
If now the high potential level of described full width pulse signal is lower than the overcurrent threshold value b set, the OC+ over-current signal produced in described first over-current detection module 21, and by the first filter in described first over-current detection module 21, first pulsewidth filtering is carried out to described OC+ over-current signal, the OC-over-current signal produced in described second over-current detection module 22, and by the first filter in described second over-current detection module 22, first pulsewidth filtering is carried out to described OC-over-current signal.And then by the second filter in described Logic control module 23, second pulsewidth filtering is carried out to described OC+ over-current signal and described OC-over-current signal.Through twice pulsewidth filtering, in described OC+ over-current signal and described OC-over-current signal, no longer include the burr of high potential pulsewidth lower than filter threshold a.
Because the described first high potential pulsewidth expiring width pwm signal and the described second full width pwm signal ensure that the high potential pulsewidth of described full width pulse signal, the high potential pulsewidth of described full width pulse signal ensure that the high potential pulsewidth of described OC+ over-current signal and described OC-over-current signal is all greater than described filter threshold a, and described OC+ over-current signal and described OC-over-current signal all can not by pulsewidth filtering by mistake in the first pulsewidth filtering and the second pulsewidth filtering.Then described Logic control module 23 carries out signal conversion to described OC+ over-current signal and described OC-over-current signal, then the Section Point of described Logic control module 23 exports and turns off described first output driving 13 and described second output driving 14 cut-off signals, and described first power tube 15 and described second power tube 16 also turn off thereupon.After waiting for certain hour, the Section Point of described Logic control module 23 exports start signal again, again open first and export driving 13 and the second output driving 14, described first over-current detection module 21 and described second over-current detection module 22 carry out over-current detection again, if described first over-current detection module 21 and described second over-current detection module 22 detect that the high potential level of described full width pulse signal is higher than overcurrent threshold value b, after then postponing some seconds, first node on described Logic control module 23 exports the second skip signal, turn off described mains switch 24 and described earthed switch 25, now whole category D amplifier chip recovers normal operating conditions, the P output of described PWM module 12 exports the first pwm signal, the N output of described PWM module 12 exports the second pwm signal, described load 17 output pulse signal.If described first over-current detection module 21 and described second over-current detection module 22 detect that the high potential level of described pulse signal is lower than overcurrent threshold value b, then again turn off described first and export driving 13 and described second output driving 14.Described category D amplifier chip enters overcurrent protection state again.
Those of ordinary skill in the art will be appreciated that, above embodiment is only used to the present invention is described, and be not used as limitation of the invention, as long as in spirit of the present invention, all will drop in Claims scope of the present invention the change of the above embodiment, modification.
Claims (7)
1. a category D amplifier chip, comprises PWM module (12), first and exports driving (13), the second output driving (14), load (17) and current foldback circuit (2); Described first output exporting driving (13) arranges the first power tube (15), the described second output exporting driving (14) arranges the second power tube (16), and described current foldback circuit (2) is provided with at least one filter;
It is characterized in that: the voltage difference between described PWM module (12) two inputs can regulate between 0 to rail to rail voltage difference, when voltage difference between described PWM module (12) two inputs is rail to rail voltage difference, described PWM module (12) receives external audio input signal, the first full width pwm signal that lasting output is mutually anti-phase and the second full width pwm signal
Two inputs of described PWM module (12) are other respectively connects a switch, the other switch connect of one of them input is mains switch (24), the other switch connect of another input is earthed switch (25), described mains switch (24) and described earthed switch (25) are opened simultaneously, voltage difference between described PWM module (12) two inputs is rail to rail voltage difference
Described current foldback circuit (2) comprises the first over-current detection module (21), Logic control module (23) and the second over-current detection module (22) of connecting successively; Described first over-current detection module (21) and described second over-current detection module (22) detect the high potential level of the pulse signal that described load (17) exports respectively, when the high potential level of described pulse signal being detected lower than overcurrent threshold value b, produce OC+ over-current signal in described first over-current detection module (21), in described second over-current detection module (22), produce OC-over-current signal.
2. a kind of category D amplifier chip according to claim 1, it is characterized in that: the resistance two inputs of described PWM module (12) being arranged respectively similar resistance, the switch described in two is the other input being connected on two described resistance correspondingly.
3. a kind of category D amplifier chip according to claim 1, it is characterized in that: described first over-current detection module (21) and described second over-current detection module (22) built-in first filter respectively, carry out pulsewidth filtering to described OC+ over-current signal and described OC-over-current signal, in OC+ over-current signal described in elimination and described OC-over-current signal, high potential pulsewidth is lower than the burr of filter threshold a.
4. a kind of category D amplifier chip according to claim 1 or 3, it is characterized in that: described Logic control module (23) exports with described first respectively and drives (13) and described second to export to drive (14) to be connected, described Logic control module (23) receives described OC+ over-current signal and described OC-over-current signal and carries out signal conversion, exports to turn off described first and export the cut-off signals driving (13) and described second to export driving (14).
5. a kind of category D amplifier chip according to claim 4, is characterized in that: described Logic control module (23) also exports opens the start signal that described first exports driving (13) and described second output driving (14).
6. a kind of category D amplifier chip according to claim 4, it is characterized in that: built-in second filter of described Logic control module (23), described Logic control module (23) receives described OC+ over-current signal and described OC-over-current signal, first by described second filter, pulsewidth filtering is carried out to described OC+ over-current signal and described OC-over-current signal, in OC+ over-current signal described in elimination and described OC-over-current signal, high potential pulsewidth is lower than the burr of filter threshold a, again signal conversion is carried out to described OC+ over-current signal and described OC-over-current signal, export shutoff described first and export the cut-off signals driving (13) and described second output to drive (14).
7. a kind of category D amplifier chip according to claim 1, it is characterized in that: described Logic control module (23) is connected with described mains switch (24) and described earthed switch (25) respectively, arrange reverser (26) between wherein said Logic control module (23) and described earthed switch (25), described Logic control module (23) controls unlatching and the shutoff of described mains switch (24) and described earthed switch (25).
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| CN201210361831.2A CN102843109B (en) | 2012-09-25 | 2012-09-25 | A kind of category D amplifier chip |
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| CN201210361831.2A CN102843109B (en) | 2012-09-25 | 2012-09-25 | A kind of category D amplifier chip |
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| CN102843109B true CN102843109B (en) | 2016-01-20 |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103905006B (en) * | 2014-03-28 | 2017-10-24 | 深圳创维－Rgb电子有限公司 | A kind of category D amplifier chip and its device with duty-cycle limit function |
| CN104639056A (en) * | 2015-01-12 | 2015-05-20 | 宁波明科机电有限公司 | Rapid protecting circuit for power amplifier |
| CN108023577B (en) * | 2016-10-28 | 2023-10-24 | 科域科技有限公司 | Pulse width filter circuit |
| CN114696761A (en) * | 2020-12-30 | 2022-07-01 | 华润微集成电路(无锡)有限公司 | D-type power amplifier modulation system, method, device, processor and storage medium thereof for self-adaptive adjustment of audio signals |
| TWI777631B (en) * | 2021-03-19 | 2022-09-11 | 立錡科技股份有限公司 | Class-d amplifying system and power converter circuit thereof |
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