CN102841777B - 数据处理器中的分支目标缓存器寻址 - Google Patents

数据处理器中的分支目标缓存器寻址 Download PDF

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Publication number
CN102841777B
CN102841777B CN201210201083.1A CN201210201083A CN102841777B CN 102841777 B CN102841777 B CN 102841777B CN 201210201083 A CN201210201083 A CN 201210201083A CN 102841777 B CN102841777 B CN 102841777B
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entry
instruction
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CN102841777A (zh
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T·M·特兰
E·J·吉斯克
M·B·席兹勒
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VLSI Technology Co., Ltd.
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Freescale Semiconductor Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
CN201210201083.1A 2011-06-17 2012-06-15 数据处理器中的分支目标缓存器寻址 Active CN102841777B (zh)

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US13/162,835 2011-06-17
US13/162,835 US8458447B2 (en) 2011-06-17 2011-06-17 Branch target buffer addressing in a data processor

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CN102841777A CN102841777A (zh) 2012-12-26
CN102841777B true CN102841777B (zh) 2016-09-28

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JP (1) JP5933360B2 (https=)
CN (1) CN102841777B (https=)

Cited By (1)

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US12511241B2 (en) 2019-05-22 2025-12-30 Texas Instruments Incorporated Pseudo-first in, first out (FIFO) tag line replacement

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JP6179093B2 (ja) * 2012-12-03 2017-08-16 富士通株式会社 演算処理装置、演算処理方法
CN103984637A (zh) * 2013-02-07 2014-08-13 上海芯豪微电子有限公司 一种指令处理系统及方法
US9417920B2 (en) 2013-10-04 2016-08-16 Freescale Semiconductor, Inc. Method and apparatus for dynamic resource partition in simultaneous multi-thread microprocessor
CN104636268B (zh) * 2013-11-08 2019-07-26 上海芯豪微电子有限公司 一种可重构缓存产品与方法
US9558120B2 (en) * 2014-03-27 2017-01-31 Intel Corporation Method, apparatus and system to cache sets of tags of an off-die cache memory
US10007522B2 (en) * 2014-05-20 2018-06-26 Nxp Usa, Inc. System and method for selectively allocating entries at a branch target buffer
US10592248B2 (en) 2016-08-30 2020-03-17 Advanced Micro Devices, Inc. Branch target buffer compression
US10713054B2 (en) * 2018-07-09 2020-07-14 Advanced Micro Devices, Inc. Multiple-table branch target buffer
WO2020199058A1 (zh) * 2019-03-30 2020-10-08 华为技术有限公司 分支指令的处理方法、分支预测器及处理器
JP7152376B2 (ja) * 2019-09-27 2022-10-12 日本電気株式会社 分岐予測回路、プロセッサおよび分岐予測方法
US12190114B2 (en) * 2020-12-22 2025-01-07 Intel Corporation Segmented branch target buffer based on branch instruction type
US20220197662A1 (en) * 2020-12-22 2022-06-23 Niranjan Kumar Soundararajan Accessing A Branch Target Buffer Based On Branch Instruction Information
US12086600B2 (en) * 2022-12-05 2024-09-10 Microsoft Technology Licensing, Llc Branch target buffer with shared target bits
US12554402B2 (en) * 2024-05-10 2026-02-17 International Business Machines Corporation Decoding and executing memory command with partial frame data
CN120407025B (zh) * 2025-07-02 2025-10-17 北京翼华云网科技有限公司 一种基于目标地址池的分支目标地址优化存储结构

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US5848433A (en) * 1995-04-12 1998-12-08 Advanced Micro Devices Way prediction unit and a method for operating the same
CN1429361A (zh) * 2000-03-24 2003-07-09 英特尔公司 用于在一个多线程处理器内在多个线程之间划分资源的方法和装置
US6687789B1 (en) * 2000-01-03 2004-02-03 Advanced Micro Devices, Inc. Cache which provides partial tags from non-predicted ways to direct search if way prediction misses
CN101158925A (zh) * 2006-10-04 2008-04-09 国际商业机器公司 用于支持跟踪和标准高速缓存行的同时存储的装置和方法
CN101558388A (zh) * 2006-09-29 2009-10-14 Mips技术公司 数据高速缓存虚拟提示路线预测及其应用

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US5574871A (en) * 1994-01-04 1996-11-12 Intel Corporation Method and apparatus for implementing a set-associative branch target buffer
JPH09311787A (ja) * 1996-05-23 1997-12-02 Toshiba Corp データ処理装置
JPH10340226A (ja) * 1997-06-09 1998-12-22 Nec Corp 連想記憶方式のキャッシュメモリ
US6014732A (en) * 1997-10-22 2000-01-11 Hewlett-Packard Company Cache memory with reduced access time
US6122709A (en) * 1997-12-19 2000-09-19 Sun Microsystems, Inc. Cache with reduced tag information storage
US20040181626A1 (en) * 2003-03-13 2004-09-16 Pickett James K. Partial linearly tagged cache memory system
US7873819B2 (en) 2008-01-03 2011-01-18 Freescale Semiconductor, Inc. Branch target buffer addressing in a data processor
US20090249048A1 (en) * 2008-03-28 2009-10-01 Sergio Schuler Branch target buffer addressing in a data processor

Patent Citations (5)

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Publication number Priority date Publication date Assignee Title
US5848433A (en) * 1995-04-12 1998-12-08 Advanced Micro Devices Way prediction unit and a method for operating the same
US6687789B1 (en) * 2000-01-03 2004-02-03 Advanced Micro Devices, Inc. Cache which provides partial tags from non-predicted ways to direct search if way prediction misses
CN1429361A (zh) * 2000-03-24 2003-07-09 英特尔公司 用于在一个多线程处理器内在多个线程之间划分资源的方法和装置
CN101558388A (zh) * 2006-09-29 2009-10-14 Mips技术公司 数据高速缓存虚拟提示路线预测及其应用
CN101158925A (zh) * 2006-10-04 2008-04-09 国际商业机器公司 用于支持跟踪和标准高速缓存行的同时存储的装置和方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12511241B2 (en) 2019-05-22 2025-12-30 Texas Instruments Incorporated Pseudo-first in, first out (FIFO) tag line replacement

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JP2013004101A (ja) 2013-01-07
JP5933360B2 (ja) 2016-06-08
US20120324209A1 (en) 2012-12-20
US8458447B2 (en) 2013-06-04
CN102841777A (zh) 2012-12-26

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