CN102832121B - Manufacture method of fast recovery diode - Google Patents
Manufacture method of fast recovery diode Download PDFInfo
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- CN102832121B CN102832121B CN201110163951.7A CN201110163951A CN102832121B CN 102832121 B CN102832121 B CN 102832121B CN 201110163951 A CN201110163951 A CN 201110163951A CN 102832121 B CN102832121 B CN 102832121B
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Abstract
The embodiment of the invention discloses a manufacture method of a fast recovery diode, comprising the following steps of: supplying an N+ type substrate and an N- type substrate; externally extending a -N type layer from the front surface of the N+ type substrate as an FS layer; connecting the surface of the FS layer with one surface of the N- substrate through a mode of bonding; thinning the N- type substrate, and forming a P+ type layer and a first metal layer on the surface of the thinned N- type substrate; and thinning the back surface of the N+ type substrate, and forming a second metal layer on the back surface of the thinned N+ type substrate. According the method provided by the embodiment of the invention, fast recovery diodes with different voltage resistance ranges can be manufactured and have a relatively wide application range. For the method, the manufacture cost can be lowered compared with an externally extending process; performances of the fast recovery diode can be improved compared with a diffusion process; and in addition, the probability of producing fragments in the technological process also can be lowered.
Description
Technical field
The present invention relates to semiconductor device fabrication process technical field, more particularly, relate to a kind of fast recovery diode manufacture method.
Background technology
Fast recovery diode (be called for short FRD) a kind ofly has the semiconductor diode that switching characteristic is good, reverse recovery time is short, and it is used in various high-voltage great-current circuit mainly as rectifier diode and fly-wheel diode.FRD apply time its withstand voltage scope between 400V ~ 6500V.
In existing technique, FRD for withstand voltage below 1200V often adopts epitaxy technique to be formed, FRD for withstand voltage more than 1200V often adopts diffusion technology to be formed, this be due to: it is higher that FRD is withstand voltage, on it, lightly doped N-type drift region (is called for short N-layer, in this specification, "+" represents heavy doping, "-" represents light dope, repeat no more later) thickness thicker, FRD for withstand voltage 1200V just needs 80 μm of thick N-layers, if so thick N-layer is formed by epitaxy technology, then concerning epitaxial device and delay N-layer outward quality all reach the limit, therefore, FRD for withstand voltage more than 1200V often adopts diffusion technology to be formed, two kinds of technical processs are specific as follows:
The step adopting epitaxy technique to form FRD comprises: 1, provide N+ substrate; 2, on N+ substrate, carry out first time extension, form N-type layer, described N-type layer is thinner, is used as field and stops (Field Stop, FS) layer; 3, on described FS layer, carry out second time extension, form N-layer; 4, on described N-layer, form P+ layer by steps such as photoetching, etching, injection, annealing, this P+ layer is as the anode of FRD; 5, on described P+ layer, metal level 1 is formed; 6, carry out thinning to the back side of described N+ substrate, and form metal level 2 at its back side, the N+ substrate after thinning is as the negative electrode of FRD.The structural representation of the FRD adopting epitaxy technique to be formed refers to Fig. 1.
The step adopting diffusion technology to form FRD comprises: 1, provide N-substrate; 2, described N-substrate is placed in diffusion furnace its front inherent and the back side all forms N+ layer; 3, the N+ layer of N-substrate face is removed; 4, form P+ layer by steps such as photoetching, etching, injection, annealing in described N-substrate face, this P+ layer is the anode of FRD; 5, on described P+ layer, metal level 3 is formed; 6, on the N+ layer of N-substrate back, form metal level 4, the N+ layer of described N-substrate back is the negative electrode of FRD.The structural representation of the FRD adopting diffusion technology to be formed refers to Fig. 2.
When forming FRD for employing epitaxy technique, extend thicker N-layer outside generally all needing, and N-layer is thicker, cost of manufacture is higher; Thickness for the FRD adopting diffusion technology to be formed, described FRD is general thicker, and this just makes the conduction voltage drop of FRD increase, and finally makes the quiescent dissipation of FRD increase; Further, for the FRD of the FRD of withstand voltage below 1200V and withstand voltage more than 1200V in existing technique, need to adopt epitaxy technique and diffusion technology to be formed respectively, therefore, the manufacture method scope of application of existing technique is narrow.
Summary of the invention
In view of this, the invention provides a kind of fast recovery diode manufacture method, the method cost of manufacture is low, and produced fast recovery diode quiescent dissipation is little, and the method scope of application is wide.
For achieving the above object, the invention provides following technical scheme:
A kind of fast recovery diode manufacture method, the method comprises:
One N+ substrate and a N-substrate are provided;
In front extension one N-type layer of described N+ substrate as FS layer;
A surface of the surface of described FS layer and N-substrate is coupled together by the mode of bonding;
Carry out thinning to described N-substrate, and the surface of N-substrate after thinning form P+ layer and the first metal layer;
Carry out thinning to the back side of described N+ substrate, and the back side of N+ substrate after thinning form the second metal level.
Preferably, in said method, a surface of the surface of described FS layer and N-substrate is coupled together by the mode of bonding, specifically comprises:
Polishing is carried out to the surface of described FS layer;
Polishing is carried out to a surface of N-substrate;
The burnishing surface of the burnishing surface of FS layer and N-substrate is fit together;
Annealing in process is carried out to the structure after above-mentioned laminating.
Preferably, in said method, described annealing in process is carried out to the structure after above-mentioned laminating, specifically comprise: the structure after above-mentioned laminating is placed in the chamber being full of nitrogen and keeps 1 ~ 3 hour.
Preferably, in said method, described in the temperature be full of in the chamber of nitrogen be 1000 DEG C ~ 1200 DEG C.
Preferably, in said method, the surface of the N-substrate after thinning forms P+ layer, specifically comprises:
Described thinning after N-substrate surface formed screen oxide;
In described screen oxide, source region is formed with by photoetching, etching technics;
In described active area, P+ layer is formed by ion implantation technology;
Annealing in process is carried out to described P+ layer.
Preferably, in said method, the ion injected when forming P+ layer is boron ion.
Preferably, in said method, the surface of the N-substrate after thinning also comprises: on described the first metal layer, form passivation layer after forming P+ layer and the first metal layer.
Preferably, in said method, described passivation layer is silicon nitride layer.
Preferably, in said method, the thickness of described FS layer is 5 ~ 10 μm.
Preferably, in said method, described N+ substrate and N-substrate are respectively N+ monocrystalline silicon and N-monocrystalline silicon.
As can be seen from technique scheme, fast recovery diode manufacture method provided by the present invention, in front extension one N-type layer of a N+ substrate as FS layer, described FS layer and another N-substrate are coupled together by the mode of bonding, thus define a thicker overall structure, thinning described N-substrate afterwards, and the N-substrate surface after thinning forms P+ layer and the first metal layer, then thinning N+ substrate, and the N+ substrate surface after thinning forms the second metal level.First, utilize the method can produce the FRD of withstand voltage below 1200V, also can produce the FRD of withstand voltage more than 1200V, therefore, the scope of application is wider; The second, the method only need carry out an epitaxy technique and the epitaxy layer thickness formed is thinner, and therefore, adopting the method to make FRD greatly can reduce cost of manufacture; 3rd, adopt the FRD that makes of the method, compare and adopt diffusion technology in existing technique and the FRD that formed, this FRD is relatively thin, and therefore, its conduction voltage drop is less, and quiescent dissipation is also less; 4th, because the method adopts bonding technology to define a thicker overall structure in manufacturing process, therefore, the problem being easy to because substrate is thinner produce fragment effectively can be avoided.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
The structural representation that Fig. 1 is the FRD that adopts epitaxy technique to be formed in prior art;
The structural representation that Fig. 2 is the FRD that adopts diffusion technology to be formed in prior art;
The schematic flow sheet of a kind of FRD manufacture method that Fig. 3 provides for the embodiment of the present invention;
The cross-sectional view of device in the FRD manufacture process that Fig. 4 ~ Fig. 9 provides for the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Just as described in the background section, for the FRD of the FRD of withstand voltage below 1200V and withstand voltage more than 1200V in existing technique, need to adopt epitaxy technique and diffusion technology to be formed respectively, this not only makes the scope of application narrow, and, for epitaxy technique, need the N-layer that preparation is thicker, thus cost of manufacture is raised, for diffusion technology, the conduction voltage drop of the FRD of final formation is comparatively large, and quiescent dissipation is larger.
Based on this, the invention provides a kind of manufacture method of new fast recovery diode (FRD), the method can overcome the problem adopting epitaxy technique making FRD to cause cost high, can solve again the problem adopting diffusion technology making FRD to cause device performance not good, and the scope of application of the method is wider.The manufacture method of FRD provided by the present invention is described in detail below in conjunction with accompanying drawing.
With reference to the schematic flow sheet of a kind of FRD manufacture method that figure 3, Fig. 3 provides for the embodiment of the present invention, the method specifically comprises the steps:
Step S1: a N+ substrate and a N-substrate are provided.
The not good reason of device performance is caused to be after adopting diffusion technology to form FRD: the FRD formed is thicker, therefore, must prepare thinner FRD; And needing to be formed thicker N-layer when adopting epitaxy technique to manufacture FRD, this just makes cost of manufacture higher.Based on this, inventor abandons traditional handicraft, adopts new method to make FRD.In order to prepare FRD that is thinner, better performances, do not adopt epitaxy technique to form N-layer again, therefore, inventors herein propose and utilize existing N-substrate to serve as the N-layer in FRD, only described N-substrate and field stop layer (Field Stop, FS) layer need be combined just preferably in subsequent technique process.Therefore, with reference to figure 4, in this step, first prepare out two substrates, be respectively heavily doped n type single crystal silicon and lightly doped n type single crystal silicon.
Step S2: in front extension one N-type layer of described N+ substrate as FS layer.
With reference to figure 5, adopt epitaxy technology at the n type single crystal silicon of the front extension layer of described N+ substrate in this step, this n type single crystal silicon serves as FS layer in final formed FRD, described FS layer can effectively end electric field and prevent diode breakdown, store electrons simultaneously, increase the softness of recovery curve, effectively prevent from recovering concussion.
The thinner thickness of described FS layer, generally can be controlled between 5 ~ 10 μm.
Step S3 a: surface of the surface of described FS layer and N-substrate is coupled together by the mode of bonding.
" bonding " is namely at room temperature be pasted together after chemical cleaning and activation processing by two polished silicon slices, again through the high temperature anneal, make bonded interface generation physical-chemical reaction, form the chemical covalent bonds that intensity is very large, thus make two silicon chips be connected to form an entirety.The processing steps such as abrasive disc, polishing and high-temperature process can be born in interface after bonding.
Make described FS layer and N-substrate be coupled together by the mode of " bonding " in this step, this step can comprise again following several step:
Step S31: polishing is carried out to the surface of described FS layer.
Step S32: polishing is carried out to a surface of N-substrate.
Step S33: the burnishing surface of the burnishing surface of FS layer and N-substrate is fit together.
Carry out chemical cleaning to the burnishing surface of described FS layer and the burnishing surface of N-substrate at ambient temperature, fit together by the burnishing surface of the burnishing surface of FS layer and N-substrate afterwards, two silicon chips rely on the intermolecular force of short distance to be pulled together.
Step S34: annealing in process is carried out to the structure after above-mentioned laminating.
The structure fit together in step S33 be placed in the chamber being full of nitrogen and keep 1 ~ 3 hour, make the burnishing surface of FS layer and the burnishing surface generation bonding of N-substrate, thus form an overall structure, this overall structure schematic diagram as shown in Figure 6.The described temperature be full of in the chamber of nitrogen is 1000 DEG C ~ 1200 DEG C.
Step S4: carry out thinning to described N-substrate, and the surface of N-substrate after thinning forms P+ layer and the first metal layer.
Start thinning from the one side that described N-substrate is exposed, the structural representation after thinning as shown in Figure 7.Because N-substrate exists as Withstand voltage layer in FRD device, therefore the thickness of thinning rear residue N-substrate is determined by the withstand voltage situation of made FRD, if prepared FRD needs to bear higher voltage, then need to make thinning after N-substrate thicker, otherwise, described N-substrate can be made thinner.
To N-substrate carry out thinning after, then form P+ layer at described N-substrate surface, the specific embodiment forming described P+ layer is as follows:
Step S41: described thinning after N-substrate surface formed screen oxide.
Described screen oxide is formed by the mode of thermal oxide growth, and the effect of described screen oxide has: one, protect N-substrate surface from contamination; Two, avoid causing excessive damage to N-substrate in follow-up injection process; Three, as oxide screen, the injection degree of depth controlling impurity in follow-up injection process is contributed to.
Step S42: be formed with source region by photoetching, etching technics in described screen oxide.
First spin coating photoresist layer in described screen oxide; Then adopt corresponding mask plate (having the mask plate of active area pattern) to expose described photoresist layer, develop afterwards, described screen oxide is formed the photoresist layer with active area pattern; Then there is the photoresist layer of active area pattern for mask with described, adopt etching technics to be formed with source region in described screen oxide, that is: etched away partly shielding effect oxide layer, the position of the screen oxide etched away and corresponding active area.There is described in finally removing the photoresist layer of active area pattern.
Step S43: form P+ layer by ion implantation technology in described active area.
In described active area, inject boron ion by ion implantation technology, thus in active area, define P+ layer, with reference to figure 8, described P+ layer in FRD device as anode.It should be noted that, the cross-sectional view that figures only show the device of position, corresponding active area provided by the present invention, does not show in the drawings for the structure corresponding to the region outside active area.
Step S44: annealing in process is carried out to described P+ layer.
Under high temperature (1000 DEG C ~ 1200 DEG C) condition, carry out annealing in process to described P+ layer, annealing can repair lattice defect on the one hand, foreign atom can also be made to move to lattice-site on the other hand, be activated.
With reference to figure 8, after P+ layer is formed, then layer of oxide layer (not shown) is formed on its surface, then punch in described oxide layer, the subregion of the corresponding P+ layer in position in hole, finally in described oxide layer, form the first metal layer 5, described the first metal layer 5 will fill the hole of full oxide layer inside, thus described P+ layer is connected with the first metal layer 5.
Step S5: form passivation layer on described the first metal layer.
In order to prevent described the first metal layer oxidized, therefore form passivation layer on described the first metal layer, passivation layer described in the present embodiment is silicon nitride layer.
Step S6: carry out thinning to the back side of described N+ substrate, and the back side of N+ substrate after thinning forms the second metal level.
The substrate of N+ described in the embodiment of the present invention is intended for the negative electrode of FRD.Because described N+ substrate is thicker, therefore need first to carry out thinning to it, metalized can be carried out to it after thinning, with reference to figure 9, form the second metal level 6 at described N+ substrate back.
Known by describing above, FRD manufacture method provided by the present invention, adopt existing N-substrate as the Withstand voltage layer in FRD device, adopt existing N+ substrate as the negative electrode of FRD device, by in described N+ substrate face extension one N-type layer as FS layer, then (this structure comprises N+ substrate to make described FS layer and N-substrate connect into an overall structure in the mode of bonding, FS layer and N-substrate), finally make P+ layer (anode as FRD) and the first metal layer at this integrally-built front (N-substrate surface), the second metal level is made on this integrally-built back side (N+ substrate back or surface).The method not only can be used to the FRD making withstand voltage below 1200V, and also can be used for making the FRD of withstand voltage more than 1200V, therefore, the scope of application is wider; Further, owing to only having carried out an epitaxy technique in the method, and the N-type epitaxy layer formed is as FS layer, therefore this layer is thinner, therefore, can reduce cost of manufacture; 3rd, the FRD adopting the method to make, compare the FRD adopting diffusion technology to be formed thin, therefore the conduction voltage drop of resulting devices is little, quiescent dissipation is also little; 4th, when adopting the method to make FRD, make N+ substrate and N-substrate with FS layer connect into an overall structure by the mode of bonding, this overall structure is thicker, therefore effectively can avoid the problem being easy to generation fragment because substrate is thinner.
It should be noted that, in this article, the such as relational terms of first and second grades and so on is only used for an entity or operation to separate with another entity or operating space, and not necessarily requires or imply the relation that there is any this reality between these entities or operation or sequentially.And, term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thus make to comprise the process of a series of key element, method, article or equipment and not only comprise those key elements, but also comprise other key elements clearly do not listed, or also comprise by the intrinsic key element of this process, method, article or equipment.When not more restrictions, the key element limited by statement " comprising ... ", and be not precluded within process, method, article or the equipment comprising described key element and also there is other identical element.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (10)
1. a fast recovery diode manufacture method, is characterized in that, comprising:
One N+ substrate and a N-substrate are provided;
Adopt epitaxy technology in front extension one N-type layer of described N+ substrate as FS layer;
A surface of the surface of described FS layer and N-substrate is coupled together by the mode of bonding;
Carry out thinning to described N-substrate, and the surface of N-substrate after thinning form P+ layer and the first metal layer;
Carry out thinning to the back side of described N+ substrate, and the back side of N+ substrate after thinning form the second metal level.
2. method according to claim 1, is characterized in that, a surface of the surface of described FS layer and N-substrate is coupled together by the mode of bonding, specifically comprises:
Polishing is carried out to the surface of described FS layer;
Polishing is carried out to a surface of N-substrate;
The burnishing surface of the burnishing surface of FS layer and N-substrate is fit together;
Annealing in process is carried out to the structure after above-mentioned laminating.
3. method according to claim 2, is characterized in that, describedly carries out annealing in process to the structure after above-mentioned laminating, specifically comprises:
Structure after above-mentioned laminating is placed in the chamber being full of nitrogen and keeps 1 ~ 3 hour.
4. method according to claim 3, is characterized in that, described in the temperature be full of in the chamber of nitrogen be 1000 DEG C ~ 1200 DEG C.
5. method according to claim 1, is characterized in that, the surface of the N-substrate after thinning forms P+ layer, specifically comprises:
Described thinning after N-substrate surface formed screen oxide;
In described screen oxide, source region is formed with by photoetching, etching technics;
In described active area, P+ layer is formed by ion implantation technology;
Annealing in process is carried out to described P+ layer.
6. method according to claim 5, is characterized in that, the ion injected when forming P+ layer is boron ion.
7. method according to claim 1, is characterized in that, the surface of the N-substrate after thinning also comprises after forming P+ layer and the first metal layer:
Described the first metal layer forms passivation layer.
8. method according to claim 7, is characterized in that, described passivation layer is silicon nitride layer.
9. the method according to any one of claim 1 ~ 8, is characterized in that, the thickness of described FS layer is 5 ~ 10 μm.
10. the method according to any one of claim 1 ~ 8, is characterized in that, described N+ substrate and N-substrate are respectively N+ monocrystalline silicon and N-monocrystalline silicon.
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| CN103578978B (en) * | 2013-10-17 | 2016-05-18 | 北京时代民芯科技有限公司 | A kind of high pressure fast recovery diode manufacture method based on Bonded on Silicon Substrates material |
| CN104332503B (en) * | 2014-10-16 | 2019-01-25 | 桑德斯微电子器件（南京）有限公司 | A kind of high-voltage fast recovery chip production process |
| CN104538301A (en) * | 2015-01-21 | 2015-04-22 | 安徽安芯电子科技有限公司 | Method for manufacturing rectifier chip and rectifier chip |
| CN106711232A (en) * | 2015-11-16 | 2017-05-24 | 上海联星电子有限公司 | Fast recovery diode (FRD) and manufacturing method thereof |
| CN105977154B (en) * | 2016-06-06 | 2019-04-02 | 北京时代民芯科技有限公司 | One kind having double-buffering layer fast recovery diode chip manufacturing method based on diffusion technique |
| CN108074809B (en) * | 2017-11-09 | 2020-11-06 | 江苏捷捷微电子股份有限公司 | Manufacturing method of fast soft recovery diode chip |
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| JPWO2011024214A1 (en) * | 2009-08-25 | 2013-01-24 | パナソニック株式会社 | Fast recovery diode |
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| US6388306B1 (en) * | 2000-01-28 | 2002-05-14 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device with rapid reverse recovery characteristic |
| CN1441968A (en) * | 2000-06-26 | 2003-09-10 | 快捷半导体有限公司 | Soft recovery power diode and related method |
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Inventor after: Tian Xiaoli Inventor after: Wu Zhenxing Inventor after: Sun Baogang Inventor after: Zhu Yangjun Inventor after: Zhao Jia Inventor after: Lu Shuojin Inventor before: Wu Zhenxing Inventor before: Sun Baogang Inventor before: Zhu Yangjun Inventor before: Zhao Jia Inventor before: Lu Shuojin |
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Free format text: CORRECT: INVENTOR; FROM: WU ZHENXING SUN BAOGANG ZHU YANGJUN ZHAO JIA LU SHUOJIN TO: TIAN XIAOLI WUZHENXING SUN BAOGANG ZHU YANGJUN ZHAO JIA LU SHUOJIN |