CN102820010B - Electrical level shifter and voltage-boosting drive circuit - Google Patents
Electrical level shifter and voltage-boosting drive circuit Download PDFInfo
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- CN102820010B CN102820010B CN201110168399.0A CN201110168399A CN102820010B CN 102820010 B CN102820010 B CN 102820010B CN 201110168399 A CN201110168399 A CN 201110168399A CN 102820010 B CN102820010 B CN 102820010B
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Abstract
The invention relates to an electrical level shifter and a relevant voltage-boosting drive circuit. The electrical level shifter comprises an input stage and an output stage, wherein the input stage is provided with an input stage switch which is used for receiving an input signal, the switch is turned on selectively according to the input signal, and the output stage is in series connection with the input stage and is used for outputting a gate drive signal. When the input stage switch is turned on, the gate drive signal is in a low logic level, and when the input stage switch is turned off, the gate drive signal is in a high logic level. Logic levels of the input signal and the gate drive signal are the same.
Description
Technical field
The present invention is about a kind of level shifter, espespecially a kind of have avoid opening by mistake the level shifter that opens power switch function.
Background technology
In LCD TV screen, the operating voltage of image converter (scaler), for considering of power saving and saving chip area, generally uses a lower operating voltage, is for example 3.3V.But, (back light) backlight light source of LCD TV screen, it may be light emitting diode (light-emitting diode, or cold-cathode fluorescence lamp (cold-cathode fluorescent lamp LED), CCFL), its operating voltage may be up to 40V.Therefore, just need to there is power supply changeover device (power converter), an operating power is transformed into another operating power.
A kind of power supply changeover device widely using is switch type power supplying device (switched-mode power supply, SMPS), because having outstanding conversion efficiency (power conversion efficiency).As shown in its name, SMPS has a power switch more, in order to control the energy storage of the Inductive component of flowing through or to release energy, to reach the object of converting electrical energy.
Just, this power switch need to bear quite high voltage mostly, therefore, and often also suitable height of the critical voltage of the control gate of power switch.With the signal that image converter was produced of operating power 3.3V power supply, its ceiling voltage may only have 3.3V, and is not enough to drive the control gate of general power switch.Therefore, need a level shifter (level shifter) or one drive circuit (driver), image converter is exported, belong to the driving signal of 3.3V system, the grid that are displaced to the electrical voltage system that a voltage is higher drive signal, use and drive a power switch.
Design when level shifter, need to be considered power supply order (power-on sequence), also need to consider can not wrong unlatching one power switch situation.If a power switch is opened by mistake and opened in power supply order process, may cause an Inductive component saturated, and cause danger.
Summary of the invention
The embodiment of the present invention discloses a kind of level shifter, includes a grounded base amplifier and a current amplifier.This grounded base amplifier has one first pair of junction transistor.This first pair of junction transistor has a base stage and is coupled to one first predeterminated voltage, and an emitter-base bandgap grading receives an input signal, and a collector is coupled to one first voltage source.This current amplifier is by this first voltage fed, have an input end and be coupled to this collector of this first pair of junction transistor, and an output terminal drives signal in order to export grid.This first predeterminated voltage is produced by this first voltage fed; And this input signal produces by a second voltage source power supply, compared to this first voltage source, this second voltage source is a low-voltage source.
The embodiment of the present invention discloses a kind of level shifter, includes an input stage and an output stage.This input stage has an input stage switch for receiving an input signal.This switch is optionally opened according to this input signal.This output stage is serially connected with this input stage, drives signal for output one grid.When this input stage switch is opened, these grid drive signal in a low logic level; When this input stage switch is closed, these grid drive signal in a high logic level.This input signal drives the logic level of signal consistent with these grid.
The embodiment of the present invention discloses a kind of booster driving circuit, includes one first voltage source, a linear voltage decreasing device, an image converter, a level shifter and a boost converter.This linear voltage decreasing device receives this first voltage source to produce a second voltage source.Compared to this first voltage source, this second voltage source is a low-voltage source.This image converter receives this second voltage source, includes a grid pre-driver.This grid pre-driver provides an input signal.This level shifter is coupled to this grid pre-driver, includes an input stage and an output stage.This input stage receives this input signal.This output stage is serially connected with this input stage, drives signal for output one grid.This input stage and this output stage are accepted respectively multiple fixed reference potential.The plurality of fixed reference potential is produced by this first voltage fed.This input signal is produced by this second voltage source power supply.In the time that the voltage of this first voltage source is increased to a default operating voltage, this input signal drives the logic level of signal consistent with these grid.This boost converter includes a power switch.This power switch is coupled to this level shifter, drives signal and exports a driving voltage in order to receive these grid.
Brief description of the drawings
Fig. 1 is the skeleton view of a display.
Fig. 2 shows the level shifter of Fig. 1.
Primary clustering symbol description
10 boost converters
13 linear voltage decreasing devices
14 level shifters
15 power switchs
16 grid pre-drivers
18 pulse width modulation controllers
20 image converters
62 input stages
64 output stages
The two junction transistors of BBPNP
The two junction transistors of BF PNP
The two junction transistors of BTNPN
GATE control gate
N1 contact
NC contact
OUT output terminal
R1 resistance
SDRV drives signal
SGATE drives signal
SP1, SPB, SPU signal path
VCC voltage source
VIN voltage source
Z Zener diode
Embodiment
Fig. 1 has shown according to the present invention and has implemented, and is applicable to the circuit of a LCD screen.Input voltage source VIN, is for example 12V, as the primary power (major voltage source) of whole circuit.Boost converter (booster) 10, on output terminal OUT, provides a higher voltage source, as driving voltage backlight.For example its voltage is 40V, in order to drive several LED serials (LED chains).Linear voltage decreasing device (low drop-out, LDO) 13, the voltage source V CC of generation one 3.3V, power supply is to image converter 20.Power supply order is considered, after being generally designed to voltage source V IN and being approximately ready for, for example the voltage of voltage source V IN is high to very having approached 12V, linear voltage decreasing device 13 just starts to make the voltage of voltage source V CC to rise, gradually draw and lift 3.3V from 0V, just drive image converter 20 to start working.
Image converter 20 can form with single-chip (monolithic chip), it has a pulse width modulation (pulse-width modulation, PWM) controller 18, in order to control the work period (duty ratio) of the power switch 15 in boost converter 10.In pulse width modulation controller 18, have a grid pre-driver (gate pre-driver) 16, the driving signal SDRV of its generation, is produced by voltage source V CC power supply station, belongs to the 3.3V system that voltage source V CC determines.In other words, drive the logic level of signal SDRV, will be between 0V between 3.3V.For instance, driving the low logic level of signal SDRV can be approximately 0V, and high logic level can be approximately 3.3V.
Level shifter 14 is coupled between grid pre-driver (gate pre-driver) 16 and power switch 15, in order to the control gate GATE of driving power switch 15, receive the driving signal SDRV that belongs to 3.3V system simultaneously, produce the grid driving signal SGATE that belongs to 12V system.For instance, it can be approximately 0V that grid drive the low logic level of signal SGATE, and high logic level can be approximately 11V.
Fig. 2 is the detailed circuit diagram of Fig. 1 level shifter 14.Level shifter 14 has input stage (input stage) 62 and output stage (output stage) 64, can form with separate type assembly (discrete device) assembling.From Fig. 2, can learn, except the driving signal SDRV as an input signal belongs to 3.3V system, the interior all signals of level shifter 14, no matter be reference voltage or import and export signal, be all to be produced by the voltage source V IN power supply of 12V, and be independent of the voltage source V CC of 3.3V in Fig. 1.Such benefit is: drive the voltage source V CC of signal SDRV not also to be ready for although power supply is given, namely its voltage is not yet increased to and approaches 3.3V, as long as voltage source V IN is stable, level shifter 14 is also just thereupon stable, prepares to drive signal SGATE according to driving signal SDRV to produce corresponding grid.
Input stage 62 is a grounded base amplifier (common-base amplifier).Input stage 62 comprises two junction transistor (bipolar-junction transistor, the BJT) BF of a PNP as input stage switch, and its emitter-base bandgap grading receives and drives signal SDRV.In the time that voltage source V IN stablizes, the voltage of contact N1 is set or provided to the strangulation voltage of Zener diode Z (clamping voltage), so also approximately determined the voltage of two junction transistor BF ground levels.The collector of two junction transistor BF, namely contact NC, sees through resistance R 1 and is couple to the voltage source V IN of 12V.In the time driving signal SDRV in a low logic level, such as when 0V, open (turn on) and operate in state of saturation as two junction transistor BF of switch, so contact NC can, at a very low voltage, be for example 0.2V.In the time driving signal SDRV in a high logic level, while being for example 3.3V, two junction transistor BF operate in closed condition, so contact NC is moved to a very high voltage by resistance R 1, may approach the voltage 12V of voltage source V IN.Therefore, the signal on contact NC has belonged to the 12V system that voltage source V IN determines.
As shown in Figure 2, output stage 64 is the plug-type grade follower (push-pull emitter follower) of penetrating.The two junction transistor BT of NPN are connected with the base stage of the two junction transistor BB of PNP, as an input end, are connected to contact NC.Two junction transistor BT are connected with the emitter-base bandgap grading of two junction transistor BB, and as an output terminal, output grid drive signal SGATE.The collector of two junction transistor BT is couple to voltage source V IN; The collector of two junction transistor BT is couple to ground wire.Grid drive the level of signal SGATE, will approximately follow (follow) contact NC level variation and change.So grid drive signal SGATE to belong to 12V system.Output stage 64 can amplify from contact NC to come and the electric current of input, produces amplified current, is exported by the emitter-base bandgap grading of two junction transistor BT or two junction transistor BB.Therefore output stage 64 can be considered as a current amplifier.
Can be known by inference by above analysis, in the time that voltage source V IN is ready for, the logic level of grid driving signal SGATE and driving signal SDRV can be consistent.For instance, when driving signal SDRV in logic " 0 " time, its magnitude of voltage is a low logic level (0V), grid drive the level of signal SGATE can, at another low logic level (0V), be in logic also " 0 ".When driving signal SDRV in a high logic level (3.3V), be in logic " 1 ", grid drive the level of signal SGATE can, another high logic level (may be 11V), be in logic also " and 1 ".
In one embodiment, one drive circuit only has an input stage and an output stage haply.On each signal path in every one-level, only has a driving component.For example, only have the two junction transistor BF of driving component on the signal path SP1 of the input stage 62 in Fig. 2, output stage 64 is having two signal path SPB and SPU, and two junction transistor BT are crossed in a meeting, and another can be through two junction transistor BB.In another embodiment, one drive circuit can have at least one buffer stage, is arranged between an input stage and an output stage.Follow considering of component count cost based on reducing signal delay, it is reasonable only having an input stage and an output stage.
Even if voltage source V IN is also unstable, as long as the voltage of voltage source V IN exceedes the strangulation voltage (as a default operating voltage) of Zener diode Z, Zener diode Z will be approximately by the ground level voltage stabilization of two junction transistor BF at a fixed voltage, guarantee that two junction transistor BF operate in state of saturation at the very start, and make contact NC maintain a lower voltage.So in power supply order process, contact NC will maintain a low voltage at the beginning always.This phenomenon can last till that voltage source V CC is ready for the electrical level rising of rear drive signal SDRV, and the voltage of contact NC just may be drawn high.
Level shifter 14 has following advantage:
1. can, in power supply order, not produce misoperation.The single voltage source V IN power supply of 14 needs of level shifter, produces any reference voltage or working point wherein.As previously mentioned, as long as the voltage of voltage source V IN exceedes the strangulation voltage of Zener diode Z, Zener diode Z will be by the ground level voltage stabilization of two junction transistor BF at a fixed voltage, guarantee that two junction transistor BF operate in state of saturation at the very start, and make contact NC maintain a lower voltage.If the 3.3V of voltage source V CC is not also ready for, drive the voltage of signal SDRV will approach very much 0V.Now, if the 12V of voltage source V IN is ready for, level shifter 14 is normal work just, and the logic level of the grid that it produces driving signal SGATE can be the same with driving signal SDRV, a namely low-voltage, is approximately grid and drives the low logic level of signal SGATE.Therefore, grid driving signal SGATE can be mistakenly in high logic level.
2. component count is few.As shown in Figure 2, only need to there be three BJT, a Zener diode and several resistance.The few awareness of defecation taste person low cost of component count.
3. operating speed is fast.Two junction transistor BF of input stage 62 are NPN, and its speed is generally higher than the two junction transistors of PNP.Output stage 64 is also the plug-type grade follower of penetrating of a high speed.So the operating speed of level shifter 14, more than can reaching 500kHz in theory.
Although the present invention is taking the circuit of LCD screen as example, the present invention goes for other application.As long as a signal that belongs to low voltage system being changed into a driving circuit that belongs to the driving signal of higher pressure system, can apply the present invention.
The foregoing is only preferred embodiment of the present invention, all equalizations of doing according to the present patent application the scope of the claims change and modify, and all should belong to covering scope of the present invention.
Claims (3)
1. a level shifter, includes:
One grounded base amplifier, has one first pair of junction transistor, and this first pair of junction transistor has a base stage and be coupled to one first predeterminated voltage, and an emitter-base bandgap grading receives an input signal, and a collector is coupled to one first voltage source; And
One current amplifier, by this first voltage fed, this current amplifier has an input end and is coupled to this collector of this first pair of junction transistor, and an output terminal drives signal in order to export grid;
Wherein, this first predeterminated voltage is produced by this first voltage fed; And this input signal produces by a second voltage source power supply, compared to this first voltage source, this second voltage source is a low-voltage source,
Wherein, this current amplifier includes one first and penetrates a grade follower, has one second pair of junction transistor, this second pair of junction transistor has a collector and is coupled to this first voltage source, one base stage is coupled to this collector of this first pair of junction transistor, and an emitter-base bandgap grading is exported this grid driving signal
Wherein, this current amplifier includes:
One second penetrates a grade follower, has one the 3rd pair of junction transistor, and the 3rd pair of junction transistor has a base stage and be couple to this collector of this first pair of junction transistor, and a collector is couple to a ground wire, and an emitter-base bandgap grading drives signal in order to export this grid.
2. level shifter as claimed in claim 1, it is characterized in that, in the time that this input signal is positioned at a low logic level, this first pair of junction transistor operates in a state of saturation, in the time that this input signal is positioned at a high logic level, this first pair of junction transistor operates in a closed condition.
3. level shifter as claimed in claim 1, is characterized in that, this grounded base amplifier includes a Zener diode, in order to this first predeterminated voltage to be provided.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110168399.0A CN102820010B (en) | 2011-06-10 | 2011-06-10 | Electrical level shifter and voltage-boosting drive circuit |
| CN201310676358.1A CN103646635B (en) | 2011-06-10 | 2011-06-10 | Level shifter and booster driving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110168399.0A CN102820010B (en) | 2011-06-10 | 2011-06-10 | Electrical level shifter and voltage-boosting drive circuit |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310676358.1A Division CN103646635B (en) | 2011-06-10 | 2011-06-10 | Level shifter and booster driving circuit |
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| Publication Number | Publication Date |
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| CN102820010A CN102820010A (en) | 2012-12-12 |
| CN102820010B true CN102820010B (en) | 2014-09-03 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201310676358.1A Active CN103646635B (en) | 2011-06-10 | 2011-06-10 | Level shifter and booster driving circuit |
| CN201110168399.0A Active CN102820010B (en) | 2011-06-10 | 2011-06-10 | Electrical level shifter and voltage-boosting drive circuit |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN201310676358.1A Active CN103646635B (en) | 2011-06-10 | 2011-06-10 | Level shifter and booster driving circuit |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106023941B (en) * | 2016-07-29 | 2018-05-01 | 京东方科技集团股份有限公司 | Level shifter and its driving method, gate driving circuit and display device |
| CN106125814B (en) * | 2016-08-17 | 2017-11-17 | 珠海格力节能环保制冷技术研究中心有限公司 | Signaling conversion circuit, control circuit and DC brushless motor |
| CN107707245B (en) * | 2017-09-25 | 2020-11-27 | 京东方科技集团股份有限公司 | Level shift circuit, display device driving circuit, and display device |
| US10795392B1 (en) * | 2019-04-16 | 2020-10-06 | Novatek Microelectronics Corp. | Output stage circuit and related voltage regulator |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1674441A (en) * | 2004-03-23 | 2005-09-28 | 联咏科技股份有限公司 | Source electrode drive circuit, latch voltage bit quasi converter and high voltage positive and negative device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4409453A1 (en) * | 1994-03-18 | 1995-09-21 | Thomson Brandt Gmbh | BiCMOS level converter ECL-CMOS |
| JP4147480B2 (en) * | 2003-07-07 | 2008-09-10 | ソニー株式会社 | Data transfer circuit and flat display device |
| KR101064186B1 (en) * | 2005-08-10 | 2011-09-14 | 삼성전자주식회사 | Level shifter, and display device having the same |
| KR101058865B1 (en) * | 2008-12-24 | 2011-08-23 | 포항공과대학교 산학협력단 | Single-Supply Voltage Pass Gate-Level Translator for Multiple-Supply Voltage Systems |
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- 2011-06-10 CN CN201310676358.1A patent/CN103646635B/en active Active
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1674441A (en) * | 2004-03-23 | 2005-09-28 | 联咏科技股份有限公司 | Source electrode drive circuit, latch voltage bit quasi converter and high voltage positive and negative device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102820010A (en) | 2012-12-12 |
| CN103646635B (en) | 2016-04-06 |
| CN103646635A (en) | 2014-03-19 |
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Effective date of registration: 20201027 Address after: No. 1, Xingzhu Road, Hsinchu Science Park, Taiwan, China Patentee after: MEDIATEK Inc. Address before: 518057, Guangdong, Shenzhen hi tech Zone, South District, science and technology, South ten road, Shenzhen Institute of Aerospace Science and technology innovation, C block, building 4 Patentee before: Mstar Semiconductor,Inc. Patentee before: MEDIATEK Inc. Effective date of registration: 20201027 Address after: 4 / F, block C, Shenzhen Aerospace Science and Technology Innovation Research Institute, science and technology south 10th Road, South District, Shenzhen high tech Zone, Guangdong Province Patentee after: Mstar Semiconductor,Inc. Patentee after: MEDIATEK Inc. Address before: 518057, Guangdong, Shenzhen hi tech Zone, South District, science and technology, South ten road, Shenzhen Institute of Aerospace Science and technology innovation, C block, building 4 Patentee before: Mstar Semiconductor,Inc. Patentee before: MSTAR SEMICONDUCTOR Inc. |
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