CN103646635B - Level shifter and booster driving circuit - Google Patents
Level shifter and booster driving circuit Download PDFInfo
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- CN103646635B CN103646635B CN201310676358.1A CN201310676358A CN103646635B CN 103646635 B CN103646635 B CN 103646635B CN 201310676358 A CN201310676358 A CN 201310676358A CN 103646635 B CN103646635 B CN 103646635B
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Abstract
The present invention relates to level shifter and relevant booster driving circuit.The level shifter disclosed includes an input stage and an output stage.This input stage has an input stage switch for reception one input signal.This switch is optionally opened according to this input signal.This output stage is serially connected with this input stage, for output one grid drive singal.When this input stage switch is opened, this grid drive singal is in a low logic level; When this input stage switch is closed, this grid drive singal is in a high logic level.This input signal is consistent with the logic level of this grid drive singal.
Description
The application is the applying date is on June 10th, 2011, application number is " 201110168399.0 ", is entitled as the divisional application of " level shifter and booster driving circuit ".
Technical field
The present invention is about a kind of level shifter, and espespecially a kind of have the level shifter avoided opening by mistake and open power switch function.
Background technology
In LCD TV screen, the operating voltage of image converter (scaler), in order to considering of power saving and saving chip area, generally using a lower operating voltage, is for example 3.3V.But, backlight (backlight) light source of LCD TV screen, it may be light emitting diode (light-emittingdiode, or cold-cathode fluorescence lamp (cold-cathodefluorescentlamp LED), CCFL), its operating voltage may need up to 40V.Therefore, just need power supply changeover device (powerconverter), an operating power is transformed into another operating power.
A kind of power supply changeover device widely used is switch type power supplying device (switched-modepowersupply, SMPS), because having outstanding conversion efficiency (powerconversionefficiency).As the name suggests, SMPS has a power switch more, in order to control flow check through the energy storage of an Inductive component or release can, to reach the object of converting electrical energy.
Just, this power switch needs to bear quite high voltage mostly, therefore, and the height that the critical voltage of the control gate of power switch is often also suitable.The signal that the image converter of powering with operating power 3.3V produces, its ceiling voltage may only have 3.3V, and is not enough to the control gate driving general power switch.Therefore, need a level shifter (levelshifter) or one drive circuit (driver), image converter is exported, belongs to the drive singal of 3.3V system, be displaced to the grid drive singal of the higher electrical voltage system of a voltage, use driving one power switch.
During design level shifter, need to consider power supply order (power-onsequence), also needing to consider can not the situation of wrong unlatching one power switch.If a power switch is opened in power supply order process by mistake, an Inductive component may be caused saturated, and cause danger.
Summary of the invention
The embodiment of the present invention discloses a kind of level shifter, includes stage amplifier and a current amplifier altogether.This grounded base amplifier has one first pair of junction transistor.This first pair of junction transistor has a base stage and is coupled to one first predeterminated voltage, and an emitter-base bandgap grading receives an input signal, and a collector is coupled to one first voltage source.This current amplifier, by this first voltage fed, has this collector that an input end is coupled to this first pair of junction transistor, and an output terminal is in order to export a grid drive singal.This first predeterminated voltage is produced by this first voltage fed; And this input signal is produced by one second voltage fed, compared to this first voltage source, this second voltage source is a low-voltage source.
The embodiment of the present invention discloses a kind of level shifter, includes an input stage and an output stage.This input stage has an input stage switch for reception one input signal.This switch is optionally opened according to this input signal.This output stage is serially connected with this input stage, for output one grid drive singal.When this input stage switch is opened, this grid drive singal is in a low logic level; When this input stage switch is closed, this grid drive singal is in a high logic level.This input signal is consistent with the logic level of this grid drive singal.
The embodiment of the present invention discloses a kind of booster driving circuit, includes one first voltage source, a linear voltage decreasing device, an image converter, a level shifter and a boost converter.This linear voltage decreasing device receives this first voltage source to produce one second voltage source.Compared to this first voltage source, this second voltage source is a low-voltage source.This image converter receives this second voltage source, includes a grid pre-driver.This grid pre-driver provides an input signal.This level shifter is coupled to this grid pre-driver, includes an input stage and an output stage.This input stage receives this input signal.This output stage is serially connected with this input stage, for output one grid drive singal.This input stage and this output stage accept multiple fixed reference potential respectively.The plurality of fixed reference potential is produced by this first voltage fed.This input signal is produced by this second voltage fed.When the voltage of this first voltage source is increased to a default operating voltage, this input signal is consistent with the logic level of this grid drive singal.This boost converter includes a power switch.This power switch is coupled to this level shifter, in order to receive this grid drive singal and to export a driving voltage.
Accompanying drawing explanation
Fig. 1 is the skeleton view of a display.
Fig. 2 shows the level shifter of Fig. 1.
Primary clustering symbol description
10 boost converters
13 linear voltage decreasing devices
14 level shifters
15 power switchs
16 grid pre-drivers
18 pulse width modulation controllers
20 image converters
62 input stages
64 output stages
The two junction transistor of BBPNP
The two junction transistor of BFPNP
The two junction transistor of BTNPN
GATE control gate
N1 contact
NC contact
OUT output terminal
R1 resistance
SDRV drive singal
SGATE drive singal
SP1, SPB, SPU signal path
VCC voltage source
VIN voltage source
Z Zener diode
Embodiment
Fig. 1 shows and implemented according to the present invention, is applicable to the circuit of a LCD screen.Input voltage source VIN is for example 12V, as the primary power (majorvoltagesource) of whole circuit.Boost converter (booster) 10, on output terminal OUT, provides the voltage source that is higher, as the driving voltage of backlight.For example its voltage is 40V, in order to drive several LED strip row (LEDchains).Linear voltage decreasing device (lowdrop-out, LDO) 13, produces the voltage source V CC of a 3.3V, powers to image converter 20.Power supply order is considered, generally be designed to after voltage source V IN is approximately ready for, for example the voltage of voltage source V IN is high to closely 12V, linear voltage decreasing device 13 just starts the voltage rise making voltage source V CC, gradually, after drawing and lifting 3.3V from 0V, image converter 20 is just driven to start working.
Image converter 20 can be formed with single-chip (monolithicchip), it has a pulse width modulation (pulse-widthmodulation, PWM) controller 18, in order to control the work period (dutyratio) of the power switch 15 in boost converter 10.There is a grid pre-driver (gatepre-driver) 16 in pulse width modulation controller 18, its drive singal SDRV produced, produced by voltage source V CC power supply station, belong to the 3.3V system that voltage source V CC determines.In other words, the logic level of drive singal SDRV, will between 0V to 3.3V.For example, the low logic level of drive singal SDRV can be about 0V, and high logic level can be about 3.3V.
Level shifter 14 is coupled between grid pre-driver (gatepre-driver) 16 and power switch 15, in order to the control gate GATE of driving power switch 15, receive the drive singal SDRV belonging to 3.3V system simultaneously, produce the grid drive singal SGATE belonging to 12V system.For example, the low logic level of grid drive singal SGATE can be about 0V, and high logic level can be about 11V.
Fig. 2 is the detailed circuit diagram of Fig. 1 level shifter 14.Level shifter 14 has input stage (inputstage) 62 and output stage (outputstage) 64, can form with separate type assembly (discretedevice) assembling.Can learn from Fig. 2, except belonging to except 3.3V system as the drive singal SDRV of an input signal, signals all in level shifter 14, no matter be reference voltage or import and export signal, all to be powered generation by the voltage source V IN of 12V, and independent of the voltage source V CC of 3.3V in Fig. 1.Such benefit is: although power supply may be also ready for the voltage source V CC of drive singal SDRV, namely its voltage is not yet increased to close to 3.3V, as long as voltage source V IN stablizes, level shifter 14 is also just stablized thereupon, prepares to produce corresponding grid drive singal SGATE according to drive singal SDRV.
Input stage 62 is for having stage amplifier (common-baseamplifier) altogether.Input stage 62 comprises one as two junction transistor (bipolar-junctiontransistor, the BJT) BF of PNP of input stage switch, and its emitter-base bandgap grading receives drive singal SDRV.When voltage source V IN stablizes, the clamp voltage (clampingvoltage) of Zener diode Z sets or provides the voltage of contact N1, so also approximately determine the voltage of two junction transistor BF ground level.The collector of two junction transistor BF, namely contact NC, be couple to the voltage source V IN of 12V through resistance R1.When drive singal SDRV is in a low logic level, such as during 0V, the two junction transistor BF as switch open (turnon) and operate in state of saturation, so contact NC can, at a very low voltage, be for example 0.2V.When drive singal SDRV is in a high logic level, when being for example 3.3V, two junction transistor BF operates in closed condition, so contact NC is moved to a very high voltage by resistance R1, may be close to the voltage 12V of voltage source V IN.Therefore, the signal on contact NC has belonged to the 12V system that voltage source V IN determines.
As shown in Figure 2, output stage 64 is one plug-typely penetrate a grade follower (push-pullemitterfollower).The base stage of two both the junction transistor BB of two junction transistor BT and the PNP of NPN is connected, and as an input end, is connected to contact NC.Two junction transistor BT is connected with the emitter-base bandgap grading of two junction transistor BB, as an output terminal, exports grid drive singal SGATE.The collector of two junction transistor BT is couple to voltage source V IN; The collector of two junction transistor BT is couple to ground wire.The level of grid drive singal SGATE, approximately will follow (follow) and the change of the level of contact NC and change.So grid drive singal SGATE belongs to 12V system.Output stage 64 can amplify to come and the electric current of input from contact NC, produces amplified current, is exported by the emitter-base bandgap grading of two junction transistor BT or two junction transistor BB.Therefore output stage 64 can be considered as a current amplifier.
Can be known by inference by above analysis, when voltage source V IN is ready for, grid drive singal SGATE can be consistent with the logic level of drive singal SDRV.For example, when drive singal SDRV is in logic " 0 " time, its magnitude of voltage is a low logic level (0V), and the level of grid drive singal SGATE also can, at another low logic level (0V), be in logic " 0 ".When drive singal SDRV is in a high logic level (3.3V), be in logic " 1 ", the level of grid drive singal SGATE also can, another high logic level (may be 11V), be in logic " and 1 ".
In one embodiment, one drive circuit only has an input stage and an output stage haply.Each signal path in every one-level only has a driving component.For example, the signal path SP1 of the input stage 62 in Fig. 2 only has the two junction transistor BF of driving component, output stage 64 is having two signal path SPB and SPU, and two junction transistor BT is crossed in a meeting, and another can through two junction transistor BB.In another embodiment, one drive circuit can have at least one buffer stage, is arranged between an input stage and an output stage.Based on reducing signal delay considering with component count cost, an input stage and an output stage is only had to be reasonable.
Even if voltage source V IN does not also stablize, as long as the voltage of voltage source V IN exceedes the clamp voltage (operating voltage as presets) of Zener diode Z, the base voltage of two junction transistor BF approximately will be stabilized in a fixed voltage by Zener diode Z, guarantee that two junction transistor BF operates in state of saturation at the very start, and make contact NC maintain a lower voltage.So in power supply order process, contact NC will maintain a low voltage at the beginning always.This phenomenon can last till that voltage source V CC is ready for the level rising of rear drive signal SDRV, and the voltage of contact NC just may be drawn high.
Level shifter 14 has following advantage:
1. in power supply order, misoperation can not be produced.Level shifter 14 single voltage source V IN of needs power, and produce any reference voltage wherein or working point.As previously mentioned, as long as the voltage of voltage source V IN exceedes the clamp voltage of Zener diode Z, the base voltage of two junction transistor BF will be stabilized in a fixed voltage by Zener diode Z, guarantee that two junction transistor BF operates in state of saturation at the very start, and make contact NC maintain a lower voltage.If the 3.3V of voltage source V CC is not also ready for, the voltage of drive singal SDRV will very close to 0V.Now, if the 12V of voltage source V IN is ready for, level shifter 14 is normal work just, and the logic level of the grid drive singal SGATE that it produces can be the same with drive singal SDRV, a namely low-voltage, is approximately the low logic level of grid drive singal SGATE.Therefore, grid drive singal SGATE can not be in high logic level mistakenly.
2. component count is few.As shown in Figure 2, three BJT, a Zener diode and several resistance is only needed.The few awareness of defecation taste person low cost of component count.
3. operating speed is fast.Two junction transistor BF of input stage 62 are NPN, and its speed is generally higher than the two junction transistor of PNP.Output stage 64 is also that the plug-type of high speed penetrates a grade follower.So the operating speed of level shifter 14, can reach more than 500kHz in theory.
Although the present invention is for the circuit of LCD screen, the present invention goes for other application.As long as the signal that belongs to low voltage system will be changed into the driving circuit that belongs to the drive singal of higher pressure system, the present invention can be applied.
The foregoing is only preferred embodiment of the present invention, all equalizations done according to the present patent application the scope of the claims change and modify, and all should belong to covering scope of the present invention.
Claims (7)
1. a level shifter, includes:
One input stage, have an input stage switch for reception one input signal, this switch is optionally opened according to this input signal; And
One output stage, be serially connected with this input stage, for output one grid drive singal, when this input stage switch is opened, this grid drive singal is in a low logic level, when this input stage switch is closed, this grid drive singal is in a high logic level, wherein, this input signal is consistent with the logic level of this grid drive singal
Wherein, this output stage includes two emitter-base bandgap grading followers, there is a pair of junction transistor respectively, the each pair of junction transistor has a base stage and is coupled to this input stage and has an emitter-base bandgap grading and be coupled in together, the collector of one of them two junction transistor is coupled to the first voltage source, the collector of another pair of junction transistor is coupled to ground wire, and has contrary ON-OFF state.
2. level shifter as claimed in claim 1, is characterized in that, this input stage is for having stage amplifier altogether.
3. level shifter as claimed in claim 1, it is characterized in that, this input stage switch is one first pair of junction transistor, it is when this input signal is positioned at a low logic level, this first pair of junction transistor operates in a state of saturation, when this input signal is positioned at a high logic level, this first pair of junction transistor operates in a closed condition.
4. level shifter as claimed in claim 1, it is characterized in that, this output stage is a plug-type amplifier.
5. level shifter as claimed in claim 1, is characterized in that, each signal path in each this input stage and this output stage, only has through a driving component.
6. level shifter as claimed in claim 1, it is characterized in that, this input stage has Zener diode and a driving component, when the voltage of the second voltage source after linear pressure drop is not yet increased to a default operating voltage, this Zener diode guarantees that this driving component works in a state of saturation.
7. a booster driving circuit, comprising:
One first voltage source;
One linear voltage decreasing device, receive this first voltage source to produce one second voltage source, wherein, compared to this first voltage source, this second voltage source is a low-voltage source;
One image converter, receives this second voltage source, includes a grid pre-driver, and this grid pre-driver provides an input signal;
One level shifter, is coupled to this grid pre-driver, includes:
One input stage, receives this input signal;
One output stage, is serially connected with this input stage, for output one grid drive singal;
This input stage and this output stage accept multiple fixed reference potential respectively, and the plurality of fixed reference potential is produced by this first voltage fed;
This input signal is produced by this second voltage fed; And
When the voltage of this first voltage source is increased to a default operating voltage, this input signal is consistent with the logic level of this grid drive singal; And
One boost converter, includes a power switch, and this power switch is coupled to this level shifter, in order to receive this grid drive singal and to export a driving voltage,
Wherein, this output stage includes two emitter-base bandgap grading followers, there is a pair of junction transistor respectively, the each pair of junction transistor has a base stage and is coupled to this input stage and has an emitter-base bandgap grading and be coupled in together, the collector of one of them two junction transistor is coupled to this first voltage source, the collector of another pair of junction transistor is coupled to ground wire, and has contrary ON-OFF state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310676358.1A CN103646635B (en) | 2011-06-10 | 2011-06-10 | Level shifter and booster driving circuit |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110168399.0A CN102820010B (en) | 2011-06-10 | 2011-06-10 | Electrical level shifter and voltage-boosting drive circuit |
| CN201310676358.1A CN103646635B (en) | 2011-06-10 | 2011-06-10 | Level shifter and booster driving circuit |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN201110168399.0A Division CN102820010B (en) | 2011-06-10 | 2011-06-10 | Electrical level shifter and voltage-boosting drive circuit |
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| CN103646635A CN103646635A (en) | 2014-03-19 |
| CN103646635B true CN103646635B (en) | 2016-04-06 |
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| CN201310676358.1A Active CN103646635B (en) | 2011-06-10 | 2011-06-10 | Level shifter and booster driving circuit |
| CN201110168399.0A Active CN102820010B (en) | 2011-06-10 | 2011-06-10 | Electrical level shifter and voltage-boosting drive circuit |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201110168399.0A Active CN102820010B (en) | 2011-06-10 | 2011-06-10 | Electrical level shifter and voltage-boosting drive circuit |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106023941B (en) * | 2016-07-29 | 2018-05-01 | 京东方科技集团股份有限公司 | Level shifter and its driving method, gate driving circuit and display device |
| CN106125814B (en) * | 2016-08-17 | 2017-11-17 | 珠海格力节能环保制冷技术研究中心有限公司 | Signaling conversion circuit, control circuit and DC brushless motor |
| CN107707245B (en) * | 2017-09-25 | 2020-11-27 | 京东方科技集团股份有限公司 | Level shift circuit, display device driving circuit, and display device |
| US10795392B1 (en) * | 2019-04-16 | 2020-10-06 | Novatek Microelectronics Corp. | Output stage circuit and related voltage regulator |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005031112A (en) * | 2003-07-07 | 2005-02-03 | Sony Corp | Data transfer circuit and flat display device |
| KR20070018414A (en) * | 2005-08-10 | 2007-02-14 | 삼성전자주식회사 | Level shifter, and display device having the same |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4409453A1 (en) * | 1994-03-18 | 1995-09-21 | Thomson Brandt Gmbh | BiCMOS level converter ECL-CMOS |
| CN100512006C (en) * | 2004-03-23 | 2009-07-08 | 联咏科技股份有限公司 | Source electrode drive circuit, latch voltage bit quasi converter and high voltage trigger |
| KR101058865B1 (en) * | 2008-12-24 | 2011-08-23 | 포항공과대학교 산학협력단 | Single-Supply Voltage Pass Gate-Level Translator for Multiple-Supply Voltage Systems |
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2011
- 2011-06-10 CN CN201310676358.1A patent/CN103646635B/en active Active
- 2011-06-10 CN CN201110168399.0A patent/CN102820010B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005031112A (en) * | 2003-07-07 | 2005-02-03 | Sony Corp | Data transfer circuit and flat display device |
| KR20070018414A (en) * | 2005-08-10 | 2007-02-14 | 삼성전자주식회사 | Level shifter, and display device having the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103646635A (en) | 2014-03-19 |
| CN102820010B (en) | 2014-09-03 |
| CN102820010A (en) | 2012-12-12 |
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Effective date of registration: 20201026 Address after: No. 1, Xingzhu Road, Hsinchu Science Park, Taiwan, China Patentee after: MEDIATEK Inc. Address before: 518057, Guangdong, Shenzhen hi tech Zone, South District, science and technology, South ten road, Shenzhen Institute of Aerospace Science and technology innovation, C block, building 4 Patentee before: Mstar Semiconductor,Inc. Patentee before: MEDIATEK Inc. Effective date of registration: 20201026 Address after: 4 / F, block C, Shenzhen Aerospace Science and Technology Innovation Research Institute, science and technology south 10th Road, South District, Shenzhen high tech Zone, Guangdong Province Patentee after: Mstar Semiconductor,Inc. Patentee after: MEDIATEK Inc. Address before: 518057, Guangdong, Shenzhen hi tech Zone, South District, science and technology, South ten road, Shenzhen Institute of Aerospace Science and technology innovation, C block, building 4 Patentee before: Mstar Semiconductor,Inc. Patentee before: MSTAR SEMICONDUCTOR Inc. |