CN102819512B - A kind of full-duplex communication device based on SPI and method thereof - Google Patents
A kind of full-duplex communication device based on SPI and method thereof Download PDFInfo
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Abstract
The present invention relates to a kind of full-duplex communication device based on SPI and method thereof, device comprise main device with from device, and be arranged on main device with between device for main device and the data line to intercom mutually from device, synchronizing clock signals line, from device selection signal line, main device request receives data from device and receives the signal wire of data from device requests main device.Its communication means comprise main device and simultaneously send the step of data to the other side from device, main device to communicate with between device used Frame to sending the step of data, the step sending data from device to main device and main device from device.Present invention achieves the communication mode of full duplex, when traffic rate is constant, improves communication efficiency, improve system response time, by the data throughput improvement one times ideally communicated; And by data check etc., the integrality of Frame and accuracy separately when ensureing that SPI communicating pair sends data simultaneously.
Description
Technical field
The present invention relates to a kind of communication device and method thereof, be specifically related to a kind of full-duplex communication device based on SPI and method thereof.
Background technology
SPI (SerialPeripheralInterface--Serial Peripheral Interface (SPI)) bus system is a kind of synchronous serial Peripheral Interface, and it can make MCU and various peripherals carry out in a serial fashion communicating to exchange information.SPI generally uses 4 lines: the input of clock cable (CLK), main frame/from machine output data line MISO, main frame export/select line CS from machine input data line MOSI and Low level effective from machine, because SPI only takies four lines on the pin of chip, save the pin of chip, simultaneously for the layout of PCB saves space, provide convenience, meanwhile, data rate is also than comparatively fast, and top speed can reach a few Mbps.Just for this be simple and easy to and the fast characteristic of data rate, now this communication protocol of increasing integrated chip, current SPI communication is commonly half-duplex operation mode, this communication mode is limited in phase same rate, the data volume that sends in the unit interval, a large amount of communication delays can be caused like this, consume the communication resource, cause system response time to reduce, and then have influence on user's use.Even if some SPI communication achieve full-duplex communication, but also exist do not specify current control, do not have acknowledgement mechanism to be confirmed whether to receive the shortcomings such as data.
Summary of the invention
For the problems referred to above that current SPI communication exists, technical matters to be solved by this invention is to provide a kind of high efficiency full-duplex communication device based on SPI and communication means method thereof, realizes by following technical scheme:
Based on a full-duplex communication device of SPI, comprise main device with from device, and be arranged on main device with between device for main device and the signal wire to intercom mutually from device.
Described signal wire comprises: data line MISO and MOSI, synchronizing clock signals line CLK, and from device selection signal line CS, main device request receives the signal wire M_REQ of data from device, and receives data signal line S_REQ from device requests main device; Described signal wire M_REQ is controlled by main device, is connected to the I/O mouth of main device and between the down trigger mouth of device, described signal wire S_REQ controls by from device, is connected between the I/O mouth and the down trigger mouth of main device of device.
Based on a communication means for device described in claim 1, comprise main device and simultaneously send the step of data to the other side from device, main device to communicate with between device used Frame to sending the step of data, the step sending data from device to main device and main device from device; Described data frame data structure comprise represented by User Defined special character commencing signal, for represent the cycle counter of current transmission frame number number of frames, for represent the data length of these frame data length, data content, for the integrality and accuracy that detect data proof test value, receive successful acknowledge character ACK for representing.
Concrete, described main device comprises with the step sending data to the other side from device simultaneously:
(1) main device and get out the data that need separately to send from device after, drags down the level of M_CRQ and S_CRQ signal wire simultaneously, triggers the other side and interrupt;
(2) main device receives the S_CRQ sent from device and has no progeny, and main device is by synchronizing clock signals line CLK tranmitting data register signal;
(3) main device sends main device data by MOSI, is sent from device data from device synchronization by MISO; After a byte is sent, draw high the level of signal wire S_CRQ from device, main device and process the byte received from device respectively;
(4) if be not sent from frame data of device, then the level of degrade signal line S_CRQ again, then repeats step (2) and (3);
(5) main device or from device data send terminate after, if do not receive the ack signal of the other side in setting-up time, then resend this frame data; If receive the ack signal of the other side and be now in data and send state, Deng pending data be sent after after a predetermined time delay, reply ack signal to the other side again; If be in this moment, data transmission is idle and predetermined time delay is overtime, then without the need to waiting for, send ack signal immediately.
Concrete, described main device comprises to the step sending data from device:
(1), when main device need send data to from device, the level triggers of degrade signal line M_CRQ is interrupted from device;
(2) have no progeny from device receives and first judge oneself state, if be now in data from device to send state, then wait for that the data of current byte are sent completely; If be now in idle condition from device, prepare to receive data, interrupt from device degrade signal line S_REQ level triggers main device;
(3) main device receives after the signal of device signal line S_CRQ, by synchronizing clock signals line CLK tranmitting data register signal, then sends data to from device by data line MOSI; From the level drawing high signal wire S_CRQ after device receives data, if a frame does not receive, then repeated execution of steps (2) and (3);
(4) after receiving frame data from device, verify by after return ack signal by data line MISO and draw high S_CRQ signal; Main device draws high the level of M_CRQ after receiving ack signal.
Concrete, the described step sending data from device to main device comprises:
(1) when needing to send data to main device from device, first oneself state is judged, as be in from device idle condition then degrade signal line S_CRQ level triggers main device interrupt, if be now in data receiving state, trigger again after waiting for current byte data receiver main device interrupt;
(2) main device receives by synchronizing clock signals line CLK tranmitting data register signal after signal wire S_CRQ signal, sends data to main device from device by data line MISO simultaneously; Draw high the level of signal wire S_CRQ from device after a byte data is sent, before frame data are not sent, repeated execution of steps (1) and (2);
(3) after main device receives frame data, verify by after return ack signal by data line MOSI;
(4) receive from device the ack signal that main device returns, draw high the level of signal wire S_CRQ; Then main device draws high the level of signal wire M_CRQ again.
Further, when the proof test value of main device or the proof test value received from device and internal calculation is inconsistent, then corresponding main device or do not send ack signal from device, corresponding main device or do not receive ack signal from device in setting-up time and then resend corresponding Frame by the method for above-mentioned correspondence.
Further, main device is to when sending data from device, in setting-up time, do not receive the signal from device signal line S_CRQ after main device degrade signal line M_CRQ level, then main device resends these frame data according to main device to the method sending data from device.
Further, when sending data from device to main device, after device degrade signal line S_CRQ level, in setting-up time, do not receive the CLK clock signal of main device, then resend these frame data from device by the method sending data from device to main device.
Concrete, the described step resending corresponding Frame and resend these frame data is: the transmission terminating this secondary data, by these frame data receiving unit delete, and by main device with reset to original state from the state of device, prepare resend data.
Preferably, main device be provided with from device the error counter sending errors number for adding up frame data, when the numerical value of error counter is greater than the threshold value of setting, then these frame data are abandoned, while generation error information reporting.
In sum, the present invention has following remarkable beneficial effect: (1) achieves the communication mode of full duplex, when traffic rate is constant, improves communication efficiency, improve system response time, by the data throughput improvement one times ideally communicated; (2) by data check and ack signal transmitting-receiving, two integrality and the accuracy sending out Frame separately when simultaneously sending data of SPI communication is ensured.
Accompanying drawing explanation
Fig. 1 be main device with from device communication interface schematic diagram;
Fig. 2 is main device and sends schematic diagram data from device simultaneously;
Fig. 3 is that main device sends schematic diagram data to from device;
Fig. 4 is for send schematic diagram data from device to main device;
Fig. 5 be the main device that adds fault-tolerant design with from device communication scheme.
Embodiment
The present invention to be explained in further detail below in conjunction with accompanying drawing and embodiment for the ease of it will be appreciated by those skilled in the art that.
Present invention is disclosed a kind of full-duplex communication device based on SPI, as shown in Figure 1, comprise main device with from device, and be arranged on main device with between device for main device and the signal wire to intercom mutually from device.Described signal wire comprises: data line MISO and MOSI, synchronizing clock signals line CLK, and from device selection signal line CS, main device request receives the signal wire M_REQ of data from device, and receives data signal line S_REQ from device requests main device.
Signal wire M_REQ is connected to the I/O mouth of main device and between the down trigger mouth of device, controlled by main device, signal wire S_REQ is connected between the I/O mouth and the down trigger mouth of main device of device, controls by from device.
Simultaneously, the present invention also reveal that a kind of communication means based on said apparatus, comprise main device and simultaneously send the step of data to the other side from device, main device to communicate with between device used Frame to sending the step of data, the step sending data from device to main device and main device from device; Described data frame data structure comprise represented by User Defined special character commencing signal, for represent the cycle counter of current transmission frame number number of frames, for represent the data length of these frame data length, data content, for the integrality and accuracy that detect data proof test value, receive successful acknowledge character ACK for representing.
As shown in Figure 2, main device and comprising from the step simultaneously sending data to the other side between device:
(1) main device and get out the data that need separately to send from device after, drags down the level of M_CRQ and S_CRQ signal wire simultaneously, triggers the other side and interrupt;
(2) main device receives the S_CRQ sent from device and has no progeny, and main device is by synchronizing clock signals line CLK tranmitting data register signal;
(3) main device sends main device data by MOSI, is sent from device data from device synchronization by MISO; After a byte is sent, draw high the level of signal wire S_CRQ from device, main device and process the byte received from device respectively;
(4) if be not sent from frame data of device, then the level of degrade signal line S_CRQ again, then repeats step (2) and (3);
(5) main device or from device data send terminate after, if do not receive the ack signal of the other side in setting-up time, then resend this frame data; If receive the ack signal of the other side and be now in data and send state, Deng pending data be sent after reply ack signal through predetermined time delay (Tframe_delay) backward the other side again; If be in data to send idle and predetermined time delay (Tframe_delay) time-out this moment, then without the need to waiting for, send ack signal immediately.
So far, main device terminates with from sending frame data to the other side while of device.
Main device comprises to the step sending data from device as shown in Figure 3:
(1), when main device need send data to from device, the level triggers of degrade signal line M_CRQ is interrupted from device;
(2) have no progeny from device receives and first judge oneself state, if be now in data from device to send state, then wait for that the data of current byte are sent completely; If be now in idle condition from device, prepare to receive data, interrupt from device degrade signal line S_REQ level triggers main device;
(3) main device receives after the signal of device signal line S_CRQ, by synchronizing clock signals line CLK tranmitting data register signal, sends data to from device by data line MOSI simultaneously; From the level drawing high signal wire S_CRQ after device receives data, after process the byte received from device, if if a frame does not receive, then repeated execution of steps (2) and (3);
(4) if main device does not continue to send data (that is data are sent) within a time cycle, after now receiving these frame data from device, verify by after return ack signal by data line MISO and draw high S_CRQ signal; M_CRQ is drawn high after main device receives ack signal simultaneously.
As shown in Figure 4, the step sending data from device to main device comprises:
(1) when needing to send data to main device from device, first oneself state is judged, as be in from device idle condition then degrade signal line S_CRQ level triggers main device interrupt, if be now in data receiving state, trigger again after waiting for current byte data receiver main device interrupt;
(2) main device receives by synchronizing clock signals line CLK tranmitting data register signal after S_CRQ signal, sends data to main device from device by data line MISO simultaneously; S_CRQ is drawn high from device after a byte data is sent, before frame data are not sent, repeated execution of steps (1) and (2);
(3) after main device receives frame data, verify by after return ack signal by data line MOSI;
(4) receive from device the ack signal that main device returns, draw high the level of signal wire S_CRQ; Then main device draws high the level of signal wire M_CRQ again.
For ensureing the integrality of data in communication process, when the proof test value of main device or the proof test value received from device and internal calculation is inconsistent, then corresponding main device or do not send ack signal from device, corresponding main device or do not receive ack signal from device in setting-up time and then resend corresponding Frame according to the method for above-mentioned correspondence.
In order to ensure the integrality of data in communication process further, two kinds of situations in addition also need to resend these frame data:
Main device sends data step to from device, in setting-up time, do not receive the signal from device signal line S_CRQ after main device degrade signal line M_CRQ level, then main device then resends these frame data according to main device to the method sending data from device.
From device to main device, send data step, after device degrade signal line S_CRQ level, in setting-up time, do not receive the CLK clock signal of main device, then resend these frame data by the method sending data from device to main device.
The present embodiment sends data instance with main device to from device, as shown in Figure 5, after main device sends data, Tbyte_Timeout(time delay, send or receive the maximum delay of a byte) do not receive S_CRQ signal from device in the time, then main device needs to resend these frame data.
The step resending corresponding Frame and resend these frame data is: the transmission terminating this secondary data, is deleted by these frame data receiving unit, and by main device with reset to original state from the state of device, prepare to resend data.
In order to process frames of data sends the problem of mistake better, main device of the present invention be provided with from device the error counter sending errors number for adding up frame data, when the numerical value of error counter is greater than the threshold value of setting, then these frame data are abandoned, simultaneously generation error information reporting.
It is to be noted, no matter main device or will send data from device, all must first be interrupted by the S_CRQ trigger host from device, then by device output CLK clock signal, and sending data, and the M_CRQ signal of main device only represents that main frame needs to send data.
Above-described embodiment is the preferred version that the present invention realizes, and it should be noted that, do not departing under concept thereof of the present invention, any apparent replacement and subtle change are all within protection scope of the present invention.
Claims (8)
1., based on a duplex communication method of SPI, it is characterized in that: comprise main device and simultaneously send the step of data to the other side from device, main device to communicate with between device used Frame to sending the step of data, the step sending data from device to main device and main device from device;
Described data frame data structure comprise by User Defined special character as the mark sent data commencing signal, for represent the cycle counter of current transmission frame number number of frames, for represent the data length of these frame data length, data content, for the integrality and accuracy that detect data proof test value and receive successful acknowledge character ACK for representing;
Described main device comprises with the step sending data to the other side from device simultaneously:
(1) main device and get out the data that need separately to send from device after, drags down the level of M_CRQ and S_CRQ signal wire simultaneously, triggers the other side and interrupt;
(2) main device receives the S_CRQ sent from device and has no progeny, and main device is by synchronizing clock signals line CLK tranmitting data register signal;
(3) main device sends main device data by MOSI, is sent from device data from device synchronization by MISO; After a byte is sent, draw high the level of signal wire S_CRQ from device, main device and process the byte received from device respectively;
(4) if be not sent from frame data of device, then the level of degrade signal line S_CRQ again, then repeats step (2) and (3);
(5) main device or from device data send terminate after, if do not receive the ack signal of the other side in setting-up time, then resend this frame data; If receive the other side ack signal and be now in data send state, wait pending data be sent after again through one set time delay after reply ack signal to the other side; If be in this moment, data transmission is idle and time delay that is setting is overtime, then without the need to waiting for, send ack signal immediately.
2. the duplex communication method based on SPI according to claim 1, is characterized in that: described main device comprises to the step sending data from device:
(1), when main device need send data to from device, the level triggers of degrade signal line M_CRQ is interrupted from device;
(2) have no progeny from device receives and first judge oneself state, if be now in data from device to send state, then wait for that the data of current byte are sent completely; If be now in idle condition from device, prepare to receive data, interrupt from device degrade signal line S_REQ level triggers main device;
(3) main device receives after the signal of device signal line S_CRQ, by synchronizing clock signals line CLK tranmitting data register signal, then sends data to from device by data line MOSI; From the level drawing high signal wire S_CRQ after device receives data, if a frame does not receive, then repeated execution of steps (2) and (3);
(4) after receiving frame data from device, verify by after return ack signal by data line MISO and draw high S_CRQ signal; Main device draws high the level of M_CRQ after receiving ack signal.
3. the duplex communication method based on SPI according to claim 1, is characterized in that: the described step sending data from device to main device comprises:
(1) when needing to send data to main device from device, first oneself state is judged, as be in from device idle condition then degrade signal line S_CRQ level triggers main device interrupt, if be now in data receiving state, trigger again after waiting for current byte data receiver main device interrupt;
(2) main device receives by synchronizing clock signals line CLK tranmitting data register signal after signal wire S_CRQ signal, sends data to main device from device by data line MISO simultaneously; Draw high the level of signal wire S_CRQ from device after a byte data is sent, before frame data are not sent, repeated execution of steps (1) and (2);
(3) after main device receives frame data, verify by after return ack signal by data line MOSI;
(4) receive from device the ack signal that main device returns, draw high the level of signal wire S_CRQ; Then main device draws high the level of signal wire M_CRQ again.
4. the duplex communication method based on SPI according to claim 2, it is characterized in that: in setting-up time, do not receive the signal from device signal line S_CRQ after main device degrade signal line M_CRQ level, then main device then resends these frame data according to method described in claim 2.
5. the duplex communication method based on SPI according to claim 3, it is characterized in that: after the level of device degrade signal line S_CRQ, in setting-up time, do not receive the CLK clock signal of main device, then resend these frame data according to method described in claim 3.
6. according to the duplex communication method based on SPI in claim 1-5 described in any one, it is characterized in that: when the proof test value of main device or the proof test value received from device and internal calculation is inconsistent, then corresponding main device or do not send ack signal from device, corresponding main device or do not receive ack signal from device in setting-up time and then resend corresponding Frame according to method corresponding described in claim 1-3.
7. the duplex communication method based on SPI according to claim 6, is characterized in that: described in the step that resends corresponding Frame and resend these frame data be:
Terminate the transmission of this secondary data, by these frame data receiving unit delete, and by main device with reset to original state from the state of device, prepare resend data.
8. the duplex communication method based on SPI according to claim 7, it is characterized in that: main device be provided with from device the error counter sending errors number for adding up frame data, when the numerical value of error counter is greater than the threshold value of setting, then these frame data are abandoned, simultaneously generation error information reporting.
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