CN102810634B - Resistor type random access memory of a kind of high stability and preparation method thereof - Google Patents
Resistor type random access memory of a kind of high stability and preparation method thereof Download PDFInfo
- Publication number
- CN102810634B CN102810634B CN201210259551.0A CN201210259551A CN102810634B CN 102810634 B CN102810634 B CN 102810634B CN 201210259551 A CN201210259551 A CN 201210259551A CN 102810634 B CN102810634 B CN 102810634B
- Authority
- CN
- China
- Prior art keywords
- electrode
- intermediate layer
- concave inward
- oxide
- inward structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Semiconductor Memories (AREA)
Abstract
The invention provides resistor type random access memory of a kind of high stability and preparation method thereof.This memory comprises dielectric substrate, is positioned at the first electrode of dielectric substrate upper surface, is positioned at the intermediate layer of the first electrode top, and is positioned at the second electrode of intermediate layer upper surface; It is pointed concave inward structure that the upper surface in intermediate layer has a bottom, and the second electrode lower surface, to have a bottom matched with this concave inward structure with this concave inward structure opposite position be pointed outer male structure.When applying voltage between the first electrode and the second electrode, according to point discharge effect, this evagination structure division forms the electric field that local strengthens, and charged defects particle is gathered in this evagination structure division, finally near this outer male structure, forms conductive channel.Therefore, memory of the present invention effectively can control the position of the conductive channel formed between the first electrode and the second electrode, thus improves the stability of device.
Description
Technical field
The present invention relates to nanotechnology research and technical field of memory, particularly relate to and a kind of there is resistor type random access memory of high stable performance and preparation method thereof.
Background technology
Along with the progress in epoch, area information storage, in development at full speed, promotes the pace of progress of society.Widely used information carrier is mainly nonvolatile memory in the market, and comprising information recording devices such as flash memory, CD and portable hard drives, the life for people provides huge facility.But, day by day increase along with to the requirement of information transmission and storage aspect, existing memory well can not meet the requirement of people, and therefore people are devoted to find the nonvolatile storage that novel can the meeting aspects such as high-speed data is erasable, ultrahigh density storage and memory device are miniaturized require and replace traditional information recording device.
Within 2000, people have found the change of its electrical resistance applied voltage and the phenomenon of respective change in the sull of sandwich structure, this resistance states still can keep after voltage removes, and therefore there has been proposed a kind of theory of carrying out data storage based on different resistance states.Thisly novel realize with different resistance states the memory that information stores and be called as resistor type random access memory.This memory is generally sandwich structure, comprises dielectric substrate, the first electrode that substrate surface is arranged, the intermediate layer of being prepared by the material with electric resistance changing character that the first electrode surface is arranged, and the second electrode that interlayer surfaces is arranged.It is simple that this memory has structure, and easily, storage speed is fast, and storage density advantages of higher, is expected to become new types of data memory of future generation in preparation.
Current research shows, the electrical resistance applied voltage regulation and control of most of resistor type random access memory and to change be because the charged defects of material internal to define the conductive channel of local through a series of redox reaction under electric field driven, the first electrode and the second electrode are connected together caused by this conductive channel.Logical and disconnected low resistance state and the high-resistance state that correspond to device of this conductive channel, therefore the performance of this resistive device and the formation state of this conductive channel closely related.
Generally speaking, parameter for assessment of the stability of resistor type random access memory mainly comprises high and low resistance state resistor, the i.e. high resistance state of device and the resistance of low resistance state, and shift voltage, namely device is converted to low resistance state from high resistance state and low resistance state is converted to magnitude of voltage corresponding to high resistance state.Although resistor type random access memory application prospect is extensive, the performance of this device is still stable not at present, and resistance value and the shift voltage of high resistance and low resistance state are dispersed very much, the serious stability that have impact on device.
There are some researches show, being concatenated to form with open position of the stability of resistor type random access memory and conductive channel is closely related, but have at present in the resistive device of sandwich structure, the randomness that charged defects is moved under uniform electric field effect is very strong, the formation of each conductive channel and the position of disconnection all may be different, are therefore cause one of device performance factors of instability.
Summary of the invention
Technical purpose of the present invention is for the low problem of above-mentioned resistor type random access memory stability, provides a kind of resistor type random access memory with high stability.
The present invention realizes the technical scheme that above-mentioned technical purpose adopts: a kind of resistor type random access memory of high stability, comprise dielectric substrate, be positioned at the first electrode of dielectric substrate upper surface, be positioned at the intermediate layer of the first electrode top, and being positioned at the second electrode of intermediate layer upper surface, during applying electric pulse, this memory has resistance transformation characteristic between the first electrode and the second electrode; It is pointed concave inward structure that the upper surface in described intermediate layer has a bottom, and the second described electrode lower surface, to have a bottom matched with this concave inward structure with this concave inward structure opposite position be pointed outer male structure.
As preferably, the pointed degree of depth in described bottom is 0.1 ~ 100 nanometer.
The first described electrode and the material selection conductive material of the second electrode, comprise a kind of material in the good semiconductor of conductor material, electric conductivity or organic substance or two or more combined materials.The one or more kinds of compositions in metal, metal oxide, metal nitride, the semiconductor of doping, organic conductor, conducting polymer, organic polymer superconductor can be adopted.This metal, the semiconductor of metal nitride and doping includes but not limited to aluminium (Al), copper (Cu), iridium (Ir), platinum (Pt), silver (Ag), gold (Au), tungsten (W), titanium (Ti), tantalum (Ta), nickel (Ni), cobalt (Co), chromium (Cr), antimony (Sb), iron (Fe), molybdenum (Mo), palladium (Pd), tin (Sn), zirconium (Zr), zinc (Zn), polysilicon, titanium nitride (TiN), tantalum nitride (TaN), tungsten nitride (WN), at least one in TiAlN (TiaAlbNc).
The material selection in described intermediate layer has the insulating properties dielectric material of resistance transformation characteristic, and namely under External Electrical Field, this intermediate layer material shows electric resistance changing phenomenon.Such material include but not limited to all kinds of there are certain insulation property semiconductor, organic material or inorganic material, such as zinc oxide (ZnO), bismuth ferrite (BiFeO
3), cobalt acid lithium (LiCoO
2), nickel oxide (NiO), cobalt oxide (Co
2o
3), cupric oxide (Cu
xo), silicon dioxide (SiO
2), titanium dioxide (TiO
2), tantalum pentoxide (Ta
2o
5), niobium pentaoxide (Nb
2o
5), tungsten oxide (WO
x), hafnium oxide (HfO
2), aluminium oxide (Al
2o
3), carbon nano-tube, Graphene, graphene oxide, amorphous carbon, copper sulfide (Cu
xs), silver sulfide (Ag
2s), amorphous silicon, titanium nitride (TiN), polyimides (PI), polyamide (PAI), the poly-west at least one not in alkali (PA), polysulfones (PS).
The shape of described concave inward structure is not limit, and can be vertebra body, column, spherical etc., its shape of cross section not be limit, and can be triangle, rectangle, circle, ellipse, polygon etc.
Present invention also offers a kind of method preparing above-mentioned resistor type random access memory, comprise the steps:
Step 1, on an insulating substrate surface preparation the first electrode;
Step 2, on the first electrode surface preparation intermediate layer;
Step 3, to prepare bottom at the upper surface in intermediate layer be pointed concave inward structure;
Step 4, prepare the second electrode at the upper surface in intermediate layer, make the second electrode material fill up this concave inward structure in described concave inward structure position, thus form the outer male structure of the second electrode.
In described step 1,2,4, prepare the first electrode, the method for intermediate layer and the second electrode do not limit, comprise solution spin coating method, inkjet printing methods, and the one or more kinds of combinations in solid sputtering, thermal evaporation or electron beam evaporation method.
In described step 3, the preparation method of concave inward structure does not limit, and comprises and adopts the effect of all kinds of external mechanical power, self assembly, all kinds of chemical methodes etc.
In sum, the invention provides a kind of resistor type random access memory of new structure, this memory has " sandwich " structure that the first electrode, intermediate layer and the second electrode are formed, wherein, intermediate layer material is the insulating properties dielectric material with resistance transformation characteristic, and when therefore applying electric pulse between the first electrode and the second electrode, this memory has resistance transformation characteristic; The upper surface in this intermediate layer has a concave inward structure, and the bottom of this concave inward structure is pointed; Corresponding with this concave inward structure, the lower surface of the second electrode has an outer male structure, and the bottom of this concave inward structure is pointed, and matching with described concave inward structure contacts.When applying voltage between the first electrode and the second electrode, according to point discharge effect (such as lightning rod), the lower surface evagination structural portion branch of the second electrode forms the electric field of local enhancing, charged defects particle is easy to assemble at this evagination structure division, finally form conductive channel in this part, the memory therefore with structure of the present invention effectively can control the position of the conductive channel formed between the first electrode and the second electrode, thus improves the stability of device.
Specifically, the mechanism forming conductive channel between the first described electrode and the second electrode comprises the following two kinds situation:
(1) when applying voltage at the first electrode and the second electrode two ends, electrical potential difference is there is between the first electrode and the second electrode, form ion after atom in first electrode loses (or obtaining) electronics and enter intermediate layer, along with applying voltage increases, this charged ion moves to the second electrode side gradually; Lower surface due to the second electrode has outer male structure, and this evagination structure front end is pointed, thus the strongest in the electric field strength of this tip portion, according to point discharge effect, charged ion is gathered in the pointed position, front end of the outer male structure of the second electrode, and obtain (or losing) electronics at the second electrode, thus conductive channel is formed between the first electrode, intermediate layer and the second electrode, and the position of this conductive channel is defined near this pointed position, outer male structure bottom.
(2) when applying voltage at the first electrode and the second electrode two ends, room in intermediate layer is moved to the second electrode side gradually, when applying voltage and increasing to critical voltage, this room arrives the pointed position, front end of the outer male structure of the second electrode, and obtain (or losing) electronics, thus form conductive channel at the first electrode, intermediate layer and the second electrode, and the position of this conductive channel is defined near this pointed position, outer male structure bottom.
In sum, compared with existing sandwich structure devices, the resistive device that the present invention proposes in the position of nanoscale scope control conductive channel, thus can effectively improve cyclicity, the stability of device, greatly promote the development of resistive device, facilitate its application prospect.
Accompanying drawing explanation
Fig. 1 is the structural representation of the resistor type random access memory in the embodiment of the present invention 1;
Fig. 2 is the formation schematic diagram of conductive channel in the resistor type random access memory shown in Fig. 1;
Fig. 3 (a) is electric current and the change in voltage relation curve of continuous 20 times of the resistor type random access memory in the embodiment of the present invention 1;
Fig. 3 (b) is that the resistor type random access memory in comparative example 1 scans the electric current that obtains and change in voltage relation curve continuous 20 times.
Embodiment
Below in conjunction with accompanying drawing embodiment, the present invention is described in further detail, it is pointed out that the following stated embodiment is intended to be convenient to the understanding of the present invention, and any restriction effect is not play to it.
Embodiment 1:
The intermediate layer 3 that the first electrode 2, first electrode top that as shown in Figure 1, in the present embodiment, resistor type random access memory comprises dielectric substrate 1, dielectric substrate 1 upper surface is arranged is arranged, the second electrode 4 that intermediate layer 3 upper surface is arranged.When applying electric pulse between the first electrode 2 and the second electrode 4, this resistor type random access memory has resistance transformation characteristic.Wherein, the upper surface in intermediate layer 3 has a concave inward structure (" pit "), should " pit " in inverted cone (that is, its pointed be positioned at centrum bottom), its cross section is triangle, and dark 50 nanometers of this concave inward structure.Corresponding with this " pit ", the second electrode 4 lower surface and with this " pit " opposite position place, there is an outer male structure (" projection ").This " projection " matches with " pit ", and namely this " projection " is also cross section is leg-of-mutton cone, and " filling up " is somebody's turn to do " pit " part.
First electrode 2 adopts thickness to be about the copper of 100 nanometers, and intermediate layer 3 adopts thickness to be about the zinc oxide of 100 nanometers, and the second electrode 4 adopts thickness to be about the platinum of 100 nanometers.
The preparation method of the memory cell of above-mentioned resistor type random access memory comprises the steps:
Step 1, use acetone and EtOH Sonicate cleaning dielectric substrate, utilize the upper surface sputtering layer of metal copper electrode of the mode dielectric substrate after cleaning of electron beam evaporation as the first electrode 2;
Step 2, by growth have the dielectric substrate 1 of the first electrode 2 to be placed in high vacuum environment, utilize the method for magnetron sputtering in argon gas oxygen pneumatic than being 4:1, total working air pressure is in the atmosphere of 1.0Pa, use the sputtering power sputtering zinc oxide target of 60W, deposit a layer thickness at the upper surface of the first electrode 2 and be about the zinc-oxide film of 100 nanometers as intermediate layer 3;
Step 3, utilize nano-hardness tester to extrude " pit " in inverted cone structure at the upper surface in intermediate layer 3, its cross section is triangle, and tip, and should " pit " dark 50 nanometers at bottom position;
Step 4, utilize the mode of electron beam evaporation at the upper surface splash-proofing sputtering metal platinum in intermediate layer 3 as the second electrode 4, in this " pit " position, metal platinum is filled up this " pit ", thus form the second electrode 4 that lower surface has " projection " that matches with this " pit ", obtain Cu/ZnO/Pt resistor type random access memory.
Utilize analyzing parameters of semiconductor tester voltage scanning pattern to apply voltage between first electrode and the second electrode of the above-mentioned Cu/ZnO/P resistor type random access memory prepared, this memory has resistance transformation characteristic.When resistance value becomes low resistance state from high-resistance state, conductive channel is formed in the tip location of the second electrode 4, as shown in Figure 2.
Comparative example 1:
The present embodiment is the comparative example of above-described embodiment 1.In the present embodiment, the structure of resistor type random access memory is substantially the same manner as Example 1, and difference is that the upper surface in intermediate layer 3 is not arranged one " pit ", and the lower surface of the second electrode 4 does not arrange " projection " matched with this " pit " yet.
The preparation method of above-mentioned resistor type random access memory is basic identical with the preparation method in embodiment 1, difference does not comprise step 3, but adopt after step 2 prepares intermediate layer 3, adopt the upper surface splash-proofing sputtering metal platinum of step 4 directly in intermediate layer 3 as the second electrode 4, obtain Cu/ZnO/Pt memory cell.
Utilize analyzing parameters of semiconductor tester voltage scanning pattern to apply voltage between first electrode and the second electrode of the above-mentioned Cu/ZnO/Pt memory prepared, this memory has resistance transformation characteristic.
Utilize analyzing parameters of semiconductor tester voltage scanning pattern to carry out continuous sweep to the resistor type random access memory prepared in above-described embodiment 1 and comparative example 1, obtain the relation curve of the electric current of continuous 20 times and change in voltage respectively as Fig. 3 (a) and 3(b) shown in.Can see, compared with the resistive device in comparative example 1, centrality and the repeatability of the resistive device in embodiment 1 are all greatly improved, and namely the stability of this resistive device is greatly improved.
Above-described embodiment has been described in detail technical scheme of the present invention; be understood that and the foregoing is only specific embodiments of the invention; be not limited to the present invention; all make in spirit of the present invention any amendment, supplement or similar fashion substitute etc., all should be included within protection scope of the present invention.
Claims (1)
1. the preparation method of the resistor type random access memory of a high stability, comprise dielectric substrate (1), be positioned at first electrode (2) of dielectric substrate (1) upper surface, be positioned at the intermediate layer (3) of the first electrode (2) upper surface, and being positioned at second electrode (4) of intermediate layer (3) upper surface, when applying electric pulse between the first electrode (2) and the second electrode (4), this memory has resistance transformation characteristic; It is characterized in that: it is pointed concave inward structure that the upper surface in described intermediate layer (3) has a bottom, described the second electrode (4) lower surface, to have a bottom matched with this concave inward structure with this concave inward structure opposite position be pointed outer male structure; The pointed degree of depth in described bottom is 0.1 ~ 100 nanometer;
The material in described intermediate layer (3) comprises at least one in zinc oxide, bismuth ferrite, cobalt acid lithium, nickel oxide, cobalt oxide, cupric oxide, silicon dioxide, titanium dioxide, tantalum pentoxide, niobium pentaoxide, tungsten oxide, hafnium oxide, aluminium oxide, carbon nano-tube, Graphene, graphene oxide, amorphous carbon, copper sulfide, silver sulfide, amorphous silicon, titanium nitride, polyimides, polyamide, poly-western not alkali, polysulfones;
Described preparation method comprises the steps:
Step 1, prepare the first electrode (2) at dielectric substrate (1) upper surface;
Step 2, prepare intermediate layer (3) at the first electrode (2) upper surface;
Step 3, to prepare bottom at the upper surface of intermediate layer (3) be pointed concave inward structure;
Step 4, prepare the second electrode (4) at the upper surface of intermediate layer (3), make the second electrode material fill up this concave inward structure in described concave inward structure position, thus form the outer male structure of the second electrode (4);
In described step 1,2,4, prepare the first electrode (2), the method for intermediate layer (3) and the second electrode (4) comprises solution spin coating method, inkjet printing methods, and the one or more kinds of combinations in solid sputtering, thermal evaporation or electron beam evaporation method;
In described step 3, adopt the effect of external mechanical power, self assembly, and the concave inward structure described in chemical method preparation;
Described the first electrode (2) and the material of the second electrode (4) comprise a kind of material in the good semiconductor of conductor material, electric conductivity or organic substance or two or more combined materials;
Described the first electrode (2) and the material of the second electrode (4) comprise the one or more kinds of compositions in metal, metal oxide, metal nitride, the semiconductor of doping, organic conductor, conducting polymer, organic polymer superconductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210259551.0A CN102810634B (en) | 2012-07-25 | 2012-07-25 | Resistor type random access memory of a kind of high stability and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210259551.0A CN102810634B (en) | 2012-07-25 | 2012-07-25 | Resistor type random access memory of a kind of high stability and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102810634A CN102810634A (en) | 2012-12-05 |
| CN102810634B true CN102810634B (en) | 2015-10-14 |
Family
ID=47234284
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210259551.0A Active CN102810634B (en) | 2012-07-25 | 2012-07-25 | Resistor type random access memory of a kind of high stability and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102810634B (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103117360B (en) * | 2013-01-21 | 2015-06-24 | 西安理工大学 | Preparation method of organic nickel oxide resistance storage film and electrical property test method thereof |
| CN103515534B (en) * | 2013-10-10 | 2015-05-13 | 北京大学 | Resistive random access memory with high uniformity and manufacturing method thereof |
| CN103594622B (en) * | 2013-11-28 | 2016-10-05 | 北京大学 | High conforming resistance variation memory structure and preparation method thereof |
| US9653680B2 (en) * | 2015-06-27 | 2017-05-16 | Intel Corporation | Techniques for filament localization, edge effect reduction, and forming/switching voltage reduction in RRAM devices |
| TWI573208B (en) * | 2015-07-23 | 2017-03-01 | 國立清華大學 | Semiconductor interconnect structure and manufacturing method thereof |
| CN105140392B (en) * | 2015-09-08 | 2017-11-10 | 上海大学 | Carbon-based material variable-resistance memory unit with unusual resistive characteristic and preparation method thereof |
| US9735202B1 (en) * | 2016-02-16 | 2017-08-15 | Sandisk Technologies Llc | Implementation of VMCO area switching cell to VBL architecture |
| CN107256925B (en) * | 2017-06-13 | 2020-03-10 | 东北师范大学 | High-stability resistive random access memory based on graphene oxide |
| CN107275482B (en) * | 2017-07-07 | 2019-11-08 | 中国科学院微电子研究所 | A kind of manufacturing method and resistance-variable storing device of resistance-variable storing device |
| CN107706205B (en) * | 2017-09-29 | 2020-07-14 | 中国科学院宁波材料技术与工程研究所 | High-stability unipolar resistive random access memory |
| US11552265B2 (en) * | 2020-10-23 | 2023-01-10 | Applied Materials, Inc. | Resistance-switching polymer films and methods of manufacture |
| CN112510148B (en) * | 2020-12-08 | 2023-03-17 | 扬州大学 | Resistive random access memory and preparation method thereof |
| CN114050273B (en) * | 2021-10-09 | 2022-11-01 | 东风汽车集团股份有限公司 | Modified graphene oxide, composite material, GDL and preparation method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101395717A (en) * | 2006-03-09 | 2009-03-25 | 松下电器产业株式会社 | Resistance-varying type element, semiconductor device, and method for manufacturing the element |
| CN102543731A (en) * | 2012-02-29 | 2012-07-04 | 中国科学院宁波材料技术与工程研究所 | Manufacturing method of quantum point contact |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI233204B (en) * | 2002-07-26 | 2005-05-21 | Infineon Technologies Ag | Nonvolatile memory element and associated production methods and memory element arrangements |
| US8189372B2 (en) * | 2008-02-05 | 2012-05-29 | International Business Machines Corporation | Integrated circuit including electrode having recessed portion |
-
2012
- 2012-07-25 CN CN201210259551.0A patent/CN102810634B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101395717A (en) * | 2006-03-09 | 2009-03-25 | 松下电器产业株式会社 | Resistance-varying type element, semiconductor device, and method for manufacturing the element |
| CN102543731A (en) * | 2012-02-29 | 2012-07-04 | 中国科学院宁波材料技术与工程研究所 | Manufacturing method of quantum point contact |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102810634A (en) | 2012-12-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102810634B (en) | Resistor type random access memory of a kind of high stability and preparation method thereof | |
| Liu et al. | Diode-less bilayer oxide (WOx–NbOx) device for cross-point resistive memory applications | |
| US8603854B2 (en) | Preparation method for resistance switchable conductive filler for ReRAM | |
| US8609018B2 (en) | Electrode for supercapacitor having manganese oxide-conductive metal oxide composite layer, fabrication method thereof, and supercapacitor comprising same | |
| CN101621115B (en) | Binary oxide resistance random access memory (RRAM) storage unit of electric pulse induced resistance conversion characteristics | |
| CN101106171A (en) | Non-volatile memory device including variable resistance material | |
| KR20100042180A (en) | Electrode for secondary battery and the fabrication method thereof, and secondary battery using the same | |
| CN107068860B (en) | Resistance-variable storing device and preparation method thereof | |
| CN111463346B (en) | OTS gating material, OTS gating unit, preparation method of OTS gating unit and memory | |
| CN108110026B (en) | Ge-Te-Al-As threshold switch material, threshold switch device unit and preparation method thereof | |
| CN102543731A (en) | Manufacturing method of quantum point contact | |
| CN109411600A (en) | A kind of method and its resistance-variable storing device reducing resistance-variable storing device operation voltage | |
| CN102157684B (en) | Resistive random access memory (RRAM) using carbon nano tube (CNT) as solid state electrolyte | |
| CN101599529A (en) | Impedance random asccess memory part and manufacture method thereof with CNT (carbon nano-tube) | |
| Hmar | Non-volatile resistive switching memory device based on ZnO-graphene oxide embedded in a polymer matrix fabricated on a flexible PET substrate | |
| Chen et al. | The resistive switching characteristics in TaON films for nonvolatile memory applications | |
| Yu et al. | Self-rectifying and forming-free nonvolatile memory behavior in single-crystal TiO2 nanowire memory device | |
| CN102723438A (en) | An organic resistance random access memory unit, an organic resistance random access memory and a preparation method thereof | |
| CN103427021B (en) | Memory cell of low power consumption resistance formula random asccess memory and preparation method thereof | |
| CN101826596A (en) | Production method of phase-change memory | |
| Hota et al. | Direct Nanoscale Observation of Resistance Switching with Au Nano-Dots Embedded Nb2O5 by Scanning Tunneling Microscopy | |
| CN202977532U (en) | Memristor based on Ge2Se2Te5 | |
| CN111223986A (en) | Silver intercalation gating device based on hafnium oxide transition layer and manufacturing method thereof | |
| CN113130744B (en) | Gating device based on aluminum-doped niobium oxide and preparation method thereof | |
| CN111584710B (en) | OTS material, gate unit and preparation method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |