CN102801163A - Determining method of control scheme of npc vsc and especially active power filter - Google Patents

Determining method of control scheme of npc vsc and especially active power filter Download PDF

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CN102801163A
CN102801163A CN2012102640770A CN201210264077A CN102801163A CN 102801163 A CN102801163 A CN 102801163A CN 2012102640770 A CN2012102640770 A CN 2012102640770A CN 201210264077 A CN201210264077 A CN 201210264077A CN 102801163 A CN102801163 A CN 102801163A
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voltage source
voltage
source converter
clamp
electrical network
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CN102801163B (en
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J·W·科拉
T·索埃罗
P·兰斯塔德
J·林纳
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General Electric Technology GmbH
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Alstom Technology AG
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/4833Capacitor voltage balancing
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/487Neutral point clamped inverters

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  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention relates to a determining method of a control scheme of an NPC VSC and especially an active power filter, and discloses a determining method of a control scheme of a neutral point clamping voltage source converter which includes at least three levels, and especially a bypass active power filter. The determining method includes a topology of three bridge branches (21-23) between each phase of the three phases (R, S, T) of a power network (11) and a neutral point (24). Each branch (21-23) includes at least four active switches (T1-T4). A clamping carrier modulator (1) which synchronizes with the power network (11) is provided to control a non-switch region.

Description

Definite method to the controlling schemes of NPC VSC, particularly active electrical source filter
Technical field
The invention particularly relates to the method for the controlling schemes of neutral-point-clamped type (NPC) voltage source converter (VSC) that is used to confirm to have at least 3 level.
Background technology
It is minimum that the Harmonic Interference that bypass active electrical source filter usually is used for when improving filtration efficiency, nonlinear load being produced is reduced to, and also solved the many problems that caused by the traditional passive filter.In the design of this system, need give special concern to the load current that will compensate.With the modulation strategy that adopts, load current is the variable of the circulating current in the power device of the voltage source converter (VSC) confirming to select.Particularly in 3 level NPC (neutral-point-clamped type) active filter, general irregular load may cause in the semiconductor of bridge branch road that uneven loss distributes.With the same in each converter, loss limit switch frequency and power capability in the device of pressure-bearing, and in order to guarantee the long-time stability of system, the derate of converter current (de-rating) becomes inevitable.
The semiconductor chip great majority that are assembled in the standard commercial 3 level NPC bridge branch road modules are provided with size and specified under the loss distribution situation of not considering on the particular element.By this way, because the problem that loss distributes, the use of these devices causes the design with high costs and oversized dimensions that the semiconductor area is under-utilized through regular meeting.In addition, the modulation strategy scheme that is used to improve system effectiveness may be aggravated this inhomogeneous loss more and distributed, thus transistor and the operation temperature difference of diode and/or the thermal cycle of widening them in the rising power model.The thermal mismatching of these assemblies causes producing on the material in module the thermal stress of induction, and maybe heat-mechanical failure will take place.Therefore, it is quite complicated that 3 level NPC design of Active Filters become, because may cancel each other out between the desired characteristic of high power density, efficient and assembly reliability.
Because the mismatch that unbalanced loss distribution between the semiconductor of bridge branch road and junction temperature distribute, in high power converter in particular cases, the use of NPC power model normally causes low semiconductor utilance.By this way, the more bridge branch roads that make up converter that are meant of the use of the different single semiconductor device of rated value more.Adopt the single semi-conductive NPC system of similar rated value usually these devices to be installed in the independent radiator, thereby realize the good thermal decoupling zero of these individual components.Unfortunately, the use of different single semiconductor and/or independent radiator can cause cost to increase and the very big system of volume usually.
Summary of the invention
In order to solve the loss distribution problem of conventional NPC active filter, keep the high efficiency of system simultaneously, a kind of space vector modulation scheme that merges the optimum clamp of phase place is proposed.For most of typical industrial loads; Conventional NPC is not had under the situation of adjunct circuit; Shown and adopted the active filter of standard commercial NPC bridge branch road module that loss is distributed on the chip-die well, thereby made their operating temperature that little difference only arranged.This paper has also proposed a kind of appropriate control notion, and it can balance DC link voltage, but and on some degree the optimum clamp of holding current.
In this is proposed, depend on the current shape of the load of active filter compensation, according to 3 times to or 9 times of carrier signals to the electrical network fundamental frequency come alternately to top and the loading of bottom DC link. capacitor.Particularly for high-frequency operation,, can realize the remarkable reduction of loss through to all tops in the closed bridge branch road or bridge branch road (it the handles the maximum current value) clamp of middle branch switch.Improve the clamp carrier frequency and avoid between switch region instantaneous coupling with high current value to distribute and realize better controllability the loss in the bridge branch road assembly.Notice that these two kinds of clamp strategies all are intended to the temperature of balancing run knot and/or stride across the power loss of transistor (integrated grid bipolar transistor IGBT), simultaneously the total losses of system are reduced to minimum.Therefore, mainly be selection operation switching frequency strategically.In fact, loss distribution and the switching frequency and the operation of DC link voltage that stride across the assembly of bridge branch road are strong correlations.These variablees and switching loss are proportional, and can they and current clamp scheme combination be used optimally to be designed for the active filter of the particular semiconductor technology and the load of compensation.
Carrier modulator and line voltage or load current synchronously for expectation not between switch region during to carry out clamp be important.The optimal current clamp can the definition in advance through the Accurate Analysis of necessary known load current.The displacement of load current therein under the situation with handled variable power, can make up question blank and come tuning carrier wave with the instantaneous power of handling according to load significantly.Under the load condition of unknown, can utilize a kind of algorithm to adjust the clamp strategy during operation, this algorithm predicts strides across the transistorized loss of a phase branch road.This calculating needs to combine space vector modulation, so that correctly consider the influence of current clamp pattern according to the load of compensation.Utilize the modulation index of definition, can confirm instantaneous relatively (the on-times)/transformation of discrete voltage space vector.Thereby, with this information with adopted semi-conductive known conductive loss/the switching loss characteristic is combined, can calculate average conduction loss and switching loss on the switch periods.Through storing the lossy data that calculates in each switch periods, can obtain to recursion in each transistor device at the average loss of electrical network on the primitive period.At last; After each switch periods; Can adjust the variable directly related with Module Dissipation, thus power loss (the duty factor D of switching frequency fs, DC link voltage benchmark uDC_ref, clamp pattern and phase place
Figure BSA00000755708500031
in balanced these devices
The clamp scheme of this proposition can be used in other 3 level VSC topology, the T type VSC shown in Fig. 1 (d).
As under the very irregular load, under the uneven DC link voltage or the operating conditions in the load variations process equilibrium of power loss can not be realized; Just, not only all can not be balanced between the assembly of bridge branch road but also between the out of phase branch road.Be subject to application requirements (switching frequency fs, DC link voltage UDC, semiconductor technology and clamp pattern) at large because constitute these variablees of the degree of freedom of the modulation that proposes, so this is especially true.In addition, the current waveform in each phase place of 3 level active filter VSC all must be similar; Otherwise, the power loss between the out of phase will be different.At last, during uneven DC link voltage situation, owing to need neutral point potential control, the phase current clamp of expectation always can not realized.
The present invention relates to a kind of method like prescription in the claim 1 especially.Basically, the method that is proposed that is used for confirming the controlling schemes of neutral-point-clamped type voltage source converter comprises following steps at least:
● 120 ° the window in location in the phase cycling of electrical network/load for example is located around the central peak maximum point of the negative half-wave of electrical network/load and positive half wave.This window definition allows the time range at the clamp place of corresponding branch road.
● the frequency of clamp carrier modulator is confirmed as 3 times of fundamental frequencies to this electrical network/load (3 subharmonic) or 9 times of fundamental frequencies to this electrical network/load (9 subharmonic).Should confirm can be based on the visual inspection of electrical network/load waveform, and perhaps it can be based on the analysis of waveform.The frequency of distortion is high more and distortion is many more, possibly need to select high more clamp carrier modulator frequency more.It also can will be described in detail as hereinafter based on emulation or actual measurement.
● in case the frequency of this window and clamp carrier modulator is determined; Voltage source converter is operated under the extra control of this clamp carrier modulator; This be because, depend on the conducting/off state of clamp carrier modulator, the switch in the corresponding branch road is interrupted; Yet thereby should correspondence branch road clamp-, this only can take place in above-mentioned window.If the clamp carrier modulator of corresponding branch road is left in the basket in fact outside above-mentioned window, then use above-mentioned window to come conducting/shutoff clamp.For extra optimization, now maybe (but be not necessarily must) the further operating parameter of adjusting the clamp carrier modulator of correction, particularly this clamp carrier modulator is with respect to the phase shift of this electrical network/load.This clamp carrier modulator need be synchronous with this electrical network/load, and this relative phase place can be used for optimization, wherein implements this optimization and carried out to realize facilitating optimal balance and alap total losses.Hereinafter will be specialized the other parameter that can in this optional step, adjust.
More specifically; The present invention relates to a kind of method that is used for the controlling schemes of definite neutral-point-clamped type (NPC) voltage controller (VSC); This neutral-point-clamped type (NPC) voltage controller (VSC) typically has 3 phase places and at least 3 level; Be bypass active electrical source filter specifically, have in the three-phase of electrical network each mutually and the topology of three bridge branch roads between the neutral point, each branch road comprises at least four active switch bypasses.Concrete topology will controlling shown in Fig. 1 a, Fig. 1 b and Fig. 1 d.
According to the present invention, a kind of clamp carrier modulator of that be used for not controlling between switch region and synchronized is provided, said method comprises following steps at least:
I) analyze electrical network and/or load voltage (I LR) waveform and the window (3) of in the voltage cycle of electrical network/load, confirming 120 °; Wherein this window is the center with the posivtive spike maximum point and the negative peak maximum point of this electrical network/load voltage waveform, and said window definition is used for the not switch periods of the permission of this correspondence bridge branch road;
Ii) adopt the clamp carrier modulator frequency of 3 subfrequencies equal this electrical network/load to operate the operation of this voltage source converter or this voltage source converter of emulation; Wherein, If in said window, then as the function of clamp carrier modulator, with the switch interrupts and the clamp of this correspondence bridge branch road; And analyze the temperature of the operation knot that strides across this active switch and/or the balance of power loss then, and the total losses of going back the analytical voltage source converter;
Iii) adopt the clamp carrier modulator frequency of 9 subfrequencies equal this electrical network/load to operate the operation of this voltage source converter or this voltage source converter of emulation; Wherein, If in said window; Then as the function of clamp carrier modulator, with the switch interrupts and the clamp of this correspondence bridge branch road, and temperature and/or the balance of power loss and the total losses of voltage source converter of analyzing the operation knot that strides across this active switch then;
Iv) comparison step ii) and balance iii) and total losses, and according to step I i) or step I show that ii) better balance is as main criteria and show that lower total losses select one of them of clamp carrier modulator frequency as less important criterion;
V) adopt selected clamp carrier modulator frequency to operate the operation of this voltage source converter or this voltage source converter of emulation; Wherein, Function as this clamp carrier modulator; In said window; Switch interrupts and clamp with corresponding bridge branch road; Change simultaneously at least one in the following operating parameter of this voltage source converter iteratively: the duty factor of switching frequency, DC link voltage benchmark, clamp carrier modulator, clamp carrier modulator be with respect to the phase shift of electrical network, and as the function of these operating parameters adjustment, optimization strides across operation junction temperature and/or the balance of power loss and the total losses of this voltage source converter of active switch;
Till the optimal operational parameters that reaches controlling schemes.
According to first preferred embodiment of this proposition method, at first step v) in, preferably with the clamp carrier modulator with respect to the Phase Shifting System of this electrical network/load ground and/or be adapted to the total and/or total losses of the optimal balance that finds this voltage source converter iteratively.
According to another preferred embodiment, this voltage source converter is adapted to as the bypass voltage source converter operates.
In order to compensate the imbalance of DC link voltage, can be made as the positive half wave of the interior electrical network of window (3) and the not ratio between switch region and between switch region between the negative half-wave unbalanced.
The bandwidth of the current controller that in the control concept based on the DQ framework of correspondence, uses (G (s)) is preferably elected at least 20 times that are used for main DC link voltage controller (H (s)) as, is preferably at least 50 times.The bandwidth of local DC link voltage controller (R (s)) is elected 1/3 of principal voltage loop at least as, is preferably 1/5 of principal voltage loop at least.
This voltage source converter can be 3 level T type VSC converters or 3 level A-NPCVSC converters.
The invention still further relates to the method that a kind of use comes the operating voltage source converter by the definite controlling schemes of above-outlined, this voltage source conversion implement body is a bypass active electrical source filter.
Preferably, this converter is in the 300-10000V voltage range, preferably operate in 500-1500V or 700-1000V scope.
Preferably, this converter uses switching frequency, the preferably operation of the switching frequency in the 5kHz-100kHz scope in the 100Hz-1MHz scope.
And, the present invention relates to use the method for above-outlined to confirm to be adapted to controlling schemes as photovoltaic grid inverters, rectifier or motor-driven 3 level VSC.
Other embodiments of the invention are also proposed in the dependent claims.
Description of drawings
Below, in conjunction with accompanying drawing the preferred embodiments of the present invention are described, the purpose of these accompanying drawings is that existing preferred embodiment of the present invention is shown, and the existing preferred embodiment that is not intended to limit the invention.In these accompanying drawings:
Fig. 1 illustrates active filter, and it is based on (a) conventional 3 level NPC VSC; (b) 3 level A-NPC VSC; (c) 2 level VSC; And (d) 3 level T type converters;
Fig. 2 illustrates the modulation scheme of 3 level active filters: the clamp strategy that (a) utilizes 3 subfrequency carrier waves; (b) utilize the clamp strategy of 9 subfrequency carrier waves; And (c) during unbalanced DC link. capacitor voltage, utilize the clamp strategy of 9 subfrequency carrier waves;
Fig. 3 illustrates the active filter control strategy based on the DQ frame principles;
Fig. 4 illustrates local DC link voltage controlling schemes: (a) situation of balance; (b) slight unbalanced DC link voltage, the local clamp that keeps; And (c) height Voltage unbalance (need lag behind control);
The loss that Fig. 5 illustrates bridge branch road assembly distributes: (a) conventional Sine Pulse Width Modulation; (b) utilize the clamp strategy of 3 subfrequency carrier waves; And (c) utilize the clamp strategy of 9 subfrequency carrier waves, and in each case, 12 indicator cock losses (40kHz) of solid black vitta and shaded bar 13 indication conduction losses;
Fig. 6 illustrates the operation junction temperature of bridge branch road assembly: (a) conventional SPWM; (b) utilize the clamp strategy of 3 subfrequency carrier waves; And (c) utilize the clamp strategy of 9 subfrequency carrier waves;
The efficient that Fig. 7 illustrates between the different topology that adopts commercial semi-conductive 12kVAr active filter compares: the clamp strategy that (a) utilizes 3 subfrequency carrier waves; And (b) utilize the clamp strategy of 9 subfrequency patterns; And
The loss that Fig. 8 illustrates corresponding to the bridge branch road assembly of following situation distributes: (a) 3 level NPC, and (b) operate in the T type active filter of 3 subharmonic clamp patterns under the 40kHz; And (c) operate in 3 level T type active filters of 9 subharmonic clamp patterns under the 8k Hz, and in each case, 12 indicator cock losses (40kHz) of solid black vitta and shaded bar 13 indication conduction losses.
Embodiment
3 level NPC topologys shown in Fig. 1 (a) are the most common to be used in the voltage range application.NPC VSC is the alternative of low voltage application.Compare (comparison diagram 1 (c)) with 2 level VSC, 3 level NPC VSC are characterized by for the gate drivers of two additional active switchs of each phase branch road, two additional isolation and four diodes.This 3 phase NPC VSC can allow 27 on off states in three dimensional vector diagram, and 2 level only allow 8 on off states.Therefore, the superior controllability of phase current and DC link voltage (UDC) is superior to 2 level converters significantly.In addition, in the application like photovoltaic grid inverters, rectifier, motor driver and active filter, if the switching frequency of considering is enough high, then 3 level NPC systems can realize than the lower loss of conventional 2 level converters.
Through being that each phase branch road of conventional NPC increases by two extra active switchs, can utilize additional on off state and the possibility (comparison diagram 1 (b)) of the new change of current (commutation) incorporated into realizes the very big improvement that loss distributes.This active NPC (A-NPC) configuration allows specifically to utilize the path, above and below of neutral tap, and therefore influences the distribution of conduction loss and switching loss.When 3 level NPC topologys were compared mutually with conventional 3, this 3 phase 3 level A-NPC needed the gate drivers of 6 additional active switchs and 3 extra isolation.Therefore, the principal element that stops this 3 level A-NPC VSC to achieve success in active filter market is exactly cost and the complexity that greatly increases.Notice that when when widely used conventional 2 level VSC compare (comparison diagram 1 (c)) in commercial system, A-NPC needs the gate driving of 12 extra active switchs and isolation.
A shortcoming of 3 level topology is the active control of its neutral point potential.Although under ideal conditions; DC link. capacitor voltage is naturally a primitive period inner equilibrium, and asymmetric, different gate delay time, dynamic load variations and/or the unbalanced load in the characteristic of semiconductor possibly cause the steady drift (steady shift) of neutral point potential.Because 3 level topologys provide the redundant space vector on the interior hexagon of three dimensional vector diagram, so possibly not adopt adjunct circuit and not have the stability that keeps neutral point potential under the prerequisite that extra switch changes.In 3 level active filters, general irregular load possibly cause uneven loss to distribute in the semiconductor of bridge branch road especially.With the same in each converter, the loss in the maximum pressure-bearing device has limited switching frequency and power capability, and in order to guarantee the long-term stability of this system, it is inevitable that the derating of converter current becomes.
The semiconductor chip great majority that are assembled in the standard commercial 3 level bridge branch road modules are provided with size and are rated for the loss distribution of not considering on the particular element.By this way, because the problem that loss distributes, the use of these devices causes the oversized dimensions design under-utilized with the semiconductor area with high costs through regular meeting.In addition, be used to improve the further this inhomogeneous loss distribution of aggravation of modulation scheme of system effectiveness, thus transistor and the operation temperature difference of diode and/or the thermal cycle cycle of widening them in the rising power model.The thermal mismatching of these assemblies causes the thermal stress of inducting on the material in the module, and possibly cause hot mechanical failure.Therefore, it is quite complicated that 3 level active Filter Design become, because possibly cancel each other out between the desired characteristic of high power density, efficient and assembly reliability.
In order to solve the loss distribution problem of 3 level VSC, a kind of space vector modulation scheme that has combined the optimum clamp of phase place is proposed.This strategy can maximize the efficient of this system and/or improve the distribution of Module Dissipation, wherein the variation of the power/thermal stress of Individual components in the bridge branch road is reduced to minimum.In addition, a kind of appropriate control notion is disclosed, but its can balance DC link voltage and on some degree the optimum clamp of holding current.
The converter that appears for this paper; Realized like B.Kaku, I.Miyashita and S.Sone " the switching loss minimize spatial vector PWM method that is used for IGBT 3 electrical level inverters " (Switching loss minimized space vector pwm method for igbt three-level inverter; " IEEE Proceedings.Electric Power Applications; Vol.144; Pp.182-190, May 1997) described in, the space vector modulation scheme that combined the optimum clamp of phase place.Output voltage vector always by three the most closely the discrete voltage space vector form.Because 3 level topologys provide the redundant space vector on interior hexagon, so possibly realize that optimum clamp strategy is to reduce switching loss.
In disclosed modulation scheme, each phase branch road of 3 level VSC can make its switching manipulation in one-period, stop at 120 degree, and can not reduce the performance of system.When being intended in high frequency of operation process to realize high efficiency, the phase branch road that will avoid switch to have the maximum current value naturally keeps the symmetry that loss distributes between the phase branch road of this converter simultaneously.Yet in this process, general irregular electric current can cause that very inhomogeneous power loss distributes on the semiconductor of bridge branch road in the active filter.Under the situation of using the standard commercial power model, the loss distribution problem possibly increase transistor and the operating temperature difference of diode and/or the heat distribution structure (profile) of widening them in these devices, thereby directly improves the reliability of these assemblies.
This paper depends on the current shape by the load of active filter compensation, according to 3 times to or 9 times of carrier signals to the electrical network fundamental frequency come alternately to load top and bottom DC link. capacitor.Fig. 2 (a) and 2 (b) illustrate with the constant output electric current as load, be used for 3 two modulation strategies of 12 pulse diode rectifier adjustment mutually.Especially for high frequencies of operation,, can realize significantly reducing of loss here, through clamp to the bridge branch road (comparison diagram 2 (a)) of handling the maximum current value.Frequency through improving the clamp process and avoiding between switch region and the instantaneous coupling of high current value can obtain the better controllability (comparison diagram 2 (b)) that loss distributes in the bridge branch road assembly.
The lastrow of Fig. 2 illustrates above-mentioned window 3, in this window, does not allow to carry out switch, and this window with the maximum point of positive half wave and negative half-wave be the center (a) and b) in the window of positive half wave only is shown).In the figure, I LRExpression load current, and I RThe electric current of expression compensation.The on off state that depends on modulated carrier 3, switch (being the clamp of corresponding branch road) does not only allow in window 3.This is shown in the next line of Fig. 2.Outside window 3, modulated carrier 1 comes down to uncared-for.If be positioned at window 3, then allow clamp, as by reality not between switch region shown in 2 figures if carrier wave 1 is in 0 level and 1.According to the phase shift between modulator 1 and the electrical network, with the piece displacement of correspondence.For example, if in the left column of Fig. 2, carrier wave is with respect to 5 ° of electrical network displacements, then interval 2 one of them will become 35 °, and another will become 25 °.Can use phase in-migration optimization balance.In the middle column in Fig. 2, the phase-shifts of modulator will only can be caused the corresponding displaced in 3 20 ° of intervals, one of them arrives till the end of 120 ° of windows up to them.For the example in Fig. 2 right column, this sets up equally.How the example in back maybe be through carrying out the imbalance in the differential DC of the adjustment link in positive half wave and between the clamp in the negative half-wave if illustrating.
For all 3 phase places, use identical modulated carrier.From symmetric reason, for the offset current I that relates to AFRAnd voltage U R, 0, three phase place R (second row), S (the third line) and T (fourth line) 120o that only is shifted against each other.Its interior time span that switch takes place of shadow region indication.
Notice that two clamp strategies all are intended to the power loss on balancing run junction temperature and/or the balanced transistor (IGBT), simultaneously the total losses of system are reduced to minimum.Therefore, mainly be selection operation switching frequency strategically.In fact, loss distribution on the assembly of bridge branch road and switching frequency and DC link voltage operation strong correlation.These variablees and switching loss are proportional, and they can use optimally to be designed for the active filter of the particular semiconductor technology and the load of compensation with the current clamp scheme.
Constant and keep the loss between the phase branch road of converter to be distributed in symmetry in the fundamental frequency cycles for the balance that keeps DC link. capacitor voltage, require redundant zero vector is carried out suitable selection.Duty factor (D) at carrier wave is set to this situation that just existed at 50% o'clock.Other duty factor value will produce asymmetrical modulation arbitrarily.It can be used for the Balance Control of DC link. capacitor voltage, shown in Fig. 2 (c).For D>50%, top DC link. capacitor is recharged, simultaneously the discharge of below capacitor.When D<50%, the charge cycle of capacitor changes.
The control concept that is suitable for 3 level active filters that this paper shown in Fig. 3 considers based on the DQ framework.It is made up of fast current control loop and slow voltage circuit.In addition, also have local DC link voltage control, it is used for balance DC link. capacitor voltage.Other strategy like PQ principle, Fryze electric current, general integrator, frequency domain strategy (DFT, RDFT and FFT) etc. also can adopt.
In order to obtain the good controllability of active filter electric current, the bandwidth of current controller (G (s)) is selected as 50 times of main DC link voltage controller (H (s)).Can prevent the high voltage departure that causes by little controller gain through increasing ride gain pro rata here, with error signal.For the optimum clamp of holding current to a certain extent during the imbalance of DC link voltage, the bandwidth of local DC link voltage controller (R (s)) is selected as 1/5th (1/5) of principal voltage loop.Adopt the nonlinear Control of combination hysteresis and linear notion, as shown in Figure 4.Uneven for low-voltage, the output signal of R (s) controller with have 3 times to or 9 times compare to the PWM of basic frequency modulator.This has confirmed to select to be positioned at one of them the duty factor of carrier wave of redundant zero vector on the hexagon of space vector modulation scheme.Uneven for high voltage, take the saturated and type adapter that lags behind of modulator.The high value of DC link. capacitor expects that for change in voltage it has avoided the operation that lags behind and control.
Carrier modulator and line voltage or load current synchronously for expectation not between switch region in the execution clamp be absolutely necessary.The optimal current clamp can the definition in advance by the Accurate Analysis of load current that should be known.Under the situation that the skew of load current therein changes along with handled power significantly, can construct question blank and come tuning carrier wave with the instantaneous power of handling according to load.Under the load condition of unknown therein, can in operating process, utilize an algorithm to adjust the clamp strategy, this algorithm predicts strides across the transistorized loss of a phase branch road.This calculating combines with space vector modulation, so that correctly consider the influence of current clamp pattern according to the load of compensation.Adopt the modulation index of definition, can confirm the instantaneous relatively/transfer of discrete voltage space vector.Therefore, with this information and employed semi-conductive known conductive loss/the switching loss characteristic is combined, can calculate average conduction loss and switching loss on the switch periods.Through being stored in the lossy data that calculates in each switch periods, can recursively obtain the average loss in each transistor device in the electrical network primitive period.At last; After each switch periods, can carry out adjustment to the variable directly related so that the power loss in these devices of balance (the duty factor D of switching frequency fs, DC link voltage benchmark uDC_ref, clamp pattern and phase place
Figure BSA00000755708500121
with Module Dissipation
For the feasibility of the loss minimize spatial Vector Modulation that quantizes to propose, to rated capacity be 12kVAr 3 mutually 3 level NPC active filters carry out emulation.This system adopts the 230Vrms/50Hz line voltage under 30kHz switching frequency and 800V DC link, to operate.Select 3 level grooves and field stop IGBT power model F3L50R06W1E3_B11, and in tables of data, directly obtain its loss characteristic and thermal model.Utilization is carried out loss analysis as 3 phases, 12 pulse diode rectifier of load to the nominal operation of active filter with the constant output electric current.For purpose relatively, three modulation schemes are analyzed: conventional SPWM method, wherein switch control does not reduce; And two clamp strategies that proposed, one by 3 times to the carrier signals of electrical network fundamental frequency guiding (with reference to figure 2 (a)) and another is by 9 times of carrier signals guiding (with reference to figure 2 (b)) to the electrical network fundamental frequency.
Fig. 5 and Fig. 6 illustrate average power consumption distribution and the operation junction temperature (TJ) that produces on the Individual components in the bridge branch road respectively.In Fig. 6,80 ℃ constant radiator temperature (THS) is taken into account in analysis.Adopt the operating system of SPWM modulation to produce minimum efficient, because exist total semiconductor loss (PT) to be 237W (each power model 79W).Through the electric current of avoiding switch to have high value, by having 3 times and the clamp strategy of the signal guidance of 9 subharmonic patterns obtains loss respectively and reduces 16% and 9.3%.In addition, the operation junction temperature of below, the top/and inner IGBT or diode is for all bridge branch road quilts balance and symmetry (with reference to figure 6 (b)) well.
The clamp strategy that is proposed is intended to operation junction temperature and/or the power loss that balance strides across IGBT, simultaneously the total losses of system is reduced to minimum.Therefore, for disclosed example, the console switch frequency is strategically selected, and is intended to for two modulation schemes that proposed, and these targets can both successfully realize.In fact, stride across loss distribution and the switching frequency and the DC link voltage operation strong correlation of the assembly of bridge branch road.These variablees and switching loss are proportional, and they can use optimally to be designed for the active filter of particular semiconductor technology with the current clamp scheme.
Notice that the clamp scheme that is proposed can be used for other 3 level VSC topology, for example the T type VSC shown in Fig. 1 (d).In the part below, demonstrate the suitable bypass active filter of deriving by 2 level VSC, 3 level NPC and T code converter.For being that 5kHz is to 50kHz and low DC link voltage (U in the switching frequency scope DC=800V) operation, illustrate between these converters of space vector modulation scheme of optimum clamp of the combination phase place that employing proposes efficient relatively.Have in 3 the loss analysis that mutually the commercial semi-conductive switching loss that in having test setting, obtains of 12 pulse diode rectifier is measured of constant output electric current and be considered.
The calculating of the efficient of 2 level and 3 level active filters makes can be to compare between the efficient of the 12kVAr 3 phase bypass active filters of deriving at the rated value by 2 level VSC, 3 level NPC and T code converter.3 phases, 12 pulse diode rectifier are considered load in the loss analysis with the commercial semi-conductive switching loss measured value that in test setting, obtains.
For the Accurate Analysis of switching loss, the independent information from tables of data will be not enough to realize the fair comparison of the system studied.Because the mismatch of voltagerating device in the T type topology, if the rated voltage of change of current diode is merely 600V, the conducts energy of 1200V IGBTs will be lower so, because QRR is lower significantly.Likewise, if the rated voltage of change of current diode is 1200V, the conduction loss energy of 600V device will be higher so.
The calculating of the active filter topology efficient that is produced by the efficient of each active filter that this paper studied is adopted and disclosed, the M.Schweizer of 1527-1533 page or leaf at the 25th IEEE power application meeting in 2010 and exhibition (APEC) annual meeting journal; T.Friedli, and the similar algorithm that appears in J.W.Kolar " the 3 level NPC voltage links comparison and the realization (Comparision and implementation of a 3-level npc voltage link back-to-back converter with sic and si diodes) of converter back-to-back with carborundum and silicon diode " is confirmed.This calculations incorporated space vector modulation, thereby make the influence of optimum clamp according to being come correctly to consider by the load that compensated.Adopt the modulation index that limits, the instantaneous/transfer of discrete voltage space vector can be determined.Therefore, average conduction loss and the switching loss on switch periods can be calculated.At last, the average loss in each device can obtain through the corresponding expression formula on the whole principal voltage of the integration cycle on fundamental frequency cycles.
In Fig. 7, the 12kVAr bypass active filter that has appeared from 2 level VSC, 3 level NPC and T code converter arrives 50kHz switching frequency scope and low DC link voltage level (U at 5kHz DC=800V) the following pure semiconductor efficient of operation.In this is analyzed, when consider to have the constant output electric current 3 when 12 pulse diode rectifier are load mutually, commercial IGBTs IKW25T120 that in test setting, obtains and the lossy data of IKW30N60T are used to comparison.For the calculating of 3 level T shapes topology efficient, adopt the algorithm identical to solve the space vector modulation that is proposed with being used for the NPC converter.
Because the 1200V device overwhelming majority in the T type active filter always carries out the such fact of the change of current during 800V at half DC link voltage rather than in 2 level VSC, switching loss is significantly reduced.Therefore, for the low switching frequency value, 3 level T type active filters have shown than traditional more superior performance of 2 level versions.Compare with 3 level NPC topology, T type system has lower conduction loss, but has higher switching loss.By this way, in two clamp strategies, the efficient of T code converter is for up to the switching frequency of 10kHz all very remarkable (with reference to figure 7).On the other hand, for the switching frequency more than the 10kHz, 3 level NPC topology is better.
The bridge branch road assembly average power consumption that Fig. 8 (a) and 8 (b) show the 3 level NPC that operate under the 40kHz switching frequency and T type active filter respectively distributes.As can finding out, the global switch utilization of T type active filter is low-down.On the other hand, 3 level NPC active filters have been obtained remarkable performance, can make all semiconductor chips of IGBTs or diode all operate with similar junction temperature.For T type VSC, the optimum switch utilization occurs under the low switching frequency (8kHz), and in the switching frequency scope of 50kHz, it only can reach through the clamp strategy with 9 subharmonic patterns at 5kHz.Fig. 8 (c) shows the T type active filter performance that is used for this operation.
The strategy that this paper proposes is applied to 3 level active filters; But, adopt other commercial Application of 3 level VSC, especially for example photovoltaic grid inverters, rectifier, motor driver this notion also capable of using.The modulation strategy that this paper proposes also can with the combination of active NPC (A-NPC) topology, thereby the loss that not only improves between the assembly of phase branch road distributes, and improves the efficient of this system.
List of reference signs
1 clamp carrier wave, carrier modulator
2 reality are not between switch region
3 is possible not between switch region
4 space vector modulation
5 active filters
6 nonlinear loads
7 partial voltage control devices
8 current controllers
9 voltage controllers
10 low pass filters
11 electrical networks
12 switching losses (30kHz), the solid black vitta
13 conduction losses, the shaded bar among Fig. 5
The 14PWM modulator
15 hysteresis control levels
16 control levels
172 level
183 level T types
193 level NPC
The Tj of the balance IGBT of 203 level NPC
The bridge branch road of 21R phase
The bridge branch road of 22S phase
The bridge branch road of 23T phase
24 neutral points

Claims (12)

1. be used to confirm to have the method for controlling schemes of neutral-point-clamped type (NPC) voltage source converter (VSC) of at least 3 level; Said neutral-point-clamped type (NPC) voltage source converter (VSC) specifically is a bypass active electrical source filter; It has each phase place and the topology of three the bridge branch roads (21-23) between the neutral point (24) in three phase places (R, S, T) of electrical network (11); Each branch road (21-23) comprises at least four active switchs (T1-T4)
Wherein, provide a kind of and said electrical network (11) synchronously being used to control the not clamp carrier modulator (1) between switch region,
Said method comprises the following step at least:
I) window (3) of analyzing the waveform of said electrical network and/or load voltage (ILR) and in the voltage cycle of said electrical network/load, confirming 120 °; Wherein said window (3) is the center with the positive peak maximum point and the negative peak maximum point of said electrical network/load voltage waveform, and said window (3) definition is used for the permission cycle of the not switch of corresponding bridge branch road;
Ii) adopt the clamp carrier modulator frequency of 3 subfrequencies equal said electrical network/load to operate the operation of said voltage source converter or the said voltage source converter of emulation; Wherein, If in said window (3); As the function of said clamp carrier modulator, the switch of said corresponding bridge branch road is interrupted and clamp, and analyzes the balance of the operation junction temperature that strides across said active switch and/or power loss then and analyze the total losses of said voltage source converter;
Iii) adopt the clamp carrier modulator frequency of 9 subfrequencies equal said electrical network/load to operate the operation of said voltage source converter or the said voltage source converter of emulation; Wherein, If in said window (3); As the function of said clamp carrier modulator, the said switch of said corresponding bridge branch road is interrupted and clamp, and analyzes operation junction temperature and/or the balance of power loss and the total losses of said voltage source converter that stride across said active switch then;
Iv) comparison step ii) and said balance iii) and said total losses, and according to step I i) or step I ii) show better balance as main criteria and lower total losses as less important criterion, select in the said clamp carrier modulator frequency;
V) adopt selected clamp carrier modulator frequency to operate the operation of said voltage source converter or the said voltage source converter of emulation; Wherein, Function as said clamp carrier modulator; As long as in said window (3); The said switch of said corresponding bridge branch road is interrupted and clamp; Change simultaneously at least one in the following operating parameter of said voltage source converter iteratively: the duty factor of switching frequency, DC link voltage benchmark, clamp carrier modulator, said clamp carrier modulator be with respect to the phase shift of said electrical network, and come optimization to stride across the total losses of operation junction temperature and/or the power loss and the said voltage source converter of said active switch as the function of these operating parameters adjustment, till the optimal operational parameters that reaches said controlling schemes.
2. the method for claim 1, wherein at first step v) in, adjust of the said phase shift of said clamp carrier modulator iteratively, with optimal balance and/or the total losses that find said voltage source converter with respect to said electrical network/load.
As before the described method of each claim, wherein said voltage source converter is adapted to as the bypass voltage source converter.
As before the described method of each claim, wherein in order to compensate the imbalance of said DC link voltage, in said window (3), the positive half wave of said electrical network and the not ratio between switch region and between switch region between the negative half-wave are made as imbalance.
As before the described method of each claim, the bandwidth of wherein said current controller (G (s)) is elected at least 5 times of bandwidth that are used for main DC link voltage control (H (s)) as, is preferably at least 20 times, perhaps at least 50 times or about 50 times.
As before the described method of each claim, the bandwidth of wherein local DC link voltage controller (R (s)) is elected 1/3rd of principal voltage loop at least as, is preferably 1/5th of principal voltage loop at least.
As before the described method of each claim, wherein said voltage source converter is 3 level T type VSC converters or 3 level A-NPC VSC converters.
8. the method that the determined controlling schemes of each claim is come the operating voltage source converter before the employing basis, said voltage source converter is specially bypass active electrical source filter.
As before the described method of each claim, wherein said converter DC link voltage is operated under the voltage of 300-10000V scope, preferably in the 700-1000V scope.
As before the described method of each claim, the switching frequency in the wherein said converter using 100Hz-1MHz scope is operated, preferably in the 5kHz-100kHz scope.
11. a control concept that is used for voltage source converter, its adopt as before the described method of each claim realize.
12., be used to confirm to be adapted to controlling schemes as photovoltaic grid inverters, rectifier or motor-driven 3 level VSC to use like each method among the claim 1-7.
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CN110912134A (en) * 2019-11-29 2020-03-24 中国船舶重工集团公司第七一九研究所 Multi-level active power filter with low harmonic content

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