CN102801163B - Determining method of control scheme of npc vsc and especially active power filter - Google Patents
Determining method of control scheme of npc vsc and especially active power filter Download PDFInfo
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- CN102801163B CN102801163B CN201210264077.0A CN201210264077A CN102801163B CN 102801163 B CN102801163 B CN 102801163B CN 201210264077 A CN201210264077 A CN 201210264077A CN 102801163 B CN102801163 B CN 102801163B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4833—Capacitor voltage balancing
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
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Abstract
The invention relates to a determining method of a control scheme of an NPC VSC and especially an active power filter, and discloses a determining method of a control scheme of a neutral point clamping voltage source converter which includes at least three levels, and especially a bypass active power filter. The determining method includes a topology of three bridge branches (21-23) between each phase of the three phases (R, S, T) of a power network (11) and a neutral point (24). Each branch (21-23) includes at least four active switches (T1-T4). A clamping carrier modulator (1) which synchronizes with the power network (11) is provided to control a non-switch region.
Description
Technical field
The invention particularly relates to the method for the control program of neutral-point-clamped type (NPC) voltage source converter (VSC) for determining to have at least 3 level.
Background technology
Bypass active electrical source filter usually for the humorous wave interference that nonlinear load produces being reduced to minimum while improving filtration efficiency, and also solves the many problems caused by traditional passive filter.In the design of this system, need to give special concern to the load current that will compensate.Together with the modulation strategy adopted, load current is the variable of the circulating current determined in the power device of the voltage source converter (VSC) selected.Particularly in 3 level NPC (neutral-point-clamped type) active filter, general irregular load may cause uneven loss distribution in the semiconductor of bridge branch road.The same with each converter, the loss limit switch frequency in the device of most pressure-bearing and power capability, and in order to ensure the long-time stability of system, the derate (de-rating) of converter current becomes inevitable.
Be assembled in semiconductor chip great majority in standard commercial 3 level NPC bridge branch road module and do not consider to arrange under the loss distribution situation in particular element size and specified.By this way, due to the problem of loss distribution, the use of these devices often can cause design that the is with high costs and oversized dimensions of semiconductor area underutilization.In addition, the modulation strategy scheme for improving system effectiveness may aggravate this uneven loss distribution more, thus the operation temperature difference of transistor in increased wattage module and diode and/or widen their thermal cycle.The thermal mismatching of these assemblies causes the thermal stress material in module producing induction, and heat-mechanical failure may will occur.Therefore, the design of 3 level NPC active filters becomes quite complicated, because may cancel each other out between the desired characteristic of high power density, efficiency and assembly reliability.
Due to the mismatch that the unbalanced loss distribution between the semiconductor of bridge branch road and junction temperature distribute, in high power converter in particular cases, the use of NPC power model normally causes low semiconductor utilance.By this way, the use of the single semiconductor device that rated value is different refers to the bridge branch road building converter.Adopt the NPC system of the single semiconductor of similar rated value to be usually arranged in independent radiator by these devices, thus realize the good pyrolysis coupling of these individual components.Unfortunately, different single semiconductors and/or the use of independent radiator can cause the system that cost increases and volume is very large usually.
Summary of the invention
In order to solve the loss distribution problem of conventional NPC active filter, the high efficiency of keeping system, proposes a kind of space vector modulation scheme merging the optimum clamp of phase place simultaneously.For most of typical industrial load, when adjunct circuit do not have to conventional NPC, show and adopted the active filter of standard commercial NPC bridge branch road module that loss can be made to be distributed in chip-die well, thus made their operating temperature only have little difference.Also proposed a kind of suitable control concept herein, it can balance DC link voltage, and can keep the optimum clamp of electric current in some degree.
In this is proposed, the current shape of the load depending on active filter to compensate, according to 3 times to or 9 times of carrier signals to electrical network fundamental frequency come alternately to top and the loading of bottom DC link. capacitor.Particularly for high-frequency operation, by bridge branch road (its process maximum current value) clamp to all tops closed in bridge branch road or middle branch switch, the remarkable reduction of loss can be realized.Improve clamp carrier frequency and avoid mating to distribute to the loss in bridge branch road assembly with high current value instantaneous between switch region realizing better controllability.Note, these two kinds of clamping strategy are all intended to the temperature of balancing run knot and/or stride across the power loss of transistor (integrated grid bipolar transistor IGBT), the total losses of system are reduced to minimum simultaneously.Therefore, mainly need strategically to select console switch frequency.In fact, striding across that the loss distribution of the assembly of bridge branch road and switching frequency and DC link voltage operate is strong correlation.These variablees and switching loss proportional, and they and current clamp scheme can be combinationally used the active filter of the load being optimally designed for particular semiconductor technology and compensation.
Carrier modulator and line voltage or load current synchronous for expect between switch region, period does not perform clamp is important.Optimal current clamp defines in advance by the Accurate Analysis of load current that must be known.When the displacement of load current is wherein significantly with handled changed power, question blank can be built and carry out tuning carrier wave with the instantaneous power according to load process.When load the unknown, a kind of algorithm can be utilized to adjust clamping strategy during operation, and this algorithm predicts strides across the loss of the transistor of a phase branch road.This calculating needs in conjunction with space vector modulation, correctly to consider the impact of current clamp pattern according to the load compensated.Utilize the modulation index of definition, relatively instantaneous (the on-times)/transformation of discrete voltage space vector can be determined.Thus, this information is combined with the known conductive loss/switching loss characteristic of the semiconductor adopted, the average conduction loss in a switch periods and switching loss can be calculated.By storing the lossy data calculated in each switch periods, the average loss in each transistor device on the electrical network primitive period recursively can be obtained.Finally, after each switching cycle, the variable directly related with Module Dissipation can be adjusted, thus power loss (the duty factor D of switching frequency fs, DC link voltage benchmark uDC_ref, clamping mode and the phase place in these devices balanced
The clamp scheme of this proposition can be used in other 3 level VSC topology, the T-shaped VSC as shown in Fig. 1 d.
As the operating conditions under very irregular load, under uneven DC link voltage or in load variations process may make the equilibrium of power loss not realize, namely, not only all can not be balanced between the assembly of bridge branch road but also between out of phase branch road.Because these variablees forming the degree of freedom of the modulation proposed are limited to application at large and require (switching frequency fs, DC link voltage UDC, semiconductor technology and clamping mode), so this is especially true.In addition, the current waveform in each phase place of 3 level active filter VSC must be similar; Otherwise, the power loss between out of phase will be different.Finally, during uneven DC link voltage situation, because needs neutral point potential controls, so the phase current clamp expected always can not realize.
The present invention is particularly as a kind of method of prescription in claim 1.Substantially, the method proposed for the control program determining neutral-point-clamped type voltage source converter comprises at least following steps:
● at the window of the phase cycling inner position 120 ° of electrical network/load, such as, be located around the negative half-wave of electrical network/load and the central peak maximum point of positive half wave.This window definition allows the time range at the clamp place of corresponding branch road.
● the frequency of clamp carrier modulator is defined as 3 times of fundamental frequencies to this electrical network/load (3 subharmonic) or 9 times of fundamental frequencies to this electrical network/load (9 subharmonic).This is determined can based on the visual inspection of electrical network/load waveform, or it can based on the analysis of waveform.The frequency of distortion is higher and distortion is more, more may need to select higher clamp carrier modulator frequency.Its also can based on emulation or actual measurement, as will be described in detail below.
● once the frequency of this window and clamp carrier modulator is determined, voltage source converter operates under the extra control of this clamp carrier modulator, this is because, depend on the ON/OFF state of clamp carrier modulator, switch in corresponding branch road is interrupted, thus by this corresponding branch road clamp-but, this only can occur in above-mentioned window.If the clamp carrier modulator of corresponding branch road is left in the basket in fact outside above-mentioned window, then above-mentioned window is used to carry out ON/OFF clamp.In order to extra optimization, now may the operating parameter of adjusting clamp carrier modulator of (but and not necessarily must) correction further, particularly this clamp carrier modulator is relative to the phase shift of this electrical network/load.This clamp carrier modulator needs synchronous with this electrical network/load, and this relative phase place can be used for optimization, wherein implements this optimization and is carried out realizing facilitating optimal balance and alap total losses.Hereafter the other parameter can adjusted in this optional step will be specialized.
More specifically, the present invention relates to a kind of for determining the method for the control program of neutral-point-clamped type (NPC) voltage controller (VSC), this neutral-point-clamped type (NPC) voltage controller (VSC) typically has 3 phase places and at least 3 level, bypass active electrical source filter specifically, have the topology of between each phase and neutral point three bridge branch roads in the three-phase of electrical network, each branch road comprises at least four active switch bypasses.Concrete topology is by controlling such as shown in Fig. 1 a, Fig. 1 b and Fig. 1 d.
According to the present invention, provide a kind of for not switch range restraint with the clamp carrier modulator of synchronized, described method comprises at least following steps:
I) electrical network and/or load voltage (I is analyzed
lR) waveform and in the voltage cycle of electrical network/load, determine the window (3) of 120 °, wherein this window is centered by the posivtive spike maximum point of this electrical network/load voltage waveform and negative peak maximum point, and described window definition is used for the not switch periods of the permission of this corresponding bridge branch road;
Ii) adopt the clamp carrier modulator frequency that equals 3 subfrequencies of this electrical network/load to operate this voltage source converter or to emulate the operation of this voltage source converter, wherein, if in described window, then as the function of clamp carrier modulator, by the switch interrupts of this corresponding bridge branch road and clamp, and then analyze the temperature of operation knot and/or the balance of power loss that stride across this active switch, and go back the total losses of analytical voltage source converter;
Iii) adopt the clamp carrier modulator frequency that equals 9 subfrequencies of this electrical network/load to operate this voltage source converter or to emulate the operation of this voltage source converter, wherein, if in described window, then as the function of clamp carrier modulator, by the switch interrupts of this corresponding bridge branch road and clamp, and then analyze the temperature of the operation knot striding across this active switch and/or the balance of power loss and the total losses of voltage source converter;
Iv) comparison step ii) and balance iii) and total losses, and according to step I i) or step I ii) display better balance to select one of them of clamp carrier modulator frequency as secondary criterion as main criteria and the lower total losses of display;
V) the clamp carrier modulator frequency selected by employing operates this voltage source converter or emulates the operation of this voltage source converter, wherein, as the function of this clamp carrier modulator, in described window, by the switch interrupts of corresponding bridge branch road and clamp, Simultaneous Iteration ground changes at least one in the following operating parameter of this voltage source converter: switching frequency, DC link voltage benchmark, the duty factor of clamp carrier modulator, clamp carrier modulator is relative to the phase shift of electrical network, and as the function that these operating parameters adjust, optimization strides across the operation junction temperature of active switch and/or the balance of power loss and the total losses of this voltage source converter,
Till the optimal operational parameters reaching control program.
According to the first preferred embodiment of this put forward the methods, initial in step v) in, preferably by clamp carrier modulator relative to the Phase Shifting System ground of this electrical network/load and/or be adapted to the total and/or total losses of the optimal balance finding this voltage source converter iteratively.
According to another preferred embodiment, this voltage source converter is adapted to and operates as bypass voltage source converter.
In order to compensate the imbalance of DC link voltage, can the ratio not between switch region and between switch region between the positive half wave of window (3) interior electrical network and negative half-wave be set to unbalanced.
The bandwidth of the current controller (G (s)) used in the control concept based on DQ framework of correspondence preferably elects at least 20 times for main DC link voltage controller (H (s)) as, is preferably at least 50 times.The bandwidth of local DC link voltage controller (R (s)) elects 1/3 of at least principal voltage loop as, is preferably 1/5 of at least principal voltage loop.
This voltage source converter can be the T-shaped VSC converter of 3 level or 3 level A-NPCVSC converters.
The invention still further relates to a kind of use carrys out operating voltage source converter method by the control program that above-outlined is determined, this voltage source converter is bypass active electrical source filter specifically.
Preferably, this converter is in 300-10000V voltage range, preferably at 500-1500V or 700-1000V range of operation.
Preferably, this converter uses the operation of the switching frequency within the scope of 100Hz-1MHz, the switching frequency preferably within the scope of 5kHz-100kHz.
And, the present invention relates to and use the method for above-outlined to determine to be adapted to the control program as photovoltaic grid inverters, rectifier or motor-driven 3 level VSC.
Also other embodiments of the invention are proposed in dependent claims.
Accompanying drawing explanation
, describe the preferred embodiments of the present invention by reference to the accompanying drawings below, the object of these accompanying drawings is that existing preferred embodiment of the present invention is shown, and the existing preferred embodiment be not intended to limit the invention.In the drawings:
Fig. 1 is shown with source filter, and it is based on the conventional 3 level NPC VSC of: Fig. 1 a; Fig. 1 b3 level A-NPC VSC; Fig. 1 c2 level VSC; And Fig. 1 d3 level T type converter;
Fig. 2 illustrates the modulation scheme of 3 level active filters: Fig. 2 a utilizes the clamping strategy of 3 subfrequency carrier waves; Fig. 2 b utilizes the clamping strategy of 9 subfrequency carrier waves; And Fig. 2 c utilizes the clamping strategy of 9 subfrequency carrier waves during unbalanced DC link. capacitor voltage;
Fig. 3 illustrates the active filter control strategy based on DQ frame principles;
Fig. 4 illustrates local DC link voltage control scheme: the situation that Fig. 4 a balances; Fig. 4 b is slight unbalanced DC link voltage, local keeps clamp; And Fig. 4 c height Voltage unbalance (needing Delay control);
Fig. 5 illustrates the loss distribution of bridge branch road assembly: the conventional Sine Pulse Width Modulation of Fig. 5 a; Fig. 5 b utilizes the clamping strategy of 3 subfrequency carrier waves; And Fig. 5 c utilizes the clamping strategy of 9 subfrequency carrier waves, in each case, solid black vitta 12 indicator cock loss (40kHz) and shaded bar 13 indicates conduction loss;
Fig. 6 illustrates the operation junction temperature of bridge branch road assembly: the conventional SPWM of Fig. 6 a; Fig. 6 b utilizes the clamping strategy of 3 subfrequency carrier waves; And Fig. 6 c utilizes the clamping strategy of 9 subfrequency carrier waves;
Fig. 7 illustrates the efficiency comparison between the different topology of the 12kVAr active filter adopting Commercial semiconductors: Fig. 7 a utilizes the clamping strategy of 3 subfrequency carrier waves; And Fig. 7 b utilizes the clamping strategy of 9 subfrequency patterns; And
Fig. 8 illustrates that the loss corresponding to the bridge branch road assembly of following situation distributes: Fig. 8 a3 level NPC, and Fig. 8 b operates in the T-shaped active filter of 3 subharmonic clamping mode under 40kHz; And Fig. 8 c operates in the T-shaped active filter of 3 level of 9 subharmonic clamping mode under 8k Hz, in each case, solid black vitta 12 indicator cock loss (40kHz) and shaded bar 13 indicates conduction loss.
Embodiment
3 level NPC topologys are as shown in Figure 1a the most common in middle voltage range application.NPC VSC is the alternative of low voltage application.Compared with 2 level VSC (comparison diagram 1c), 3 level NPC VSC are characterized by gate drivers for the additional active switch of each phase branch road two, two additional isolation and four diodes.This 3 phase NPC VSC can allow 27 on off states in three dimensional vector diagram, and 2 level only allow 8 on off states.Therefore, the superior controllability of phase current and DC link voltage (UDC) is better than 2 level converters significantly.In addition, in the application of such as photovoltaic grid inverters, rectifier, motor driver and active filter, if the switching frequency considered is enough high, then 3 level NPC systems can realize the loss lower than conventional 2 level converters.
By increasing by two extra active switchs for each phase branch road of conventional NPC, additional on off state and the possibility (comparison diagram 1b) of the new change of current (commutation) that is incorporated to can be utilized to realize the very big improvement of loss distribution.This active NPC (A-NPC) configuration allows specifically to utilize path above and below neutral tap, and therefore affects the distribution of conduction loss and switching loss.When compared with conventional 3 phase 3 level NPC topologys, this 3 phase 3 level A-NPC needs the gate drivers of 6 additional active switchs and 3 extra isolation.Therefore, stoping this 3 level A-NPC VSC to obtain chief factors of success in active filter market is exactly the cost and complexity that greatly increase.Note, when with compared with conventional 2 level VSC widely used in commercial system time (comparison diagram 1c), A-NPC needs the raster data model of 12 extra active switchs and isolation.
A shortcoming of 3 level topologys is Active control of its neutral point potential.Although under ideal conditions, DC link. capacitor voltage is naturally a primitive period inner equilibrium, and asymmetric, the different gate delay time in characteristic of semiconductor, dynamic load variations and/or unbalanced load may cause the steady drift (steady shift) of neutral point potential.Because 3 level topologys hexagon provide redundant space vector in three dimensional vector diagram, so the stability of neutral point potential may be kept under the prerequisite not adopting adjunct circuit and change without extra switch.Special in 3 level active filters, general irregular load may cause uneven loss distribution in the semiconductor of bridge branch road.The same with in each converter, the loss in maximum pressure-bearing device limits switching frequency and power capability, and in order to ensure the long-term stability of this system, the derating of converter current becomes inevitable.
The semiconductor chip great majority be assembled in standard commercial 3 level bridge branch road module arrange size and are rated for the loss distribution do not considered in particular element.By this way, due to the problem of loss distribution, the use of these devices often can cause with high costsly designing with the oversized dimensions of semiconductor area underutilization.In addition, can further this uneven loss distribution of aggravation for the modulation scheme improving system effectiveness, thus the operation temperature difference of transistor in increased wattage module and diode and/or widen their thermal cycle cycle.The thermal mismatching of these assemblies causes the thermal stress that the material in module is inducted, and may thermomechanical be caused to damage.Therefore, the design of 3 level active filters becomes quite complicated, because high power density, may to cancel each other out between efficiency and the desired characteristic of assembly reliability.
In order to solve the loss distribution problem of 3 level VSC, a kind of space vector modulation scheme combining the optimum clamp of phase place is proposed.This strategy can maximize the efficiency of this system and/or improve the distribution of Module Dissipation, wherein the change of the power/thermal stress of Individual components in bridge branch road is reduced to minimum.In addition, disclose a kind of suitable control concept, it can balance DC link voltage and can keep the optimum clamp of electric current in some degree.
For the converter presented herein, achieve as B.Kaku, I.Miyashita and S.Sone " the switching loss minimize spatial vector PWM method for IGBT 3 electrical level inverter " (Switching loss minimized space vector pwm method for igbt three-level inverter; " IEEE Proceedings.Electric Power Applications, Vol.144, pp.182-190, May 1997) described in, the space vector modulation scheme that combines the optimum clamp of phase place.Output voltage vector always by three the most closely discrete voltage space vector formed.Because 3 level topologys provide redundant space vector, so may realize optimum clamping strategy to reduce switching loss on interior hexagon.
In disclosed modulation scheme, each phase branch road of 3 level VSC can make its switching manipulation in one-period, stop at 120 degree, and can not reduce the performance of system.When being intended to realize high efficiency in high frequency of operation process, switch naturally to be avoided to have the phase branch road of maximum current value, keeping the symmetry that between the phase branch road of this converter, loss distributes simultaneously.But in this process, in active filter, general irregular electric current can cause very uneven power loss distribution on the semiconductor of bridge branch road.When using standard commercial power model, loss distribution problem may increase the operating temperature difference of transistor and diode in these devices and/or widen their heat distribution structures (profile), thus directly improves the reliability of these assemblies.
, depend on the current shape of the load compensated by active filter herein, according to 3 times to or 9 times of carrier signals to electrical network fundamental frequency alternately load top and bottom DC link. capacitor.Fig. 2 a and 2b illustrates two modulation strategies using constant output current as load, that adjust for 3 phase 12 pulse diode rectifier.Herein, especially for high frequencies of operation, by the clamp of the bridge branch road (comparison diagram 2a) to process maximum current value, the remarkable reduction of loss can be realized.By improving the frequency of clamp process and avoiding mating with high current value is instantaneous between switch region, the better controllability (comparison diagram 2b) of loss distribution in bridge branch road assembly can be obtained.
The most lastrow of Fig. 2 illustrates above-mentioned window 3, does not allow to carry out switch in this window, and this window centered by the maximum point of positive half wave and negative half-wave (Fig. 2 a) and Fig. 2 b) in the window of positive half wave is only shown).In the figure, I
lRrepresent load current, and I
rrepresent the electric current compensated.Depend on the on off state of modulated carrier 3, switch (i.e. the clamp of corresponding branch road) does not only allow in window 3.This is shown in the most next line of Fig. 2.Outside window 3, modulated carrier 1 is in fact uncared-for.If if carrier wave 1 is in 0 level and 1 be positioned at window 3, then allow clamp, as by reality not between switch region shown in 2 figures.According to the phase shift between modulator 1 and electrical network, the block of correspondence is shifted.Such as, if in the left column of Fig. 2, carrier wave is shifted 5 ° relative to electrical network, then interval 2 one of them will become 35 °, and another will become 25 °.Phase in-migration optimization can be used to balance.In middle column in fig. 2, the phase-shifts of modulator only will can be caused 3 20 ° interval corresponding displaced, until they one of them arrive the end of 120 ° of windows.For the example in Fig. 2 right column, this sets up equally.How a rear example can by carrying out the differential imbalance adjusted in DC link between the clamp in positive half wave and in negative half-wave if illustrating.
For all 3 phase places, use identical modulated carrier.For symmetric reason, for the offset current I related to
aFRand voltage U
r, 0, three phase place R (the second row), S (the third line) and T (fourth line) are only shifted 120o toward each other.Shadow region indicates the time span that switch occurs in it.
Note, two clamping strategy are all intended to the power loss on balancing run junction temperature and/or balanced transistor (IGBT), the total losses of system are reduced to minimum simultaneously.Therefore, mainly need strategically to select console switch frequency.In fact, the loss distribution on the assembly of bridge branch road and switching frequency and DC link voltage operate strong correlation.These variablees and switching loss proportional, and they can use the active filter of the load being optimally designed for particular semiconductor technology and compensation together with current clamp scheme.
In order to keep, the balance of DC link. capacitor voltage is constant and to keep the loss between the phase branch road of converter to be distributed in a fundamental frequency cycles symmetrical, requires to carry out suitable selection to redundancy zero vector.This situation is just there is when the duty factor (D) of carrier wave is set to 50%.Other duty cycle value will produce asymmetrical modulation arbitrarily.Its balance that can be used for DC link. capacitor voltage controls, as shown in Figure 2 c.For D > 50%, top DC link. capacitor is charged, lower capacitor electric discharge simultaneously.As D < 50%, the charge cycle of capacitor changes.
The control concept based on DQ framework being suitable for 3 level active filters considered herein shown in Fig. 3.It is made up of fast current control loop and slow voltage circuit.In addition, also have local DC link voltage control, it is for balancing DC link. capacitor voltage.Other strategy as PQ principle, Fryze electric current, General integral device, frequency domain strategy (DFT, RDFT and FFT) etc. also can adopt.
In order to obtain the good controllability of active filter electric current, the bandwidth of current controller (G (s)) is selected as 50 times of main DC link voltage controller (H (s)).Herein, by increasing ride gain pro rata to prevent with error signal the high voltage departure caused by little controller gain.In order to keep the optimum clamp of electric current during the imbalance of DC link voltage to a certain extent, the bandwidth of local DC link voltage controller (R (s)) is selected as 1/5th (1/5) of principal voltage loop.Adopt the nonlinear Control of the delayed and linear concept of combination, as shown in Figure 4.Uneven for low-voltage, the output signal of R (s) controller with have 3 times to or 9 times of PWM devices to basic frequency compare.This determine the duty factor of the carrier wave of one of them selecting the redundancy zero vector be positioned on the hexagon of space vector modulation scheme.Uneven for high voltage, take the saturated and delayed class adapter of modulator.The high level of DC link. capacitor is expect for change in voltage, which obviates the operation of Delay control.
The synchronous of carrier modulator and line voltage or load current is absolutely necessary for performing clamp in the not switch region expected.Optimal current clamp can be defined in advance by the Accurate Analysis of load current that should be known.Wherein load current skew along with handled power change significantly when, question blank can be constructed to carry out tuning carrier wave according to the instantaneous power of load process.When load the unknown wherein, an algorithm can be utilized in operation to adjust clamping strategy, and this algorithm predicts strides across the loss of the transistor of a phase branch road.This calculating combines with space vector modulation, correctly to consider the impact of current clamp pattern according to the load compensated.Adopt definition modulation index, can determine discrete voltage space vector relatively instantaneous/transfer.Therefore, this information is combined with the known conductive loss/switching loss characteristic of the semiconductor used, the average conduction loss in a switch periods and switching loss can be calculated.By being stored in the lossy data calculated in each switch periods, the average loss in each transistor device in the electrical network primitive period recursively can be obtained.Finally, after each switching cycle, can perform the adjustment of the variable directly related with Module Dissipation to balance power loss (the duty factor D of switching frequency fs, DC link voltage benchmark uDC_ref, clamping mode and the phase place in these devices
In order to quantize the feasibility of the loss minimize spatial Vector Modulation proposed, emulation is performed to the 3 phase 3 level NPC active filters that rated capacity is 12kVAr.This system adopts 230Vrms/50Hz line voltage to operate under 30kHz switching frequency and 800V DC link.Select 3 level grooves and field stop IGBT power model F3L50R06W1E3_B11, and directly obtain its loss characteristic and thermal model in tables of data.3 phase 12 pulse diode rectifier using constant output current as load are utilized to carry out loss analysis to the nominal operation of active filter.For comparison purposes, analyze three modulation schemes: conventional SPWM method, wherein switch control rule does not reduce; And propose two clamping strategy, one guides (with reference to figure 2b) by the 3 times of guiding of carrier signals to electrical network fundamental frequency (with reference to figure 2 (a)) and another by 9 times of carrier signals to electrical network fundamental frequency.
Fig. 5 and Fig. 6 illustrates the average power consumption distribution and operation junction temperature (TJ) that in bridge branch road, Individual components produce respectively.In figure 6, the constant radiator temperature (THS) of 80 DEG C is taken into account in analysis.The operating system of SPWM modulation is adopted to produce minimum efficiency, because there is total semiconductor losses (PT) for 237W (each power model 79W).By the electric current avoiding switch to have high level, by have 3 times and the clamping strategy of signal guidance of 9 subharmonic patterns obtains loss respectively and reduces 16% and 9.3%.In addition, the operation junction temperature of the top/bottom and inner IGBT or diode is balanced and symmetrical (with reference to figure 6b) well for all bridge branch roads.
The clamping strategy proposed is intended to balance the operation junction temperature and/or power loss that stride across IGBT, the total losses of system is reduced to minimum simultaneously.Therefore, for disclosed example, console switch frequency is strategically selected, and is intended to the modulation scheme proposed for two, and these targets can both successfully realize.In fact, stride across the loss distribution of the assembly of bridge branch road and switching frequency and DC link voltage and operate strong correlation.These variablees and switching loss proportional, and they can use the active filter being optimally designed for particular semiconductor technology together with current clamp scheme.
Note, the clamp scheme proposed can be used for other 3 level VSC topology, such as, T-shaped VSC shown in Fig. 1 d.In part below, present the suitable bypass active filter of being derived by 2 level VSC, 3 level NPC and T-shaped converter.For at switching frequency range being 5kHz to 50kHz and low DC link voltage (U
dC=800V) operation, the efficiency comparison between these converters that the space vector modulation scheme of the optimum clamp in conjunction with phase place that employing proposes is shown.Be considered in the loss analysis that the switching loss of the Commercial semiconductors that 3 phase 12 pulse diode rectifier with constant output current obtain in test setting is measured.
The calculating of the efficiency of 2 level and 3 level active filters makes to compare between the efficiency of the 3 phase bypass active filters that can be at the rated value by 2 level VSC, 3 level NPC and T-shaped converter 12kVAr derivation.3 phase 12 pulse diode rectifier are considered load in the loss analysis of switching loss measured value with the Commercial semiconductors obtained in test setting.
In order to the Accurate Analysis of switching loss, the independent information from tables of data will be not enough to the fair comparison realizing the system studied.Due to the mismatch of voltagerating device in T-shaped topology, if the rated voltage of change of current diode is only 600V, so the conducts energy of 1200V IGBTs will be lower, because QRR is lower significantly.Similarly, if the rated voltage of change of current diode is 1200V, so the conduction loss energy of 600V device will be higher.
The calculating of the active filter topology efficiency produced by the efficiency of each active filter studied herein adopts with disclosed in the 1527-1533 page in the 25th IEEE power application meeting in 2010 and exhibition (APEC) annual meeting journal, M.Schweizer, T.Friedli, and the similar algorithm presented in " the 3 level NPC voltage level link with carborundum and silicon diode are the comparison of converter and the realization (Comparision and implementation of a 3-level npc voltage link back-to-back converter with sic and si diodes) back-to-back " of J.W.Kolar is determined.This calculations incorporated space vector modulation, thus the impact of optimum clamp correctly considered according to by the load compensated.Adopt limit modulation index, discrete voltage space vector instantaneous/transfer can be determined.Therefore, the average conduction loss in a switch periods and switching loss can be calculated.Finally, the average loss in fundamental frequency cycles in each device obtains by the corresponding expression formula on the integration whole principal voltage cycle.
In the figure 7,12kVAr bypass active filter from 2 level VSC, 3 level NPC and T-shaped converter is presented at 5kHz to 50kHz switching frequency range and low DC link voltage level (U
dC=800V) under operation pure semiconductor efficiency.In this is analyzed, when 3 phase 12 pulse diode rectifier considering to have constant output current are load, the lossy data of commercial IGBTs IKW25T120 and IKW30N60T obtained in test setting is used to compare.In order to the calculating of 3 level T-shaped topology efficiency, the algorithm identical with for NPC converter is adopted to solve proposed space vector modulation.
Due to the 1200V device in T-shaped active filter most half DC link voltage instead of in 2 level VSC always 800V time carry out the such fact of the change of current, switching loss is significantly reduced.Therefore, for low switching frequency value, the T-shaped active filter of 3 level has shown the performance more superior than 2 traditional level versions.Compare with 3 level NPC topologys, T-shaped system has lower conduction loss, but has higher switching loss.By this way, in two clamping strategy, the efficiency of T-shaped converter is for the switching frequency up to 10kHz all very remarkable (with reference to figure 7).On the other hand, for the switching frequency of more than 10kHz, 3 level NPC topologys are better.
Fig. 8 a and 8b respectively illustrates the bridge branch road assembly average power consumption distribution operating in 3 level NPC under 40kHz switching frequency and T-shaped active filter.As can be seen, the global switch of T-shaped active filter utilizes is low-down.On the other hand, 3 level NPC active filters achieve remarkable performance, and all semiconductor chips of IGBTs or diode can be made all to operate with similar junction temperature.For T-shaped VSC, under optimum switch utilizes and occurs in low switching frequency (8kHz), in the switching frequency range of 5kHz to 50kHz, its clamping strategy only by having 9 subharmonic patterns reaches.Fig. 8 c shows the T-shaped active filter performance for this operation.
Strategy in this paper is applied to 3 level active filters; But adopt other commercial Application of 3 level VSC, especially such as photovoltaic grid inverters, rectifier, motor driver also can utilize this concept.Modulation strategy in this paper also can combine with active NPC (A-NPC) topology, thus the loss between the assembly not only improving phase branch road distributes, and improves the efficiency of this system.
List of reference signs
1 clamp carrier wave, carrier modulator
2 reality are not between switch region
3 is possible not between switch region
4 space vector modulation
5 active filters
6 nonlinear loads
7 partial voltage control devices
8 current controllers
9 voltage controllers
10 low pass filters
11 electrical networks
12 switching losses (30kHz), solid black vitta
13 conduction losses, the shaded bar in Fig. 5
14PWM modulator
15 Delay control level
16 control levels
172 level
183 level are T-shaped
193 level NPC
The Tj of the balance IGBT of 203 level NPC
The bridge branch road of 21R phase
The bridge branch road of 22S phase
The bridge branch road of 23T phase
24 neutral points
Claims (17)
1. for determining the method for the control program of neutral-point-clamped type (NPC) voltage source converter (VSC) with at least 3 level, described neutral-point-clamped type (NPC) voltage source converter (VSC) specifically bypass active electrical source filter, it has the topology of three bridge branch roads (21-23) between each phase place in three phase places (R, S, T) of electrical network (11) and neutral point (24), each branch road (21-23) comprises at least four active switchs (T1-T4)
Wherein, provide a kind of clamp carrier modulator (1) for control not between switch region synchronous with described electrical network (11),
Described method comprises at least the following step:
I) described electrical network and/or load voltage (I is analyzed
lR) waveform and in the voltage cycle of described electrical network/load, determine the window (3) of 120 °, wherein said window (3) is centered by the positive peak maximum point of described electrical network/load voltage waveform and negative peak maximum point, and described window (3) definition is used for the permission cycle of the not switch of corresponding bridge branch road;
Ii) adopt the clamp carrier modulator frequency that equals 3 subfrequencies of described electrical network/load to operate described voltage source converter or to emulate the operation of described voltage source converter, wherein, if in described window (3), as the function of described clamp carrier modulator, the switch of described corresponding bridge branch road is interrupted and clamp, and then analyzes and stride across the operation junction temperature of described active switch and/or the balance of power loss and the total losses analyzing described voltage source converter;
Iii) adopt the clamp carrier modulator frequency that equals 9 subfrequencies of described electrical network/load to operate described voltage source converter or to emulate the operation of described voltage source converter, wherein, if in described window (3), as the function of described clamp carrier modulator, the described switch of described corresponding bridge branch road is interrupted and clamp, and then analyzes the total losses striding across the operation junction temperature of described active switch and/or the balance of power loss and described voltage source converter;
Iv) comparison step ii) and described balance iii) and described total losses, and according to step I i) or step I ii) the better balance of display as secondary criterion, selects in described clamp carrier modulator frequency as main criteria and lower total losses;
V) the clamp carrier modulator frequency selected by employing operates described voltage source converter or emulates the operation of described voltage source converter, wherein, as the function of described clamp carrier modulator, as long as in described window (3), the described switch of described corresponding bridge branch road is interrupted and clamp, Simultaneous Iteration ground changes at least one in the following operating parameter of described voltage source converter: switching frequency, DC link voltage benchmark, the duty factor of clamp carrier modulator, described clamp carrier modulator is relative to the phase shift of described electrical network, and carry out optimization as the function that these operating parameters adjust and stride across the operation junction temperature of described active switch and/or the total losses of power loss and described voltage source converter, till the optimal operational parameters reaching described control program.
2. the method for claim 1, wherein initial in step v) in, adjust the described phase shift of described clamp carrier modulator relative to described electrical network/load iteratively, to find optimal balance and/or the total losses of described voltage source converter.
3., as the method before as described in any one claim, wherein said voltage source converter is adapted to as bypass voltage source converter.
4. as the method before as described in claim 1 or 2, wherein in order to compensate the imbalance of described DC link voltage, in described window (3), the ratio not between switch region and between switch region between the positive half wave of described electrical network and negative half-wave is set to imbalance.
5., as the method before as described in claim 1 or 2, wherein the bandwidth of current controller (G (s)) elects the bandwidth at least 5 times controlling (H (s)) for main DC link voltage as.
6., as the method before as described in claim 1 or 2, wherein the bandwidth of current controller (G (s)) elects the bandwidth at least 20 times controlling (H (s)) for main DC link voltage as.
7., as the method before as described in claim 1 or 2, wherein the bandwidth of current controller (G (s)) elects the bandwidth at least 50 times or about 50 times controlling (H (s)) for main DC link voltage as.
8., as the method before as described in claim 1 or 2, wherein the bandwidth of local DC link voltage controller (R (s)) elects 1/3rd of at least principal voltage loop as.
9., as the method before as described in claim 1 or 2, wherein the bandwidth of local DC link voltage controller (R (s)) elects 1/5th of at least principal voltage loop as.
10., as the method before as described in claim 1 or 2, wherein said voltage source converter is the T-shaped VSC converter of 3 level or 3 level A-NPC VSC converters.
11. adopt the method carrying out operating voltage source converter according to the determined control program of claim 1 or 2, and described voltage source converter is specially bypass active electrical source filter.
12. as the method before as described in claim 1 or 2, under wherein said converter DC link voltage is operated in the voltage of 300-10000 V scope.
13. as the method before as described in claim 1 or 2, and wherein said converter DC link voltage is operated within the scope of 700-1000 V.
14. as the method before as described in claim 1 or 2, and wherein said converter adopts the switching frequency within the scope of 100 Hz-1 MHz to operate.
15. as the method before as described in claim 1 or 2, and wherein said converter adopts the switching frequency within the scope of 5 kHz-100 kHz to operate.
16. 1 kinds of control methods for voltage source converter, it adopts as the method before as described in any one claim realizes.
17. pairs of uses as the method for claim 1 or 2, are adapted to the control program as photovoltaic grid inverters, rectifier or motor-driven 3 level VSC for determining.
Applications Claiming Priority (4)
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| US13/117972 | 2011-05-27 | ||
| US13/117,972 US8570776B2 (en) | 2011-05-27 | 2011-05-27 | Method and device for determining a control scheme for an active power filter |
| EP11167795.1A EP2528222B1 (en) | 2011-05-27 | 2011-05-27 | Method for the determination of a control scheme for a NPC VSC, in particular as an active power filter |
| EP11167795.1 | 2011-05-27 |
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| WO2021247008A1 (en) * | 2020-06-02 | 2021-12-09 | Innovative Power Solutions, Llc | Adaptive power factor correction (pfc) controller |
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| US9172301B2 (en) | 2013-05-07 | 2015-10-27 | Hamilton Sundstrand Corporation | Synchronous rectification in the three-level inverter-converter topologies |
| DE102013222166B4 (en) * | 2013-10-31 | 2022-07-07 | Continental Teves Ag & Co. Ohg | Method of operating a polyphase electric motor |
| CN108377104B (en) * | 2018-03-15 | 2020-02-28 | 浙江大学 | Space vector control method applied to hybrid three-phase three-level active neutral point clamped converter |
| CN108650127B (en) * | 2018-05-10 | 2021-04-06 | 石家庄科林电气股份有限公司 | Automatic identification method for distribution transformer area power grid based on one-line bus mode |
| CN108880308B (en) * | 2018-07-27 | 2020-10-09 | 深圳市盛弘电气股份有限公司 | Direct-current bus balancing method and system of three-level inverter |
| CN110971135B (en) * | 2018-09-29 | 2021-07-13 | 中车株洲电力机车研究所有限公司 | Three-level full-bridge direct-current converter and control method thereof |
| CN110912134A (en) * | 2019-11-29 | 2020-03-24 | 中国船舶重工集团公司第七一九研究所 | Multi-level active power filter with low harmonic content |
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| CN1241062A (en) * | 1998-07-02 | 2000-01-12 | Abb研究有限公司 | Three-point converter and method for its operation |
| EP2323249A1 (en) * | 2009-11-16 | 2011-05-18 | General Electric Company | Multilevel converter operation |
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| CN1241062A (en) * | 1998-07-02 | 2000-01-12 | Abb研究有限公司 | Three-point converter and method for its operation |
| EP2323249A1 (en) * | 2009-11-16 | 2011-05-18 | General Electric Company | Multilevel converter operation |
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| WO2021247008A1 (en) * | 2020-06-02 | 2021-12-09 | Innovative Power Solutions, Llc | Adaptive power factor correction (pfc) controller |
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