CN102791075A - Manufacture method of loader with three-dimensional inductance and structure of loader - Google Patents
Manufacture method of loader with three-dimensional inductance and structure of loader Download PDFInfo
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- CN102791075A CN102791075A CN2011101347434A CN201110134743A CN102791075A CN 102791075 A CN102791075 A CN 102791075A CN 2011101347434 A CN2011101347434 A CN 2011101347434A CN 201110134743 A CN201110134743 A CN 201110134743A CN 102791075 A CN102791075 A CN 102791075A
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Abstract
The invention relates to a manufacture method of a loader with three-dimensional inductance and a structure of the loader. The manufacture method of the loader with three-dimensional inductance comprises the following steps that a base plate is provided; a first light resistance layer is formed; the first light resistance layer is patternized; a first metal layer is formed, and the first metal layer is provided with a plurality of first inductance parts with first height; the first light resistance layer is removed; a first dielectric layer is formed; a second light resistance layer is formed; the second light resistance layer is patternized; a second metal layer is formed, and the second metal layer is provided with a second inductance part with second height, a plurality of third inductance parts with third height and a plurality of fourth inductance parts with fourth height; the second light resistance layer is removed; a second dielectric layer is formed; a third light resistance layer is formed; and the third light resistance layer is patternized, and a third metal layer is provided with a fifth inductance part with fifth height and a plurality of sixth inductance parts with sixth height, wherein the second height, the third height and the fourth height are greater than the first height, the fifth height and the sixth height.
Description
Technical field
The present invention relates to a kind of carrier manufacture method, particularly relate to a kind of carrier manufacture method and structure thereof with three-dimensional inductance.
Background technology
Mostly the inductance of existing convention is planar inductor; It is to design inductive patterns and line pattern at grade; And since inductance and circuit when same plane; Must overcome the problem of parasitic capacitance, therefore cause the size of chip to dwindle, and planar inductor can't surround several circles and only can become the turbine-like radius to become big structure with same radius.
This shows that above-mentioned existing inductance obviously still has inconvenience and defective, and demands urgently further improving in product structure and use.In order to solve the problem of above-mentioned existence; Relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly; But do not see always that for a long time suitable design is developed completion, and common product does not have appropriate structure to address the above problem, this obviously is the problem that the anxious desire of relevant dealer solves.Therefore how to found a kind of new carrier manufacture method and structure thereof with three-dimensional inductance, real one of the current important research and development problem that belongs to, also becoming the current industry utmost point needs improved target.
Summary of the invention
The objective of the invention is to, overcome the defective that existing inductance exists, and a kind of new carrier manufacture method and structure thereof with three-dimensional inductance are provided; Technical problem to be solved is to make its design through three-dimensional inductance; Can reduce conplane wiring area, and the size that therefore can further dwindle chip, in addition; Because three-dimensional inductance is the design of Different Plane; Thereby the flow direction of inductance is also by vertically becoming level, and it helps to cover the designs such as electromagnetic coupled of covering crystal module in the brilliant technology, is very suitable for practicality.
The object of the invention and solve its technical problem and adopt following technical scheme to realize.A kind of carrier manufacture method according to the present invention's proposition with three-dimensional inductance; It comprises the following step at least: a substrate is provided; This substrate has a surface, one first weld pad and an overcoat; This first weld pad is arranged at this surface; This overcoat is formed at this surface, and this overcoat has one first welding pad opening, one first and connect a setting area and a plurality of first inductance department setting area, and this first welding pad opening is that to appear this first weld pad and this first welding pad opening be to be positioned at this first to connect a setting area; Form one first photoresist layer in this overcoat; This first photoresist layer of patterning to be forming one first opening and a plurality of first inductance department slotted eye, and this first opening is to appear this first to connect a setting area, and those first inductance department slotted eyes are to appear those first inductance department setting areas; Form a first metal layer in this first opening and those first inductance department slotted eyes; So that this first metal layer has one first connection pad and a plurality of first inductance department; Respectively this first inductance department has one first connection end point and one second connection end point, and this first inductance department has one first height; Remove this first photoresist layer; Form one first dielectric layer in this overcoat and cover this first metal layer; This first dielectric layer has one first connection pad opening, a plurality of first connection end point opening and a plurality of second connection end point opening; This first connection pad opening is to appear this first connection pad; Respectively this first connection end point opening is to appear respectively this first connection end point, and respectively this second connection end point opening is to appear respectively this second connection end point; Form one second photoresist layer in this first dielectric layer; One second inductance department is provided with the hole to this second photoresist layer of patterning, the hole is set a plurality of the 3rd inductance department and a plurality of the 4th inductance department is provided with the hole to form; It is to appear this first connection pad that this second inductance department is provided with the hole; Respectively the hole is set is to appear respectively this first connection end point to the 3rd inductance department, and respectively the hole is set is to appear respectively this second connection end point to the 4th inductance department; Form one second metal level in this second inductance department the hole is set, the hole is set those the 3rd inductance departments and those the 4th inductance departments are provided with the hole; So that this second metal level has one second inductance department, a plurality of the 3rd inductance department and a plurality of the 4th inductance department; This second inductance department connects this first connection pad and this second inductance department has one first end face and one second height; Respectively the 3rd inductance department connect respectively this second connection end point and respectively the 3rd inductance department have one second end face and one the 3rd height; Respectively the 4th inductance department connect respectively this first connection end point and respectively the 4th inductance department have one the 3rd end face and one the 4th height, this second height, the 3rd height and the 4th highly are greater than this first highly; Remove this second photoresist layer; Form one second dielectric layer in this first dielectric layer and cover this second metal level; This second dielectric layer has that one second inductance department appears the hole, a plurality of the 3rd inductance department appears the hole and a plurality of the 4th inductance department appears the hole; It is to appear this first end face that this second inductance department appears the hole; Respectively to appear the hole be to appear respectively this second end face to the 3rd inductance department, and respectively to appear the hole be to appear respectively the 3rd end face to the 4th inductance department; Form one the 3rd photoresist layer in this second dielectric layer; Patterning the 3rd photoresist layer is to form one the 5th inductance department slotted eye is set and a plurality of the 6th inductance department is provided with slotted eye; It is to appear this first end face and this second end face that the 5th inductance department is provided with slotted eye, and respectively slotted eye is set is to appear respectively this second end face and the 3rd end face respectively to the 6th inductance department; And form one the 3rd metal level and slotted eye is set and those the 6th inductance departments are provided with slotted eye in the 5th inductance department; So that the 3rd metal level has one the 5th inductance department and a plurality of the 6th inductance department; The 5th inductance department connects this second inductance department and the 3rd inductance department; Respectively the 6th inductance department connects the 3rd inductance department and the 4th inductance department; The 5th inductance department has one the 5th height, and respectively the 6th inductance department has one the 6th height, and this second height, the 3rd height and the 4th highly are greater than the 5th height and the 6th height.
The object of the invention and solve its technical problem and also can adopt following technical measures further to realize.
Aforesaid carrier manufacture method with three-dimensional inductance, its include in addition one be formed at this overcoat second connection pad, this substrate has one second weld pad in addition, this second connection pad is to electrically connect this second weld pad.
Aforesaid carrier manufacture method with three-dimensional inductance, wherein said second metal level has one the 7th inductance department, and this second connection pad is to connect the 7th inductance department.
Aforesaid carrier manufacture method with three-dimensional inductance, wherein said the 3rd metal level has one the 8th inductance department, and the 8th inductance department is to connect the 7th inductance department and the 4th inductance department.
Aforesaid carrier manufacture method with three-dimensional inductance, its include in addition one be formed at this second dielectric layer second connection pad, the 3rd metal level has one the 8th inductance department, the 8th inductance department is to connect this second connection pad and the 4th inductance department.
Aforesaid carrier manufacture method with three-dimensional inductance, it includes in addition: the step that removes the 3rd photoresist layer.
Aforesaid carrier manufacture method with three-dimensional inductance, it includes in addition: form one the 3rd dielectric layer in the step of this second dielectric layer, the 3rd dielectric layer is to cover the 3rd metal level.
Aforesaid carrier manufacture method with three-dimensional inductance, it includes in addition: form nickel gold overcoat in the step of the 3rd metal level.
The object of the invention and solve its technical problem and also adopt following technical scheme to realize.A kind of carrier structure according to the present invention's proposition with three-dimensional inductance; It comprises at least: a substrate; It has a surface, one first weld pad and an overcoat; This first weld pad is arranged at this surface, and this overcoat is formed at this surface, and this overcoat has one first welding pad opening and this first welding pad opening is to appear this first weld pad; One the first metal layer, it is formed at this overcoat, and this first metal layer has one first connection pad and a plurality of first inductance department, and respectively this first inductance department has one first connection end point and one second connection end point, and this first inductance department has one first height; One first dielectric layer; It is formed at this overcoat and covers this first metal layer; This first dielectric layer has one first connection pad opening, a plurality of first connection end point opening and a plurality of second connection end point opening; This first connection pad opening is to appear this first connection pad, and respectively this first connection end point opening is to appear respectively this first connection end point, and respectively this second connection end point opening is to appear respectively this second connection end point; One second metal level; It is formed at this first dielectric layer; This second metal level has one second inductance department, a plurality of the 3rd inductance department and a plurality of the 4th inductance department; This second inductance department connects this first connection pad and this second inductance department has one first end face and one second height; Respectively the 3rd inductance department connect respectively this first connection end point and respectively the 3rd inductance department have one second end face and one the 3rd height, respectively the 4th inductance department connect respectively this second connection end point and respectively the 4th inductance department have one the 3rd end face and one the 4th height, this second height, the 3rd height and the 4th highly are greater than this first highly; One second dielectric layer; It is formed at this first dielectric layer and covers this second metal level; This second dielectric layer has that one second inductance department appears the hole, a plurality of the 3rd inductance department appears the hole and a plurality of the 4th inductance department appears the hole; It is to appear this first end face that this second inductance department appears the hole, and respectively to appear the hole be to appear respectively this second end face to the 3rd inductance department, and respectively to appear the hole be to appear respectively the 3rd end face to the 4th inductance department; And one the 3rd metal level; It is formed at this second dielectric layer, and the 3rd metal level has one the 5th inductance department and a plurality of the 6th inductance department, and the 5th inductance department connects this second inductance department and the 3rd inductance department; Respectively the 6th inductance department connects the 3rd inductance department and the 4th inductance department; The 5th inductance department has one the 5th height, and respectively the 6th inductance department has one the 6th height, and this second height, the 3rd height and the 4th highly are greater than the 5th height and the 6th height.
The object of the invention and solve its technical problem and also can adopt following technical measures further to realize.
Aforesaid carrier structure with three-dimensional inductance, its include in addition one be formed at this overcoat second connection pad, this substrate has one second weld pad in addition, this second connection pad is to electrically connect this second weld pad.
The present invention compared with prior art has tangible advantage and beneficial effect.By technique scheme; Carrier manufacture method and structure thereof that the present invention has three-dimensional inductance have advantage and beneficial effect at least: because inductance of the present invention is three-dimensional inductance, it has the effect that reduces conplane wiring area, so the size of chip can further be dwindled; In addition; Because three-dimensional inductance is the design of Different Plane, so the flow direction of inductance helps to cover the designs such as electromagnetic coupled of covering crystal module in the brilliant technology also by vertically becoming level.
In sum, the present invention is a kind of carrier manufacture method and structure thereof with three-dimensional inductance.The carrier manufacture method of the three-dimensional inductance of this tool comprises: a substrate is provided; Form one first photoresist layer; Patterning first photoresist layer; Form a first metal layer and make the first metal layer have a plurality of first inductance departments with first height; Remove first photoresist layer; Form one first dielectric layer; Form one second photoresist layer; Patterning second photoresist layer; Form one second metal level and make second metal level have second inductance department of second height, a plurality of the 3rd inductance department and a plurality of the 4th inductance department with the 4th height with the 3rd height; Remove second photoresist layer; Form one second dielectric layer; Form one the 3rd photoresist layer; Patterning the 3rd photoresist layer also makes the 3rd metal level have the 5th inductance department and a plurality of the 6th inductance department with the 6th height of the 5th height, and wherein second height, the 3rd height and the 4th height are greater than first height, the 5th height and the 6th height.The present invention has obvious improvement technically, has tangible good effect, really is the new design of a novelty, progress, practicality.
Above-mentioned explanation only is the general introduction of technical scheme of the present invention; Understand technological means of the present invention in order can more to know; And can implement according to the content of specification, and for let of the present invention above-mentioned with other purposes, feature and advantage can be more obviously understandable, below special act preferred embodiment; And conjunction with figs., specify as follows.
Description of drawings
Figure 1A-Fig. 1 P is a kind of stereogram with carrier manufacture method of three-dimensional inductance according to a preferred embodiment of the present invention.
Fig. 2 A-Fig. 2 P has the schematic cross-section of the carrier manufacture method of three-dimensional inductance according to this of a preferred embodiment of the present invention.
Fig. 3 is the schematic cross-section that has the carrier structure of three-dimensional inductance according to the another kind of another preferred embodiment of the present invention.
Fig. 4 has the schematic cross-section of the carrier structure of three-dimensional inductance according to another of another preferred embodiment of the present invention.
Fig. 5 has the stereogram of the carrier structure of three-dimensional inductance according to another of a preferred embodiment more of the present invention.
100: the carrier structure 110 with three-dimensional inductance: substrate
111: 112: the first weld pads in surface
113: overcoat 113a: first welding pad opening
113b: first connects a setting area 113c: the first inductance department setting area
120: the first photoresist layers of 114: the second weld pads
122: the first inductance department slotted eyes of 121: the first openings
130: 131: the first connection pads of the first metal layer
132: the first inductance department 132a: first connection end point
132b: second connection end point 133: the first metal layer surface
141: the first connection pad openings of 140: the first dielectric layers
143: the second connection end point openings of 142: the first connection end point openings
150: the second photoresist layers in 144: the first dielectric layer surfaces
151: the second inductance departments are provided with 152: the three inductance departments in hole the hole are set
Inductance department was provided with 160: the second metal levels in hole in 153: the four
161: the second inductance department 161a: first end face
162: the three inductance department 162a: second end face
163: the four inductance department 163a: the 3rd end face
170: the second dielectric layers of 164: the seven inductance departments
171: the second inductance departments appear 172: the three inductance departments in hole and appear the hole
Inductance department appeared 174: the second dielectric layer surfaces, hole in 173: the four
181: the five inductance departments of 180: the three photoresist layers are provided with slotted eye
Inductance department was provided with 190: the three metal levels of slotted eye in 182: the six
192: the six inductance departments of 191: the five inductance departments
194: the eight inductance departments of 193: the second layer on surface of metal
D: the 3rd dielectric layer D1: the 5th inductance department appears slotted eye
D2: the 6th inductance department appears slotted eye D3: the 3rd dielectric layer surface
H1: 2: the second height of first height H
H3: 4: the four height of the 3rd height H
H5: 6: the six height of the 5th height H
M: nickel gold protective layer P: second connection pad
S: scolder protective layer
Embodiment
Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention; Below in conjunction with accompanying drawing and preferred embodiment; To the carrier manufacture method with three-dimensional inductance and its embodiment of structure, method, step, structure, characteristic and the effect thereof that proposes according to the present invention, specify as after.
Relevant aforementioned and other technology contents, characteristics and effect of the present invention can be known to appear in the following detailed description that cooperates with reference to graphic preferred embodiment.Explanation through embodiment; Should be to reach technological means that predetermined purpose takes and effect to obtain one more deeply and concrete understanding to the present invention; Yet the appended graphic usefulness that only provides reference and explanation is not to be used for the present invention is limited.
See also shown in Figure 1A to Fig. 1 P and Fig. 2 A to Fig. 2 P, Figure 1A-Fig. 1 P is a kind of stereogram with carrier manufacture method of three-dimensional inductance according to a preferred embodiment of the present invention.Fig. 2 A-Fig. 2 P has the schematic cross-section of the carrier manufacture method of three-dimensional inductance according to this of a preferred embodiment of the present invention.A kind of carrier manufacture method of a preferred embodiment of the present invention with three-dimensional inductance; It comprises the following step at least: at first; See also shown in Figure 1A and Fig. 2 A; One substrate 110 is provided; This substrate 110 has surface 111,1 first weld pad 112 and an overcoat 113, and this first weld pad 112 is to be arranged at this surface 111, and this overcoat 113 is to be formed at this surface 111; And this overcoat 113 has one first welding pad opening 113a, one first and connects a setting area 113b and a plurality of first inductance department setting area 113c; This first welding pad opening 113a appears this first weld pad 112 and this first welding pad opening 113a to be positioned at this first to connect a setting area 113b, the material of this substrate 110 can be selected from aluminum oxide substrate, aluminium nitride substrate, GaAs substrate or glass substrate one of them, this overcoat can be protective layer (passivation layer) or repeats protective layer (repassivation layer); Then, see also shown in Figure 1B and Fig. 2 B, form one first photoresist layer 120 in this overcoat 113; Then; See also shown in Fig. 1 C and Fig. 2 C; This first photoresist layer 120 of patterning is to form one first opening 121 and a plurality of first inductance department slotted eye 122; This first opening 121 is to appear this first to connect a setting area 113b, and those first inductance department slotted eyes 122 are to appear those first inductance departments setting area 113c; Afterwards; See also shown in Fig. 1 D and Fig. 2 D; Form a first metal layer 130 in this first opening 121 and those first inductance department slotted eyes 122; So that this first metal layer 130 has one first connection pad 131 and a plurality of first inductance department 132, respectively this first inductance department 132 has one first connection end point 132a and one second connection end point 132b, and this first inductance department 132 has one first height H 1; Then, see also shown in Fig. 1 E and Fig. 2 E, remove this first photoresist layer 120; Afterwards; See also shown in Fig. 1 F and Fig. 2 F, form one first dielectric layer 140 in this overcoat 113 and cover this first metal layer 130, this first dielectric layer 140 has one first connection pad opening 141, a plurality of first connection end point opening 142 and a plurality of second connection end point opening 143; This first connection pad opening 141 is to appear this first connection pad 131; Respectively this first connection end point opening 142 is to appear respectively this first connection end point 132a, and respectively this second connection end point opening 143 is to appear respectively this second connection end point 132b, in addition; In the present embodiment; This first dielectric layer 140 has one first dielectric layer surface 144 in addition, and this first metal layer 130 has the first metal layer surface 133 in addition, this first dielectric layer surface 144 and this first metal layer surface 133 coplines; Then, see also shown in Fig. 1 G and Fig. 2 G, form one second photoresist layer 150 in this first dielectric layer 140; Afterwards; See also shown in Fig. 1 H and Fig. 2 H; One second inductance department is provided with hole 151 to this second photoresist layer 150 of patterning, hole 152 is set a plurality of the 3rd inductance department and a plurality of the 4th inductance department is provided with hole 153 to form; It is to appear this first connection pad 131 that this second inductance department is provided with hole 151, and respectively hole 152 is set is to appear respectively this first connection end point 132a to the 3rd inductance department, and respectively hole 153 is set is to appear respectively this second connection end point 132b to the 4th inductance department; Then; See also shown in Fig. 1 I and Fig. 2 I; Form one second metal level 160 in this second inductance department hole 151 is set, hole 152 is set those the 3rd inductance departments and those the 4th inductance departments are provided with hole 153; So that this second metal level 160 has one second inductance department 161, a plurality of the 3rd inductance department 162 and a plurality of the 4th inductance department 163; This second inductance department 161 is that this first connection pad 131 of connection and this second inductance department 161 have one first end face 161a and one second height H 2; Respectively the 3rd inductance department 162 be connect respectively this second connection end point 132b and respectively the 3rd inductance department 162 have one second end face 162a and one the 3rd height H 3; Respectively the 4th inductance department 163 be connect respectively this first connection end point 132a and respectively the 4th inductance department 163 have one the 3rd end face 163a and one the 4th height H 4, this second height H 2, the 3rd height H 3 and the 4th height H 4 are greater than this first height H 1; Afterwards, see also shown in Fig. 1 J and Fig. 2 J, remove this second photoresist layer 150; Then; See also shown in Fig. 1 K and Fig. 2 K; Form one second dielectric layer 170 in this first dielectric layer 140 and cover this second metal level 160; This second dielectric layer 170 has that one second inductance department appears hole 171, a plurality of the 3rd inductance department appears hole 172 and a plurality of the 4th inductance department appears hole 173, and it is to appear this first end face 161a that this second inductance department appears hole 171, and respectively to appear hole 172 be to appear respectively this second end face 162a to the 3rd inductance department; Respectively to appear hole 173 be to appear respectively the 3rd end face 163a to the 4th inductance department; In the present embodiment, this second dielectric layer 170 has one second dielectric layer surface 174 in addition, this first end face 161a, this second end face 162a, the 3rd end face 163a and this second dielectric layer surface 174 coplines; Afterwards, see also shown in Fig. 1 L and Fig. 2 L, form one the 3rd photoresist layer 180 in this second dielectric layer 170; Then; See also shown in Fig. 1 M and Fig. 2 M; Patterning the 3rd photoresist layer 180 is to form one the 5th inductance department slotted eye 181 is set and a plurality of the 6th inductance department is provided with slotted eye 182; It is to appear this first end face 161a and this second end face 162a that the 5th inductance department is provided with slotted eye 181, and respectively slotted eye 182 is set is to appear respectively this second end face 162a and the 3rd end face 163a respectively to the 6th inductance department; Afterwards; See also shown in Fig. 1 N and Fig. 2 N; Form one the 3rd metal level 190 and slotted eye 181 is set and those the 6th inductance departments are provided with slotted eye 182 in the 5th inductance department; So that the 3rd metal level 190 has one the 5th inductance department 191 and a plurality of the 6th inductance department 192; The 5th inductance department 191 is to connect this second inductance department 161 and the 3rd inductance department 162, and respectively the 6th inductance department 192 is that connection the 3rd inductance department 162 and the 4th inductance department 163, the five inductance departments 191 have one the 5th height H 5; Respectively the 6th inductance department 192 has one the 6th height H 6, and this second height H 2, the 3rd height H 3 and the 4th height H 4 are greater than the 5th height H 5 and the 6th height H 6; Then, see also Figure 10 and shown in Figure 20, remove the 3rd photoresist layer 180; At last; See also shown in Fig. 1 P and Fig. 2 P; Form one the 3rd dielectric layer D in this second dielectric layer 170 and cover the 3rd metal level 190, the three dielectric layer D and have that one the 5th inductance department appears slotted eye D1 and a plurality of the 6th inductance departments appear slotted eye D2, the 5th inductance department appears slotted eye D1 and appears the 5th inductance department 191; Respectively the 6th inductance department appear slotted eye D2 be appear the 6th inductance department 192 respectively with form one have a three-dimensional inductance carrier structure 100; In the present embodiment, the 3rd dielectric layer D has one the 3rd dielectric layer surface D3 in addition, and the 3rd metal level 190 has one second layer on surface of metal 193 in addition; The 3rd dielectric layer surface D3 and this second layer on surface of metal, 193 coplines; Perhaps, see also shown in Figure 3ly, Fig. 3 is the schematic cross-section that the another kind according to another preferred embodiment of the present invention has the carrier structure of three-dimensional inductance.In another embodiment; It can form nickel gold protective layer M and form the 3rd dielectric layer D in the step of this second dielectric layer 170 in the 3rd metal level 190 to replace; Preferably; See also shown in Figure 4ly, Fig. 4 has the schematic cross-section of the carrier structure of three-dimensional inductance according to another of another preferred embodiment of the present invention.In another embodiment, it more can form a scolder protective layer S on this nickel gold protective layer M, the material of this scolder protective layer can be scolder or lead-free solder one of them.
In addition, please consult again shown in Fig. 1 P, this carrier structure 100 with three-dimensional inductance include in addition one be formed at this overcoat 113 the second connection pad P; Please consult shown in Figure 1A again; This substrate 110 has one second weld pad 114 in addition, and this second connection pad P electrically connects this second weld pad 114, and please consults shown in Fig. 1 P again; This second metal level 160 has one the 7th inductance department 164; The 3rd metal level 190 has one the 8th inductance department 194, and this second connection pad P is that connection the 7th inductance department 164, the eight inductance departments 194 are to connect the 7th inductance department 164 and the 4th inductance department 163.Perhaps, see also shown in Figure 5ly, Fig. 5 has the stereogram of the carrier structure of three-dimensional inductance according to another of a preferred embodiment more of the present invention.In another embodiment, this second connection pad P is that the 8th inductance department 194 that is formed at these second dielectric layer, 170, the three metal levels 190 is to connect this second connection pad P and the 4th inductance department 163.Inductance of the present invention is three-dimensional inductance; It has the effect that reduces conplane wiring area; Therefore the size of chip can further be dwindled, in addition, because three-dimensional inductance is the design of Different Plane; Therefore the flow direction of inductance helps to cover the designs such as electromagnetic coupled of covering crystal module in the brilliant technology also by vertically becoming level.
This carrier structure 100 with three-dimensional inductance includes a substrate 110, a first metal layer 130, one first dielectric layer 140, one second metal level 160, one second dielectric layer 170, one the 3rd metal level 190 and one second connection pad P; This substrate 110 has a surface 111,1 first weld pad 112, an overcoat 113 and one second weld pad 114; This first weld pad 112 is arranged at this surface 111; This overcoat 113 is to be formed at this surface 111; This overcoat 113 has one first welding pad opening 113a and this first welding pad opening 113a appears this first weld pad 112; This first metal layer 130 is to be formed at this overcoat 113, and this first metal layer 130 has one first connection pad 131 and a plurality of first inductance department 132, and respectively this first inductance department 132 has one first connection end point 132a and one second connection end point 132b; And this first inductance department 132 has one first height H 1; This first dielectric layer 140 is to be formed at this overcoat 113 and to cover this first metal layer 130, and this first dielectric layer 140 has one first connection pad opening 141, a plurality of first connection end point opening 142 and a plurality of second connection end point opening 143, and this first connection pad opening 141 is to appear this first connection pad 131; Respectively this first connection end point opening 142 is to appear respectively this first connection end point 132a; Respectively this second connection end point opening 143 is to appear respectively this second connection end point 132b, and this second metal level 160 is to be formed at this first dielectric layer 140, and this second metal level 160 has one second inductance department 161, a plurality of the 3rd inductance department 162 and a plurality of the 4th inductance department 163; This second inductance department 161 connects this first connection pad 131 and this second inductance department 161 has one first end face 161a and one second height H 2; Respectively the 3rd inductance department 162 connect respectively this first connection end point 132a and respectively the 3rd inductance department 162 have one second end face 162a and one the 3rd height H 3, respectively the 4th inductance department 163 connect respectively this second connection end point 132b and respectively the 4th inductance department 163 have one the 3rd end face 163a and one the 4th height H 4, this second height H 2, the 3rd height H 3 and the 4th height H 4 are greater than this first height H 1; This second dielectric layer 170 is to be formed at this first dielectric layer 140 and to cover this second metal level 160; This second dielectric layer 170 has that one second inductance department appears hole 171, a plurality of the 3rd inductance department appears hole 172 and a plurality of the 4th inductance department appears hole 173, and it is to appear this first end face 161a that this second inductance department appears hole 171, and respectively to appear hole 172 be to appear respectively this second end face 162a to the 3rd inductance department; Respectively to appear hole 173 be to appear respectively the 3rd end face 163a to the 4th inductance department; The 3rd metal level 190 is to be formed at these second dielectric layer, 170, the three metal levels 190 to have one the 5th inductance department 191 and a plurality of the 6th inductance department 192, the five inductance departments 191 this second inductance department 161 of connection and the 3rd inductance departments 162; Respectively the 6th inductance department 192 connects the 3rd inductance department 162 and the 4th inductance department 163; The 5th inductance department 191 has one the 5th height H 5, and respectively the 6th inductance department 192 has one the 6th height H 6, and this second height H 2, the 3rd height H 3 and the 4th height H 4 are greater than the 5th height H 5 and the 6th height H 6.In addition; Please consult shown in Fig. 1 P again; This second connection pad P electrically connects this second weld pad 114, and this second metal level 160 has one the 7th inductance department, 164, the three metal levels 190 and has one the 8th inductance department 194; This second connection pad P is that connection the 7th inductance department 164, the eight inductance departments 194 are to connect the 7th inductance department 164 and the 4th inductance department 163.Perhaps, see also shown in Figure 5ly, in another embodiment, this second connection pad P is that the 8th inductance department 194 that is formed at these second dielectric layer, 170, the three metal levels 190 is to connect this second connection pad P and the 4th inductance department 163.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction; Though the present invention discloses as above with preferred embodiment; Yet be not in order to limiting the present invention, anyly be familiar with the professional and technical personnel, in not breaking away from technical scheme scope of the present invention; When the technology contents of above-mentioned announcement capable of using is made a little change or is modified to the equivalent embodiment of equivalent variations; In every case be not break away from technical scheme content of the present invention, to any simple modification, equivalent variations and modification that above embodiment did, all still belong in the scope of technical scheme of the present invention according to technical spirit of the present invention.
Claims (10)
1. carrier manufacture method with three-dimensional inductance is characterized in that it may further comprise the steps:
One substrate is provided; This substrate has a surface, one first weld pad and an overcoat; This first weld pad is arranged at this surface; This overcoat is formed at this surface, and this overcoat has one first welding pad opening, one first and connect a setting area and a plurality of first inductance department setting area, and this first welding pad opening is that to appear this first weld pad and this first welding pad opening be to be positioned at this first to connect a setting area;
Form one first photoresist layer in this overcoat;
This first photoresist layer of patterning to be forming one first opening and a plurality of first inductance department slotted eye, and this first opening is to appear this first to connect a setting area, and those first inductance department slotted eyes are to appear those first inductance department setting areas;
Form a first metal layer in this first opening and those first inductance department slotted eyes; So that this first metal layer has one first connection pad and a plurality of first inductance department; Respectively this first inductance department has one first connection end point and one second connection end point, and this first inductance department has one first height;
Remove this first photoresist layer;
Form one first dielectric layer in this overcoat and cover this first metal layer; This first dielectric layer has one first connection pad opening, a plurality of first connection end point opening and a plurality of second connection end point opening; This first connection pad opening is to appear this first connection pad; Respectively this first connection end point opening is to appear respectively this first connection end point, and respectively this second connection end point opening is to appear respectively this second connection end point;
Form one second photoresist layer in this first dielectric layer;
One second inductance department is provided with the hole to this second photoresist layer of patterning, the hole is set a plurality of the 3rd inductance department and a plurality of the 4th inductance department is provided with the hole to form; It is to appear this first connection pad that this second inductance department is provided with the hole; Respectively the hole is set is to appear respectively this first connection end point to the 3rd inductance department, and respectively the hole is set is to appear respectively this second connection end point to the 4th inductance department;
Form one second metal level in this second inductance department the hole is set, the hole is set those the 3rd inductance departments and those the 4th inductance departments are provided with the hole; So that this second metal level has one second inductance department, a plurality of the 3rd inductance department and a plurality of the 4th inductance department; This second inductance department connects this first connection pad and this second inductance department has one first end face and one second height; Respectively the 3rd inductance department connect respectively this second connection end point and respectively the 3rd inductance department have one second end face and one the 3rd height; Respectively the 4th inductance department connect respectively this first connection end point and respectively the 4th inductance department have one the 3rd end face and one the 4th height, this second height, the 3rd height and the 4th highly are greater than this first highly;
Remove this second photoresist layer;
Form one second dielectric layer in this first dielectric layer and cover this second metal level; This second dielectric layer has that one second inductance department appears the hole, a plurality of the 3rd inductance department appears the hole and a plurality of the 4th inductance department appears the hole; It is to appear this first end face that this second inductance department appears the hole; Respectively to appear the hole be to appear respectively this second end face to the 3rd inductance department, and respectively to appear the hole be to appear respectively the 3rd end face to the 4th inductance department;
Form one the 3rd photoresist layer in this second dielectric layer;
Patterning the 3rd photoresist layer is to form one the 5th inductance department slotted eye is set and a plurality of the 6th inductance department is provided with slotted eye; It is to appear this first end face and this second end face that the 5th inductance department is provided with slotted eye, and respectively slotted eye is set is to appear respectively this second end face and the 3rd end face respectively to the 6th inductance department; And
Form one the 3rd metal level and slotted eye is set and those the 6th inductance departments are provided with slotted eye in the 5th inductance department; So that the 3rd metal level has one the 5th inductance department and a plurality of the 6th inductance department; The 5th inductance department connects this second inductance department and the 3rd inductance department; Respectively the 6th inductance department connects the 3rd inductance department and the 4th inductance department; The 5th inductance department has one the 5th height, and respectively the 6th inductance department has one the 6th height, and this second height, the 3rd height and the 4th highly are greater than the 5th height and the 6th height.
2. the carrier manufacture method with three-dimensional inductance according to claim 1, it is characterized in that its include in addition one be formed at this overcoat second connection pad, this substrate has one second weld pad in addition, this second connection pad is to electrically connect this second weld pad.
3. the carrier manufacture method with three-dimensional inductance according to claim 2 is characterized in that wherein said second metal level has one the 7th inductance department, and this second connection pad is to connect the 7th inductance department.
4. the carrier manufacture method with three-dimensional inductance according to claim 3 is characterized in that wherein said the 3rd metal level has one the 8th inductance department, and the 8th inductance department is to connect the 7th inductance department and the 4th inductance department.
5. the carrier manufacture method with three-dimensional inductance according to claim 1; It is characterized in that its include in addition one be formed at this second dielectric layer second connection pad; The 3rd metal level has one the 8th inductance department, and the 8th inductance department is to connect this second connection pad and the 4th inductance department.
6. the carrier manufacture method with three-dimensional inductance according to claim 1 is characterized in that it includes in addition: the step that removes the 3rd photoresist layer.
7. the carrier manufacture method with three-dimensional inductance according to claim 1 is characterized in that it includes in addition: form one the 3rd dielectric layer in the step of this second dielectric layer, the 3rd dielectric layer is to cover the 3rd metal level.
8. the carrier manufacture method with three-dimensional inductance according to claim 1 is characterized in that it includes in addition: form nickel gold overcoat in the step of the 3rd metal level.
9. carrier structure with three-dimensional inductance is characterized in that it comprises at least:
One substrate, it has a surface, one first weld pad and an overcoat, and this first weld pad is arranged at this surface, and this overcoat is formed at this surface, and this overcoat has one first welding pad opening and this first welding pad opening is to appear this first weld pad;
One the first metal layer, it is formed at this overcoat, and this first metal layer has one first connection pad and a plurality of first inductance department, and respectively this first inductance department has one first connection end point and one second connection end point, and this first inductance department has one first height;
One first dielectric layer; It is formed at this overcoat and covers this first metal layer; This first dielectric layer has one first connection pad opening, a plurality of first connection end point opening and a plurality of second connection end point opening; This first connection pad opening is to appear this first connection pad, and respectively this first connection end point opening is to appear respectively this first connection end point, and respectively this second connection end point opening is to appear respectively this second connection end point;
One second metal level; It is formed at this first dielectric layer; This second metal level has one second inductance department, a plurality of the 3rd inductance department and a plurality of the 4th inductance department; This second inductance department connects this first connection pad and this second inductance department has one first end face and one second height; Respectively the 3rd inductance department connect respectively this first connection end point and respectively the 3rd inductance department have one second end face and one the 3rd height, respectively the 4th inductance department connect respectively this second connection end point and respectively the 4th inductance department have one the 3rd end face and one the 4th height, this second height, the 3rd height and the 4th highly are greater than this first highly;
One second dielectric layer; It is formed at this first dielectric layer and covers this second metal level; This second dielectric layer has that one second inductance department appears the hole, a plurality of the 3rd inductance department appears the hole and a plurality of the 4th inductance department appears the hole; It is to appear this first end face that this second inductance department appears the hole, and respectively to appear the hole be to appear respectively this second end face to the 3rd inductance department, and respectively to appear the hole be to appear respectively the 3rd end face to the 4th inductance department; And
One the 3rd metal level; It is formed at this second dielectric layer, and the 3rd metal level has one the 5th inductance department and a plurality of the 6th inductance department, and the 5th inductance department connects this second inductance department and the 3rd inductance department; Respectively the 6th inductance department connects the 3rd inductance department and the 4th inductance department; The 5th inductance department has one the 5th height, and respectively the 6th inductance department has one the 6th height, and this second height, the 3rd height and the 4th highly are greater than the 5th height and the 6th height.
10. the carrier structure with three-dimensional inductance according to claim 9, it is characterized in that its include in addition one be formed at this overcoat second connection pad, this substrate has one second weld pad in addition, this second connection pad is to electrically connect this second weld pad.
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| CN201110134743.4A CN102791075B (en) | 2011-05-16 | 2011-05-16 | Manufacture method of loader with three-dimensional inductance and structure of loader |
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| CN201110134743.4A CN102791075B (en) | 2011-05-16 | 2011-05-16 | Manufacture method of loader with three-dimensional inductance and structure of loader |
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| CN102791075B CN102791075B (en) | 2015-03-25 |
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| CN103325765A (en) * | 2013-06-21 | 2013-09-25 | 江阴长电先进封装有限公司 | Silicon substrate inductance structure with magnetic core |
| CN107403789A (en) * | 2017-08-09 | 2017-11-28 | 上海华虹宏力半导体制造有限公司 | Improve the method and semiconductor structure of High resistivity substrate inductance performance |
| CN108879083A (en) * | 2017-05-09 | 2018-11-23 | 昌泽科技有限公司 | The production method of chip signal element |
| CN115050539A (en) * | 2022-06-07 | 2022-09-13 | 江南大学 | IPD-based 3D inductor with ultrahigh self-resonant frequency and application thereof |
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| US20070090912A1 (en) * | 2005-10-20 | 2007-04-26 | Sheng-Yuan Lee | Embedded inductor and application thereof |
| US20070236319A1 (en) * | 2006-04-04 | 2007-10-11 | Tsun-Lai Hsu | Inductor structure |
| CN101116172A (en) * | 2004-12-10 | 2008-01-30 | 德克萨斯仪器股份有限公司 | Fabrication of a ferromagnetic inductor core and capacitor electrode in a single photo mask step |
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Also Published As
| Publication number | Publication date |
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| CN102791075B (en) | 2015-03-25 |
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