CN102790154B - Production method of gallium nitride (GaN)-based light emitting diode (LED) chip with indium tin oxide (ITO) surface roughness - Google Patents

Production method of gallium nitride (GaN)-based light emitting diode (LED) chip with indium tin oxide (ITO) surface roughness Download PDF

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CN102790154B
CN102790154B CN201210281687.1A CN201210281687A CN102790154B CN 102790154 B CN102790154 B CN 102790154B CN 201210281687 A CN201210281687 A CN 201210281687A CN 102790154 B CN102790154 B CN 102790154B
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CN102790154A (en
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李璟
王国宏
詹腾
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YANGZHOU ZHONGKE SEMICONDUCTOR LIGHTING CO Ltd
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Abstract

The invention relates to a production method of a gallium nitride (GaN)-based light emitting diode (LED) chip with indium tin oxide (ITO) surface roughness, which relates to the technical field of the production of a semiconductor. The production method comprises following steps of firstly forming a GaN epitaxial wafer; preparing an ITO film layer on the surface of a phosphorus gallium nitride (P-GaN) layer of the epitaxial wafer; roughening the surface of the film layer; performing inductively coupled plasma (ICP) etching on one side of the GaN epitaxial wafer, and forming an ITO transparent electrode on a P-type table-board; forming a positive (P) electrode and a negative (N) electrode; and thinning a semiconductor substrate, and then slicing the semiconductor substrate into independent chips. The production method is characterized in that when the surface roughening is performed on the surface of the ITO film layer, a nano bowl-shaped roughened surface layer is produced, and the nano bowl-shaped roughened surface layer is formed by joining a plurality of back surfaces respectively to bowl-shaped grooves on the P-GaN layer, wherein the back surfaces are connected with each other. The size and the depth of each bowl-shaped groove in the nano bowl-shaped roughened surface layer are controllable, and the bowl-shaped structure is more favorable for the light extraction.

Description

There is the manufacture method of the GaN base LED chip of ITO surface coarsening
Technical field
The present invention relates to semiconductor fabrication techniques field.
Background technology
In GaN base forward LED structure, conventionally adopt the current extending of tin indium oxide (ITO) transparent conductive film as P table top, the refractive index of ITO is about 2, the critical angle of ITO interface and air generation total reflection is 30 °, and the light that active area produces only has minority to escape into outside ITO.This just requires to design from chip structure aspect, reduces total reflection, increases the critical angle of escape light cone.The present total reflection that conventionally adopts in the industry ITO surface coarsening technology to reduce emergent light, to improve the extraction efficiency of light.But the difficulty of alligatoring ITO is larger, the preparation of alligatoring mask and removal are more difficult.
Summary of the invention
For difficult point and the problem of existing alligatoring ITO existence, the present invention seeks to the manufacture method of the GaN base LED chip that proposes a kind of ITO of having surface coarsening.
The present invention includes following steps:
1) adopt the method for metal organic chemical vapor deposition (MOCVD), growing low temperature GaN resilient coating, the GaN layer that undopes, N-GaN layer, multiple quantum well light emitting layer and P-GaN layer successively in Semiconductor substrate, form GaN epitaxial wafer; Described Semiconductor substrate is sapphire, silicon, carborundum or metal;
2) preparing thickness on the P-GaN of GaN epitaxial wafer layer surface is 500 ~ 9000 ito thin film layer;
3) surface coarsening processing is carried out in ito thin film layer surface;
4) adopt AZ4620 photoresist as mask, a side of GaN epitaxial wafer carried out to ICP(inductively coupled plasma) etching, P-GaN, quantum well and the part N-GaN of removal one side, the table top that the formation degree of depth is 1000nm ~ 2000nm;
5) select AZ6130 photoresist and Xiao Wang's water photoetching corrosion to go out ITO figure, the part ito thin film layer on removal P-GaN layer and the ito thin film layer on table top form ito transparent electrode on P type table top;
6) on P-GaN layer, ITO layer and N-GaN layer, select negative photoresist L-300 photoetching P, N electrode, adopt electron-beam vapor deposition method evaporation metal Cr, Pt and Au successively, peel off rear formation P electrode and N electrode;
7), by Semiconductor substrate attenuate, then draw and be cleaved into independent chip.
Feature of the present invention is: add man-hour surface coarsening is carried out in ito thin film layer surface, produce the bowl-shape coarse surface layer of nanometer, the bowl-type groove that the bowl-shape coarse surface layer of described nanometer is connected on P-GaN layer by the multiple back sides that are connected forms.
The invention provides the manufacture method of the GaN base LED chip of the bowl-shape surface coarsening of a kind of ITO of having nanometer, in the bowl-shape coarse surface layer of nanometer, size and the degree of depth of each bowl-type groove are controlled, and this bowl structure is more conducive to light and extracts.
Of the present inventionly surface coarsening processing method carried out in ito thin film layer surface comprise the following steps:
1) the GaN epitaxial wafer that is coated with ito thin film layer is put into evaporator, the cesium chloride thin layer that is 100~800nm at ito thin film layer surface evaporation thickness;
2) in evaporator chamber, be filled with steam, make ito thin film layer surface cesium chloride absorb moisture grow up form cesium chloride nanometer island, the diameter on each described cesium chloride nanometer island is 100~900nm, the duty ratio on adjacent each cesium chloride nanometer island is 1 ︰ 1;
3) adopt PECVD(plasma enhanced chemical vapor deposition on the ito thin film layer surface that is being coated with cesium chloride nanometer island) the method deposit thickness silica membrane layer that is 0.5~1um;
4) epitaxial wafer is put into deionized water for ultrasonic processing, remove the cesium chloride nanometer island on ito thin film layer surface, form silica nanometer bowl layer on ito thin film layer surface, described silica nanometer bowl layer is served as reasons connected multiple back sides respectively towards the lip-deep bowl-type silica nano material composition of ito thin film layer;
5), using silica nanometer bowl layer as etch mask, ICP(inductively coupled plasma is carried out in ito thin film layer surface) etching, nano bowl layer pattern is transferred on ito thin film layer;
6) ultrasonic in BOE solution or soak after, the silicon dioxide on ito thin film layer surface is removed clean.
By above technique, can form the bowl-shape coarse surface layer of nanometer on ito thin film layer surface, roughness is 50-150nm(5 × 5 um scopes).The present invention proposes and utilize cesium chloride and silicon dioxide to form nano bowl as mask alligatoring ITO surface, simultaneously because cesium chloride is salt, can directly remove totally SiO with deionized water 2can be directly by BOE solution removal.Through improving more than 30% the luminous power of ITO surface coarsening GaN base after treatment LED.
The present invention is carrying out ICP(inductively coupled plasma to silica nanometer bowl layer) when etching, use Cl simultaneously 2, BCl 3and Ar 2as etching gas, wherein Cl 2flow is 30~100sccm, BCl 3flow is 5~20sccm, Ar 2flow is 5~25sccm; Etching power is 300~700W; Radio-frequency power is 50~200W; Etch period is 3-10 min.
HF and NH that BOE solution of the present invention is 1:7 by volume ratio 4f composition.
HCl and HNO that described little chloroazotic acid is 3:1 by volume ratio 3composition.
The thickness of described evaporation metal Cr, Pt and Au is respectively 100,500 and 10000.
Brief description of the drawings
Fig. 1 is the article construction schematic diagram that specific embodiment of the invention step 2 forms.
Fig. 2 is the article construction schematic diagram that step in specific embodiment of the invention step 3 (2) forms.
Fig. 3 is the article construction schematic diagram that step in specific embodiment of the invention step 3 (3) forms.
Fig. 4 is the article construction schematic diagram that step in specific embodiment of the invention step 3 (4) forms.
Fig. 5 is the article construction schematic diagram that step in specific embodiment of the invention step 3 (6) forms.
Fig. 6 is the article construction schematic diagram that specific embodiment of the invention step 7 forms.
Fig. 7 is GaN base LED and the common GaN base LED current-voltage correlation correlation curve with ITO surface coarsening.
Fig. 8 is GaN base LED and the common GaN base LED luminous intensity correlation curve with ITO surface coarsening.
Embodiment
One, make LED chip:
Step 1: the method that adopts metal organic chemical vapor deposition (MOCVD), 1 μ m low temperature GaN resilient coating 2, the 2 μ m that grow successively in Semiconductor substrate 1 undope GaN layer 3,2 μ m N-GaN layer 4,250nm multiple quantum well light emitting layer 5 and 300nmP-GaN layer 6, form GaN epitaxial wafer.
Above-mentioned Semiconductor substrate 1 can adopt any one in sapphire, silicon, carborundum or metal.
Step 2: prepare ito thin film layer at the P-GaN of GaN epitaxial wafer layer 6 upper surface, thickness 500 ~ 9000, as shown in Figure 1.
Step 3: ito thin film layer 7 surface are processed, produce the bowl-shape coarse surface of nanometer, its following steps:
(1) the GaN epitaxial wafer that is coated with ito thin film layer 7 is put into evaporator, at the surperficial evaporation cesium chloride film of ito thin film layer 7, time 5~40min, the cesium chloride thin layer thickness forming after film is 100~800nm.
(2) after evaporation finishes, in evaporator chamber, be filled with steam, 5~30 minutes time, make ito thin film layer 7 surface cesium chloride thin layer absorb moisture grow up gradually form cesium chloride nanometer island 8, the diameter on each cesium chloride nanometer island is respectively 100~900nm, spacing between Dao Yu island is 100~900nm, and the duty ratio on adjacent each cesium chloride nanometer island is 1 ︰ 1.As shown in Figure 2.
(3) adopt PECVD(plasma enhanced chemical vapor deposition on ito thin film layer 7 surface that are coated with cesium chloride nanometer island 8) method cvd silicon dioxide film 9, thickness 0.5~1um.As shown in Figure 3.
(4) above-mentioned epitaxial wafer is put into deionized water for ultrasonic 5~15 minutes, remove the cesium chloride nanometer island 8 on ito thin film layer 7 surface, form silica nanometer bowl layer 9 on ito thin film layer 7 surface.As shown in Figure 4, silica nanometer bowl layer 9 is served as reasons connected multiple back sides respectively towards the lip-deep bowl-type silica nano material composition of ito thin film layer 7.
(5), using silica nanometer bowl layer 9 as etch mask, ICP(inductively coupled plasma is carried out in ito thin film layer 7 surface) etching, nano bowl layer pattern is transferred on ito thin film layer 7.When etching, use Cl simultaneously 2, BCl 3and Ar 2as etching gas, wherein Cl 2flow is 30~100sccm, BCl 3flow is 5~20sccm, Ar 2flow is 5~25sccm; Etching power is 300~700W; Radio-frequency power is 50~200W; Etch period is 3~10 min.
(6) by HF and NH 4f mixes with the ratio of volume ratio 1:7, forms BOE solution.By epitaxial wafer ultrasonic or immersion 10~90s in BOE solution, the silicon dioxide on ito thin film layer 7 surface is removed totally, expose the bowl-shape ITO coarse surface of nanometer, the roughness of ITO is 50-150nm(5 × 5 um scopes).As shown in Figure 5.
Step 4: GaN epitaxial wafer is carried out to litho pattern preparation, select AZ4620 photoresist as mask, a side to GaN epitaxial wafer is carried out ICP(inductively coupled plasma) etching, remove P-GaN layer 6, quantum well layer 5 and the part N-GaN layer 4 of a side, form table top 41, the etching depth 1000nm ~ 2000nm of this table top 41.
Step 5: select AZ6130 photoresist and little chloroazotic acid (3HCl:HNO 3) photoetching corrosion goes out ITO figure, removes part ito thin film layer 7 on P-GaN 6 and the ito thin film layer 7 on table top 41, on P type table top, forms ito transparent electrode.
Step 6: select negative photoresist L-300 photoetching P, N electrode on P-GaN layer 6, ITO layer 7 and N-GaN layer 41, employing electron-beam vapor deposition method evaporation thickness is respectively 100,500 and 10000 Metal Cr, Pt and Au layer, peels off rear formation P electrode 10 and N electrode 11.
Step 7: Semiconductor substrate 1 is thinned to 150um, draws and be cleaved into independent chip.The LED chip structure finally forming as shown in Figure 6.
Two, test I-V characteristic of the present invention and P-I characteristic, and contrast with the LED chip that commonsense method forms:
The product that above the present invention method is made carries out respectively I-V characteristic test and the P-I characteristic test of device with the LED chip that adopts commonsense method to form, and obtains respectively the GaN base LED with ITO surface coarsening shown in Fig. 7,8 and common GaN base LED current-voltage correlation correlation curve and luminous intensity correlation curve.
As seen from Figure 7: the GaN base LED with ITO surface coarsening almost overlaps with common GaN base LED current-voltage correlation correlation curve, illustrate and do not make the voltage of GaN base LED raise to ITO surface coarsening.
As seen from Figure 8: there is the GaN base LED of ITO surface coarsening than common GaN base LED luminous intensity correlation curve.Be that luminous power under 350mA improves more than 30% than common GaN base LED through the GaN base LED to after ITO surface coarsening at operating current.

Claims (5)

1. the manufacture method with the GaN base LED chip of ITO surface coarsening, comprises the following steps:
1) adopt the method for metal organic chemical vapor deposition, growing low temperature GaN resilient coating, the GaN layer that undopes, N-GaN layer, multiple quantum well light emitting layer and P-GaN layer successively in Semiconductor substrate, form GaN epitaxial wafer; Described Semiconductor substrate is sapphire, silicon, carborundum or metal;
2) preparing thickness on the P-GaN of GaN epitaxial wafer layer surface is 500~9000 ito thin film layer;
3) surface coarsening processing is carried out in ito thin film layer surface;
4) adopt AZ4620 photoresist as mask, a side of GaN epitaxial wafer is carried out to ICP etching, remove P-GaN, quantum well and the part N-GaN of a side, the table top that the formation degree of depth is 1000~2000nm;
5) select AZ6130 photoresist and chloroazotic acid photoetching corrosion to go out ITO figure, the part ito thin film layer on removal P-GaN layer and the ito thin film layer on table top form ito transparent electrode on P type table top;
6) on P-GaN layer, ITO layer and N-GaN layer, select negative photoresist L-300 photoetching P, N electrode, adopt electron-beam vapor deposition method evaporation metal Cr, Pt and Au successively, peel off rear formation P electrode and N electrode;
7), by Semiconductor substrate attenuate, then draw and be cleaved into independent chip;
It is characterized in that: add man-hour surface coarsening is carried out in ito thin film layer surface, produce the bowl-shape coarse surface layer of nanometer, the bowl-type groove that the bowl-shape coarse surface layer of described nanometer is connected on P-GaN layer by the multiple back sides that are connected forms; Describedly surface coarsening processing method carried out in ito thin film layer surface comprise the following steps:
1) the GaN epitaxial wafer that is coated with ito thin film layer is put into evaporator, the cesium chloride thin layer that is 100~800nm at ito thin film layer surface evaporation thickness;
2) in evaporator chamber, be filled with steam, make ito thin film layer surface cesium chloride absorb moisture grow up form cesium chloride nanometer island, the diameter on each described cesium chloride nanometer island is 100~900nm, the duty ratio on adjacent each cesium chloride nanometer island is 1 ︰ 1;
3) adopt on the ito thin film layer surface that is coated with cesium chloride nanometer island the silica membrane layer that plasma enhanced chemical vapor deposition method deposit thickness is 0.5~1um;
4) epitaxial wafer is put into deionized water for ultrasonic processing, remove the cesium chloride nanometer island on ito thin film layer surface, form silica nanometer bowl layer on ito thin film layer surface, described silica nanometer bowl layer is served as reasons connected multiple back sides respectively towards the lip-deep bowl-type silica nano material composition of ito thin film layer;
5) using silica nanometer bowl layer as etch mask, inductively coupled plasma etching is carried out in ito thin film layer surface, nano bowl layer pattern is transferred on ito thin film layer;
6) ultrasonic in BOE solution or soak after, the silicon dioxide on ito thin film layer surface is removed clean.
2. there is according to claim 1 the manufacture method of the GaN base LED chip of ITO surface coarsening, it is characterized in that, in the time that silica nanometer bowl layer is carried out to inductively coupled plasma etching, using Cl simultaneously 2, BCl 3and Ar 2as etching gas, wherein Cl 2flow is 30~100sccm, BCl 3flow is 5~20sccm, Ar 2flow is 5~25sccm; Etching power is 300~700W; Radio-frequency power is 50~200W; Etch period is 3-10 min.
3. there is according to claim 1 the manufacture method of the GaN base LED chip of ITO surface coarsening, it is characterized in that HF and NH that described BOE solution is 1:7 by volume ratio 4f composition.
4. there is according to claim 1 the manufacture method of the GaN base LED chip of ITO surface coarsening, it is characterized in that HCl and HNO that described chloroazotic acid is 3:1 by volume ratio 3composition.
5. there is according to claim 1 the manufacture method of the GaN base LED chip of ITO surface coarsening, it is characterized in that the thickness of described evaporation metal Cr, Pt and Au is respectively 100,500 and 10000.
CN201210281687.1A 2012-08-09 2012-08-09 Production method of gallium nitride (GaN)-based light emitting diode (LED) chip with indium tin oxide (ITO) surface roughness Active CN102790154B (en)

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CN101702419A (en) * 2009-10-30 2010-05-05 华南师范大学 Surface roughening method of p-GaN layer or ITO layer in GaN-based LED chip structure
CN101964386A (en) * 2010-10-25 2011-02-02 厦门市三安光电科技有限公司 Method for manufacturing surface-coarsened light emitting diode
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