CN102789430B - Memorizer memory devices, its Memory Controller and access method - Google Patents
Memorizer memory devices, its Memory Controller and access method Download PDFInfo
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Abstract
A kind of memorizer memory devices, its Memory Controller and access method.This memorizer memory devices comprises the type nonvolatile chip with multiple physical blocks.The method comprises the multiple logical blocks of configuration with the physical blocks of demapping section, and above-mentioned logical blocks is at least divided into the first cut section and the second cut section, and wherein the first cut section record one automatically performs file.The method also comprises and judges whether trigger pip exists.If trigger pip exists, then transfer medium ready information is to host computer system, host computer system is run automatically and automatically performs file to receive first password.The method also comprises and the logical blocks belonging to the second cut section is supplied to host computer system access according to judging whether from the first password of host computer system.
Description
Technical field
The present invention relates to a kind of access method of memorizer memory devices, particularly relate to a kind of need by the method for coded access memorizer memory devices, and carry out memorizer memory devices and the Memory Controller of the method.
Background technology
It is little of characteristics such as mechanical structures that flash memory (FlashMemory) has data non-volatile, power saving, volume, is therefore widely used in various electronic installation.As little based on the volume of flash memory especially in portable memory devices such as portable disks and characteristic capacious and Storage Media using it as device inside.
In order to increase portability, the appearance design of portable memory device is also more and more lighter and handier, also easily causes comparatively speaking and loses and cause data wherein to leak.Therefore, many being encrypted data is also arisen at the historic moment with the technology of certification, to protect the data in portable memory device.For example, technology that password is just able to access data also starts to adopt multiple cipher cross validation gradually to require user to input, and improves data security according to this.
In addition; also the portable memory device of part is had can to provide the automatic executing function of cryptoguard for operating platforms such as window operating systems; and then after computer system detects portable memory device, automatic operation above-mentioned functions is carried out requirement user and is inputted password.But when user is in individual exclusive computing machine environment for use comparatively safe like this, if each for using portable memory device all must input password, sizable inconvenience can be caused undoubtedly.Moreover most likely limited the trial input number of times of password in the mode of cryptoguard data, if the number of times of input error password exceedes preset value, portable memory device just can be locked.Now, user or even must need the service retail sales of going to device manufacturer to unlock with special software, quite wastes time and energy.
Summary of the invention
In view of this, the invention provides a kind of access method of memorizer memory devices, Memory Controller, and memorizer memory devices, allow user can conveniently access the memorizer memory devices being provided with cryptoguard.
The present invention proposes a kind of access method of memorizer memory devices, and wherein memorizer memory devices has type nonvolatile chip, and type nonvolatile chip has multiple physical blocks.The method comprises the multiple logical blocks of configuration with the physical blocks of demapping section, and above-mentioned logical blocks is at least divided into the first cut section and the second cut section, and wherein the first cut section record one automatically performs file.The method also comprises and judges whether trigger pip exists.If trigger pip exists, then transfer medium ready information is to host computer system, host computer system is run automatically and automatically performs file to receive first password.The method also comprises and the logical blocks belonging to the second cut section is supplied to host computer system access according to judging whether from the first password of host computer system.
From another viewpoint, the present invention proposes a kind of Memory Controller, for the type nonvolatile chip in diode-capacitor storage storage device.This Memory Controller comprises host system interface, memory interface, and memory management circuitry.Wherein, host system interface is in order to couple host computer system.Memory interface is in order to couple type nonvolatile chip, and this type nonvolatile chip has multiple physical blocks.Memory management circuitry is coupled to host system interface and memory interface, memory management circuitry is in order to configure multiple logical blocks with the physical blocks of demapping section, and above-mentioned logical blocks is at least divided into the first cut section and the second cut section, wherein the first cut section record one automatically performs file.Memory management circuitry is also in order to judge whether trigger pip exists, if trigger pip exists, transfer medium ready information, to host computer system, makes host computer system automatically run and automatically performs file to receive first password.Memory management circuitry is also in order to judge whether according to the first password from host computer system the logical blocks belonging to the second cut section to be supplied to host computer system access.
From another viewpoint, the present invention proposes a kind of memorizer memory devices, comprises type nonvolatile chip, connector, and Memory Controller.Type nonvolatile chip has multiple physical blocks.Connector is in order to couple host computer system.Memory Controller is coupled to type nonvolatile chip and connector, Memory Controller is in order to configure multiple logical blocks with the physical blocks of demapping section, and above-mentioned logical blocks is at least divided into the first cut section and the second cut section, wherein the first cut section record one automatically performs file.Memory Controller is also in order to judge whether trigger pip exists, if trigger pip exists, transfer medium ready information, to host computer system, makes host computer system automatically run and automatically performs file to receive first password.Memory Controller is also in order to judge whether according to the first password from host computer system the logical blocks belonging to the second cut section to be supplied to host computer system access.
From a viewpoint again, the present invention proposes a kind of access method of plug type memorizer memory devices, and this plug type memorizer memory devices has a storage area, and is suitable for coupling with host computer system.The method comprises and judges whether a trigger pip exists by plug type memorizer memory devices.Wherein, this trigger pip is produced by portable object and the interaction of plug type memorizer memory devices.If trigger pip exists, then ready information is sent to host computer system, makes host system application one first password.Storage area is supplied to host computer system access according to judging whether from the first password of host computer system and at least one the second password from plug type memorizer memory devices by plug type memorizer memory devices.
Based on above-mentioned, the present invention is when memorizer memory devices detects trigger pip, just make host computer system go in automatic run memory storage device automatically perform file with receive user input password, thus according to password judge whether allow host computer system memorizer memory devices is accessed.Due to only when trigger pip exists user be just able to input password by host computer system, therefore can increase with the intensity of cryptoguard data security.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate accompanying drawing to be described in detail below.
Accompanying drawing explanation
Figure 1A is the schematic diagram of the host computer system of use memorizer memory devices according to one embodiment of the invention.
Figure 1B is the schematic diagram of computing machine, input/output device and memorizer memory devices according to the embodiment of the present invention.
Fig. 1 C is the schematic diagram of host computer system according to another embodiment of the present invention and memorizer memory devices.
Fig. 2 is the summary block scheme of the memorizer memory devices shown in Figure 1A.
Fig. 3 is the summary block scheme of the Memory Controller according to one embodiment of the invention.
Fig. 4 is the schematic diagram of the management entity block according to one embodiment of the invention.
Fig. 5 is the configuration schematic diagram of the logical blocks according to one embodiment of the invention.
Fig. 6 A to 6C is the schematic diagram of the access memory storage device according to one embodiment of the invention.
Fig. 7 is the process flow diagram of the access method of memorizer memory devices according to one embodiment of the invention.
Reference numeral:
1000: host computer system
1100: computing machine
1102: microprocessor
1104: random access memory
1106: input/output device
1108: system bus
1110: data transmission interface
1111: internal storage device
10: operating system
1202: mouse
1204: keyboard
1206: display
1208: printer
1212: portable disk
1214: memory card
1216: solid state hard disc
1310: digital camera
1312:SD card
1314:MMC card
1316: memory stick
1318:CF card
1320: embedded storage device
100: memorizer memory devices
102: connector
104: Memory Controller
106: type nonvolatile chip
1041: host system interface
1043: memory management circuitry
1045: memory interface
3002: memory buffer
3004: electric power management circuit
3006: bug check and correcting circuit
410 (0) ~ 410 (N): physical blocks
502: data field
504: idle district
506: system region
508: replace district
610 (0) ~ 610 (L): logical blocks
710: the first cut sections
710a: automatically perform file
720: the second cut sections
810: card reader
810a: authorize identification card
S710 ~ S770: each step of the access method of the memorizer memory devices described in one embodiment of the invention
Embodiment
Generally speaking, memorizer memory devices (also known as, memory storage system) comprises memory chip and controller (also known as, control circuit).Usual memorizer memory devices can use together with host computer system, data can be write to memorizer memory devices or read data from memorizer memory devices to make host computer system.In addition, memorizer memory devices is also had to be comprise embedded memory and can be executed in host computer system using substantially as the software of the controller of this embedded memory.
Figure 1A is the schematic diagram of the host computer system of use memorizer memory devices according to one embodiment of the invention.
Host computer system 1000 comprises computing machine 1100 and I/O (Input/Output, I/O) device 1106.Computing machine 1100 comprises microprocessor 1102, random access memory (RandomAccessMemory, RAM) 1104, system bus 1108, data transmission interface 1110 and internal storage device 1111.Input/output device 1106 comprises mouse 1202, keyboard 1204, display 1206 and printer 1208 as shown in Figure 1B.It must be appreciated, the unrestricted input/output device 1106 of the device shown in Figure 1B, input/output device 1106 can also comprise other devices.
In embodiments of the present invention, memorizer memory devices 100 is coupled by data transmission interface 1110 other elements with host computer system 1000.Memorizer memory devices 100 is such as the storage device of plug type.By microprocessor 1102, random access memory 1104, input/output device 1106 to be namely arranged on the running of the operating system 10 of internal storage device 1111, data can be write to memorizer memory devices 100 by host computer system 1000, or read data from memorizer memory devices 100.Such as, memorizer memory devices 100 can be memory card 1214, portable disk 1212 or solid state hard disc (SolidStateDrive, SSD) 1216 as shown in Figure 1B.
Generally speaking, host computer system 1000 is can any system of storage data.Although host computer system 1000 explains with computer system in the present embodiment, but, in an alternative embodiment of the invention, host computer system 1000 can also be the systems such as mobile phone, digital camera, video camera, communication device, audio player or video player.Such as, when host computer system is digital camera 1310, memorizer memory devices is then safe digital (SecureDigital that it uses, SD) card 1312, multimedia memory (MultimediaCard, MMC) card 1314, memory stick (MemoryStick) 1316, compact flash (CompactFlash, CF) block 1318 or embedded storage device 1320 (as shown in Figure 1 C).Embedded storage device 1320 comprises embedded multimedia card (EmbeddedMMC, eMMC).It is worth mentioning that, embedded multimedia card is directly coupled on the substrate of host computer system.
Fig. 2 is the block scheme of the memorizer memory devices 100 shown in Figure 1A.Refer to Fig. 2, memorizer memory devices 100 comprises connector 102, Memory Controller 104 and type nonvolatile chip 106.
Connector 102 is coupled to Memory Controller 104, and in order to couple host computer system 1000.In the present embodiment, the transmission interface kind that connector 102 is supported is USB (universal serial bus) (UniversalSerialBus, USB) interface.But in other embodiments, the transmission interface kind of connector 102 also can be Serial Advanced Technology Attachment (SerialAdvancedTechnologyAttachment, SATA) interface, Multi Media Card (MultimediaCard, MMC) interface, parallel Advanced Technology Attachment (ParallelAdvancedTechnologyAttachment, PATA) interface, Institute of Electrical and Electric Engineers (InstituteofElectricalandElectronicEngineers, IEEE) 1394 interfaces, high-speed peripheral component connecting interface (PeripheralComponentInterconnectExpress, PCIExpress) interface, safe digital (SecureDigital, SD) interface, memory stick (MemoryStick, MS) interface, compact flash (CompactFlash, CF) interface, or integrated driving electronics (IntegratedDriveElectronics, IDE) any applicable interface such as interface, do not limited at this.
Memory Controller 104 can perform with multiple logic gate of hardware pattern or firmware pattern implementation or steering order, and according to the instruction of host computer system 1000 carry out in type nonvolatile chip 106 data write, read and the running such as to erase.Wherein, the Memory Controller 104 also special access method in order to the memorizer memory devices according to the present embodiment carrys out the access right of keyholed back plate to memorizer memory devices 100, the data according to this in protected storage storage device 100.The access method of the memorizer memory devices of the present embodiment will explain in rear cooperation diagram again.
Type nonvolatile chip 106 is coupled to Memory Controller 104.Type nonvolatile chip 106 is in order to store as file configuration table (FileAllocationTable, or enhanced file system (NewTechnologyFileSystem FAT), the filesystem information such as NTFS), and store as general data such as word, image or audio files.For example, type nonvolatile chip 106 is multi-level cell memory (MultiLevelCell, MLC) NAND quick-flash memory chip, but the present invention is not limited thereto, type nonvolatile chip 106 also can be single-order storage unit (SingleLevelCell, SLC) NAND quick-flash memory chip, other flash memory chips or any memory chip with identical characteristics.
Fig. 3 is the summary block scheme of the Memory Controller according to one embodiment of the invention.Refer to Fig. 3, Memory Controller 104 comprises host system interface 1041, memory management circuitry 1043, and memory interface 1045.
Host system interface 1041 is coupled to memory management circuitry 1043, and by connector 102 to couple host computer system 1000.Host system interface 1041 is in order to receive and to identify the instruction that host computer system 1000 transmits and data.Accordingly, the instruction that transmits of host computer system 1000 and data can be sent to memory management circuitry 1043 by host system interface 1041.In the present embodiment, the corresponding connector 102 of host system interface 1041 and be USB interface, and in other embodiments, host system interface 1041 also can be SATA interface, MMC interface, PATA interface, IEEE1394 interface, PCIExpress interface, SD interface, MS interface, CF interface, ide interface or the interface meeting other interface standards.
Memory management circuitry 1043 is in order to the overall operation of control store controller 104.Specifically, memory management circuitry 1043 has multiple steering order, and when memorizer memory devices 100 operates, above-mentioned steering order can be performed the access method of the memorizer memory devices realizing the present embodiment.
In one embodiment, the steering order of memory management circuitry 1043 carrys out implementation with firmware pattern.Such as, memory management circuitry 1043 has microprocessor unit (not shown) and ROM (read-only memory) (not shown), and above-mentioned steering order by burning in ROM (read-only memory).When memorizer memory devices 100 operates, above-mentioned steering order can have been performed the access method of the memorizer memory devices of the present embodiment by microprocessor unit.
In an alternative embodiment of the invention, the steering order of memory management circuitry 1043 can also procedure code pattern be stored in the specific region (such as, being exclusively used in the system region of storage system data in type nonvolatile chip 106) of type nonvolatile chip 106.In addition, memory management circuitry 1043 has microprocessor unit (not shown), ROM (read-only memory) (not shown) and random access memory (not shown).Wherein, ROM (read-only memory) has driving code section, and when Memory Controller 104 is enabled, microprocessor unit first can perform this and drive code section the steering order be stored in type nonvolatile chip 106 to be loaded in the random access memory of memory management circuitry 1043.Afterwards, microprocessor unit can run above-mentioned steering order to perform the access method of the memorizer memory devices of the present embodiment.In addition, in an alternative embodiment of the invention, the steering order of memory management circuitry 1043 a hardware pattern can also carry out implementation.
Memory interface 1045 is coupled to memory management circuitry 1043, couples mutually with type nonvolatile chip 106 to make Memory Controller 104.Accordingly, Memory Controller 104 can carry out relevant running to type nonvolatile chip 106.That is, the data for writing to type nonvolatile chip 106 can be converted to the receptible form of type nonvolatile chip 106 via memory interface 1045.
In one embodiment of this invention, Memory Controller 104 also comprises memory buffer 3002.Memory buffer 3002 can be static RAM (StaticRandomAccessMemory, or dynamic RAM (DynamicRandomAccessMemory SRAM), DRAM) etc., the present invention is not limited.Memory buffer 3002 is coupled to memory management circuitry 1043, in order to the temporary data coming from host computer system 1000, or the temporary data coming from type nonvolatile chip 106.
In an alternative embodiment of the invention, Memory Controller 104 also comprises electric power management circuit 3004.Electric power management circuit 3004 is coupled to memory management circuitry 1043, in order to the power supply of control store storage device 100.
In still another embodiment of the process, Memory Controller 104 also comprises bug check and correcting circuit 3006.Bug check and correcting circuit 3006 are coupled to memory management circuitry 1043, in order to execution error inspection and correction program to guarantee the correctness of data.Specifically, when memory management circuitry 1043 receives the write instruction from host computer system 1000, bug check and correcting circuit 3006 can be that the corresponding data that this writes instruction produce corresponding bug check and correcting code (ErrorCheckingandCorrectingCode, and data of this write instruction corresponding can be write to type nonvolatile chip 106 with corresponding bug check and correcting code by memory management circuitry 1043 ECCCode).Afterwards when memory management circuitry 1043 reads data from type nonvolatile chip 106, can read bug check corresponding to these data and correcting code, and bug check and correcting circuit 3006 can according to this bug check and correcting code to read data execution error inspection and correction programs simultaneously.
Fig. 4 is the schematic diagram of the management entity block according to one embodiment of the invention.
Refer to Fig. 4, the type nonvolatile chip 106 of the present embodiment comprises physical blocks 410 (0) ~ 410 (N), and each physical blocks comprises several physical page.Physical blocks 410 (0) ~ 410 (N) logically can be grouped into data field 502, idle district 504, system region 506 and replace district 508 by the memory management circuitry 1043 in Memory Controller 104.Wherein, the F that Fig. 4 indicates, S, R and N are positive integer, represent the physical blocks quantity of each district configuration, and it can be set according to the capacity of the type nonvolatile chip 106 used by the manufacturer of memorizer memory devices 100.
Belonging to data field 502 in logic with the physical blocks in idle district 504 is in order to store the data coming from host computer system 1000.Specifically, the physical blocks of data field 502 is the physical blocks being regarded as storage data, and the physical blocks in idle district 504 is the physical blocks in order to replacement data district 502.In other words, the physical blocks in idle district 504 be sky or spendable physical blocks (no record data or be labeled as invalid data useless).When receiving the data that write instruction writes with wish from host computer system 1000, memory management circuitry 1043 can extract physical blocks from idle district 504, and data is write in extracted physical blocks, with the physical blocks in replacement data district 502.
The physical blocks belonging to system region 506 is in logic in order to register system data.For example, system data comprises the information such as manufacturer and model about type nonvolatile chip 106.
Belong to and replace the physical blocks in district 508 when being in order to physical blocks damage in data field 502, idle district 504 or system region 506 in logic, replacing damaged physical blocks.Specifically, if replace in district 508 still have normal physical blocks and the physical blocks of data field 502 is damaged time, memory management circuitry 1043 can extract normal physical blocks to change the physical blocks damaged in data field 502 from replacing district 508.
In order to host computer system 1000 can be accessed type nonvolatile chip 106, memory management circuitry 1043 can configure several logical blocks 610 (0) ~ 610 (L) with the physical blocks 410 (0) ~ 410 (F-1) in mapping (enum) data district 502.Wherein each logical blocks comprises multiple logical page (LPAGE), and logical page (LPAGE) in logical blocks 610 (0) ~ 610 (L) can physical page sequentially in mapping entity block 410 (0) ~ 410 (F-1).
In detail, configured logical blocks 610 (0) ~ 610 (L) is supplied to host computer system 1000 by memory management circuitry 1043, and service logic block-physical blocks mapping table (logicalblock-physicalblockmappingtable) is to record the mapping relations of logical blocks 610 (0) ~ 610 (L) and physical blocks 410 (0) ~ 410 (F-1).Therefore, when host computer system 1000 is for accessing a logic access address, this logic access address can be converted to the logical page (LPAGE) of corresponding logical blocks by memory management circuitry 1043, then is accessed by the physical page that logical blocks-physical blocks mapping table finds it to map.
Fig. 5 is the configuration schematic diagram of the logical blocks according to one embodiment of the invention.Refer to Fig. 5, logical blocks 610 (0) ~ 610 (L) is divided into the first cut section 710 comprising logical blocks 610 (0) ~ 610 (P) and the second cut section 720 comprising logical blocks 610 (P+1) ~ 610 (L) by memory management circuitry 1043.Wherein, the first cut section 710 to record before memorizer memory devices 100 dispatches from the factory just burning good automatically perform file.Second cut section 720 (being also referred to as storage area) is then hiding cut section, needs just to be accessed through password authentification.Must illustrate, the present invention is not limited the quantity of cut section, and in other embodiments, logical blocks 610 (0) ~ 610 (L) also can be divided into the cut section of more than three by memory management circuitry 1043.
In the present embodiment, when memorizer memory devices 100 is coupled to host computer system 1000, host computer system 1000 there is no the data in method access memory storage device 100, and can whether need decide host computer system 1000 by memory management circuitry 1043 according to the existence of a trigger pip carry out further access action to the data in memorizer memory devices 100.Wherein, trigger pip is produced with memorizer memory devices 100 interaction by a portable object (such as, contactless card, electronic key, or non-electrical minor key etc.), it is interactive that interactive mode comprises the contacts such as electrical connection, or the contactless interaction such as magnetic induction.
The mode of the access of memory management circuitry 1043 keyholed back plate memorizer memory devices 100 will be described with Fig. 6 A to 6C below.In the present embodiment, memorizer memory devices 100 comprises the card reader 810 being coupled to memory management circuitry 1043, and trigger pip is then produced when one authorizes identification card to insert card reader 810.Wherein, the kind of authorizing identification card can be smart card (SmartCard) or safe digital card, is not limited at this.In detail, once card reader 810 has detected that card inserts just can send signal notice memory management circuitry 1043, memory management circuitry 1043 can judge that whether the card inserted is the identification card through authorizing.
Refer to Fig. 6 A, in the present embodiment, the first cut section 710 is modeled as CD cut section by memory management circuitry 1043.Therefore after memorizer memory devices 100 is coupled to host computer system 1000 by connector 102, when host computer system 1000 inquires its device characteristic to memorizer memory devices 100, memorizer memory devices 100 can be declared as CD player (such as by memory management circuitry 1043, CD (CompactDisc, CD) machine, digital video disk (DigitalVideoDisc, DVD) machine, Blu-ray Disc (Blue-RayDisc) machine etc.), and the operating system 10 of host computer system 1000 can configure a mounting points (mountpoint) carrys out carry (mount) CD player.Accordingly, memory management circuitry 1043 just receives the instruction from host computer system 1000 by mounting points.For example, operating system 10 regularly constantly can be assigned media by mounting points and check whether instruction has media (disc) to inquire in CD player.Now, authorize the insertion of identification card because card reader 810 not yet detects, thus do not produce trigger pip, therefore memory management circuitry 1043 can by media not yet ready information return back to host computer system 1000.Furthermore, the existence of host computer system 1000 not only None-identified second cut section 720 at this moment, and can assert that memorizer memory devices 100 is the CD player also not putting into any media.
Then Fig. 6 B is referred to, if there is a mandate identification card 810a to be inserted into card reader 810, memory management circuitry 1043 judges that trigger pip exists thereupon, thus after receiving the media inspection instruction from host computer system 1000, one ready information (such as, media ready information) is returned back to host computer system 1000.Next, operating system 10 in host computer system 1000 can automatically perform file 710a by automatic logging in the first cut section 710.In the present embodiment, automatically perform file 710a be operating system 10 can be made to automatically perform script file (such as, the script file (scriptfile) of file " autorun.inf " by name), and record the application-specific that will be performed automatically.Operating system 10 is after operation automatically performs file 710a automatically, and application-specific will be executed in host computer system 1000 and require that user inputs password, and the password that user inputs can be sent to memorizer memory devices 100 by host computer system 1000.Below the password that user inputs in host computer system 1000 is referred to as first password, host computer system 1000 such as can first use encryption algorithm (such as, rsa encryption algorithm) computing is carried out to first password, then the result after encryption is sent to memorizer memory devices 100.
Because first password not yet passes the certification of memorizer memory devices 100, so time host computer system 1000 can't identify the second cut section 720, after restoring first password, must judge whether that second cut section 720 can be supplied to host computer system 1000 access according to first password in the encrypted result obtained from host computer system 1000 by memory management circuitry 1043.In detail, memory management circuitry 1043 is carry out proving program according to first password and from another (or multiple) password of memorizer memory devices 100, thus judges whether that the second cut section 720 is supplied to host computer system 1000 to be accessed.
For example, in the present embodiment, authorize in identification card 810a and record the second password and the second cut section 720 records the 3rd password.Memory management circuitry 1043 can obtain second and third password respectively from mandate identification card 810a and the second cut section 720.Wherein, second and the 3rd password also have through encrypting when being sent to memory management circuitry 1043, therefore memory management circuitry 1043 first need be decrypted to reduce its value, then judges that whether first password, the second password and the 3rd password are by a proving program.For example, memory management circuitry 1043 can carry out mutual exclusion or (Exclusive-OR, XOR) computing to first password and the second password, and judges whether operation result conforms to the 3rd password.If so, then decision verification program is passed through, and the logical blocks 610 (P+1) ~ 610 (L) belonging to the second cut section 720 is supplied to host computer system 1000 and accesses by memory management circuitry 1043.If proving program cannot be passed through, then the second cut section 720 is remained on hidden state.In another embodiment, whether memory management circuitry 1043 only can pass through proving program according to first password and second password of authorizing in identification card 810a, or only whether determine whether that the second cut section 720 is supplied to host computer system 1000 to be accessed by proving program according to the 3rd password in first password and the second cut section 720, untapped password, then do not need to arrange.Should be noted that, the present invention is not limited proving program, and in other embodiments, whether the first password that other mode authentication of users also can be adopted to input coincide with from the second password of memorizer memory devices 100 and/or the 3rd password.
If proving program passes through, as shown in Figure 6 C, to host computer system 1000, memory management circuitry 1043 declares that memorizer memory devices 100 is the devices comprising CD player and Large Copacity storage device.Base this, operating system 10 can configure two mounting points, except by except the first cut section 710 carry to one of them mounting points of corresponding CD player, also can by the second cut section 720 carry of corresponding Large Copacity storage device to another mounting points.Thus, host computer system 1000 just can read the data in the second cut section 720, also data can be write to the second cut section 720.
But once authorize identification card 810a to be pulled out from card reader 810, trigger pip just no longer exists.Now, the logical blocks 610 (P+1) ~ 610 (L) belonging to the second cut section 720 is no longer supplied to host computer system 1000 and accesses by memory management circuitry 1043.And receive from host computer system 1000 media check instruction time, memory management circuitry 1043 can by media not yet ready information return back to host computer system 1000.In other words, now memorizer memory devices 100 can be identified as the CD player (as shown in Figure 6A) not putting into any media by host computer system 1000 once again.
In another embodiment, memory management circuitry 1043 is not prior is modeled as CD cut section by the first cut section 710.Therefore, when memorizer memory devices 100 is coupled to host computer system 1000 by connector 102, host computer system 1000 is by the type of device of None-identified memorizer memory devices 100.
In the case, authorize identification card be inserted into card reader and produce trigger pip if having, memory management circuitry 1043 can judge that trigger pip is deposited in case, makes memorizer memory devices 100 simulate a power-off reclosing behavior.That is, memory management circuitry 1043 can send specific instruction instruction host system interface 1041 interrupt with data transmission interface 1110 coupling (that is, connector 102 and host computer system 1000 is made to become non-coupling access status) and again couple again (that is, connector 102 and host computer system 1000 is made again to become coupling access status), and then allow host computer system 1000 again inquire the identifying information of memorizer memory devices 100.Now, the first cut section 710 is modeled as CD cut section and declares that to host computer system 1000 memorizer memory devices 100 is for CD player by memory management circuitry 1043.When receiving the media inspection instruction from host computer system 1000, media ready information is returned back to host computer system 1000 by memory management circuitry 1043, what the operating system 10 of host computer system 1000 is automatically run be stored in the first cut section 710 automatically performs file, and requires that user inputs password (i.e. first password).
Memory management circuitry 1043, after receiving the first password that user inputs in host computer system 1000, can carry out proving program in the mode of similar previous embodiment.That is, judge first password, from second password of authorizing acquired by identification card, and from the 3rd password acquired by the second cut section 720 whether by proving program, and access by the logical blocks 610 (P+1) ~ 610 (L) belonging to the second cut section 720 being supplied to host computer system 1000 during proving program in judgement.In another embodiment, memory management circuitry 1043 also can after receiving the first password that user inputs in host computer system 1000, only utilize and judge first password and whether pass through proving program, to determine that whether logical blocks 610 (P+1) ~ 610 (L) being supplied to host computer system 1000 accesses from the second password "or" of authorizing acquired by identification card from the 3rd password acquired by the second cut section 720.That is in the present embodiment, proving program only need use first password and the second password, or first password and the 3rd password, and untapped password, then do not need to arrange, and proving program can use symmetrical algorithm or other modes.
Similarly, once authorize identification card to be pulled out card reader (trigger pip does not exist), memory management circuitry 1043 no longer allows host computer system 1000 access the second cut section 720.
In the above-described embodiments, carry out trigger host system 1000 go to automatically perform file in automatic run memory storage device 100 by authorizing identification card to insert the behavior of card reader, and then require that user inputs password, and judge whether that the second cut section 720 be originally hidden is supplied to host computer system 1000 to be accessed according to this password.In other words, mandate identification card must be inserted card reader by user could input password, and this kind of pattern can improve the threshold of unblock and increase data security.And in the above-described embodiments, memorizer memory devices 100 can be converted to the lock-out state that can not be accessed by host computer system 1000 by the behavior of authorizing identification card to pull out from card reader automatically.Therefore, just easily memorizer memory devices 100 can be locked as long as mandate identification card is pulled out from card reader by user, increase the convenience of protected data.
Although be authorize identification card to insert card reader to produce trigger pip in the above-described embodiments, the present invention is not limited the producing method of trigger pip.For example, in other embodiments, memorizer memory devices 100 comprises the switch module being coupled to memory management circuitry 1043, and the shell of memorizer memory devices 100 has an input element, and input element is coupled to switch module and can changes the state of switch module.Wherein, input element can be button, button, turn-knob, seesaw, or thumb-acting switch etc.When switch module is in particular state in response to the operation of input element, just can produce trigger pip, the file that automatically performs that the operating system 10 in host computer system 1000 is automatically run in the first cut section 710 carrys out requirement user and inputs password.In the mode of similar previous embodiment, memory management circuitry 1043 can judge whether that the second cut section 720 in type nonvolatile chip 106 is supplied to host computer system 1000 to be accessed.
Fig. 7 is the process flow diagram of the access method of memorizer memory devices according to one embodiment of the invention.
Refer to Fig. 7, first, as shown in step S710, memory management circuitry 1043 configuration logic block 610 (0) ~ 610 (L) in memorizer memory devices 100 is to map the physical blocks 410 (0) ~ 410 (F-1) in type nonvolatile chip 106.And as shown in step S720, all logical blocks 610 (0) ~ 610 (L) are divided into the first cut section 710 and the second cut section 720 by memory management circuitry 1043, and wherein the first cut section 710 records one and automatically performs file.
Then, as shown in step S730, memory management circuitry 1043 judges whether trigger pip exists.For example, if memorizer memory devices 100 has card reader, trigger pip is such as produced when one authorizes identification card to insert card reader.If memorizer memory devices 100 has switch module, trigger pip can be produced when switch module is in particular state.
If trigger pip exists, then as shown in step S740, memory management circuitry 1043 is when host computer system 1000 sends media inspection instruction, media ready information is sent to host computer system 1000, makes host computer system 1000 automatic logging automatically perform the first password that file inputted by host computer system 1000 to receive user in the first cut section 710.
Then, in step S750, according to the first password from host computer system 1000, memory management circuitry 1043 judges whether that the logical blocks 610 (P+1) ~ 610 (L) belonging to the second cut section 720 is supplied to host computer system 1000 to be accessed.Because judgment mode illustrates in previous embodiment, therefore do not repeat them here.
If trigger pip does not exist, then as shown in step S760, the logical blocks 610 (P+1) ~ 610 (L) belonging to the second cut section 720 is not supplied to host computer system 1000 and accesses by memory management circuitry 1043.And as shown in step S770, receive from host computer system 1000 media check instruction time, memory management circuitry 1043 by media not yet ready information return back to host computer system 1000.
When memorizer memory devices 100 couples host computer system 1000, the access method of the memorizer memory devices described in the present embodiment can perform step S730 repeatedly to step S770, forbid host computer system 1000 access memory storage device 100 according to this when trigger pip does not exist, and judge to make no permission host computer system 1000 access memory storage device 100 according to the password correctness of user's input when trigger pip exists.
In sum, memorizer memory devices of the present invention, its Memory Controller and access method can authorize the modes such as the state of identification card or adjustment switch module to produce trigger pip by insertion, and have only and deposit in case in trigger pip, just allow user to input password by host computer system.Accordingly, provide convenient and the high mode of security is come the access right of memorizer memory devices in addition keyholed back plate.
Although the present invention with embodiment disclose as above, so itself and be not used to limit the present invention, the those of ordinary skill in any art, when doing a little change and retouching, and does not depart from the spirit and scope of the present invention.
Claims (19)
1. an access method for memorizer memory devices, wherein this memorizer memory devices has a type nonvolatile chip, and this type nonvolatile chip has multiple physical blocks, and the method comprises:
Configure multiple logical blocks with those physical blocks of demapping section;
Those logical blocks are at least divided into one first cut section and one second cut section, wherein this first cut section record one automatically performs file;
Judge whether a trigger pip exists;
Exist in response to this trigger pip, and transmit media ready information to host computer system, make this host computer system automatically run this and automatically perform file to receive a first password;
Judge whether those logical blocks belonging to this second cut section to be supplied to the access of this host computer system according to this first password from this host computer system; And
Do not exist in response to this trigger pip and receive from this host computer system one media check instruction time, and those logical blocks belonging to this second cut section are not supplied to this host computer system access and reply media not yet ready information to this host computer system.
2. the access method of memorizer memory devices according to claim 1, wherein this first cut section is modeled as a CD cut section, if this trigger pip exists, transmits this media ready information to the step of this host computer system and comprises:
When receiving the media inspection instruction from this host computer system, reply this media ready information to this host computer system.
3. the access method of memorizer memory devices according to claim 1, if wherein this trigger pip exists, transmits this media ready information to the step of this host computer system and comprises:
This memorizer memory devices is made to simulate a power-off reclosing behavior;
This first cut section is modeled as a CD cut section; And
When receiving the media inspection instruction from this host computer system, reply this media ready information to this host computer system.
4. the access method of memorizer memory devices according to claim 1, wherein this memorizer memory devices comprises a card reader, and this trigger pip produced when one authorizes identification card to insert this card reader.
5. the access method of memorizer memory devices according to claim 4, wherein this mandate identification card record one second password and this second cut section record 1 the 3rd password, and judge whether that the step those logical blocks belonging to this second cut section being supplied to the access of this host computer system comprises according to this first password from this host computer system:
Obtain this second password and the 3rd password;
Judge that whether this first password, this second password and the 3rd password are by a proving program; And
If by this proving program, then provide those logical blocks belonging to this second cut section to access to this host computer system.
6. the access method of memorizer memory devices according to claim 1, wherein this trigger pip is that a switch module on this memorizer memory devices produced when being in a particular state, wherein this particular state changes in response to the operation of an input element when this switch module, and this input element is a button, a button, a turn-knob, a seesaw, an or thumb-acting switch.
7. a Memory Controller, for managing the type nonvolatile chip in a memorizer memory devices, this Memory Controller comprises:
One host system interface, in order to couple a host computer system;
One memory interface, in order to couple this type nonvolatile chip, wherein this type nonvolatile chip has multiple physical blocks; And
One memory management circuitry, be coupled to this host system interface and this memory interface, this memory management circuitry is in order to configure multiple logical blocks with those physical blocks of demapping section, and those logical blocks are at least divided into one first cut section and one second cut section, wherein this first cut section record one automatically performs file
This memory management circuitry, also in order to judge whether a trigger pip exists, transmits media ready information to host computer system in response to this trigger pip exists, makes this host computer system automatically run this and automatically perform file to receive a first password,
This memory management circuitry also judges whether those logical blocks belonging to this second cut section to be supplied to the access of this host computer system in order to basis this first password from this host computer system,
Wherein do not exist in response to this trigger pip and receive from this host computer system one media check instruction time, this memory management circuitry those logical blocks belonging to this second cut section are not supplied to this host computer system access and reply media not yet ready information to this host computer system.
8. Memory Controller according to claim 7, wherein this first cut section is modeled as a CD cut section by this memory management circuitry, if this trigger pip exists, this memory management circuitry, when receiving the media inspection instruction from this host computer system, replys this media ready information to this host computer system.
9. Memory Controller according to claim 7, if wherein this trigger pip exists, this memory management circuitry makes this memorizer memory devices simulate a power-off reclosing behavior, and this first cut section is modeled as a CD cut section, and when receiving the media inspection instruction from this host computer system, reply this media ready information to this host computer system.
10. Memory Controller according to claim 7, wherein this memorizer memory devices comprises a card reader, and this trigger pip produced when one authorizes identification card to insert this card reader.
11. Memory Controllers according to claim 10, wherein this mandate identification card record one second password and this second cut section record 1 the 3rd password, this memory management circuitry obtains this second password and the 3rd password, and judge that whether this first password, this second password and the 3rd password are by a proving program, and by providing those logical blocks belonging to this second cut section to access to this host computer system during this proving program.
12. Memory Controllers according to claim 7, wherein this trigger pip is that a switch module on this memorizer memory devices produced when being in a particular state, wherein this particular state changes in response to the operation of an input element when this switch module, and this input element is a button, a button, a turn-knob, a seesaw, an or thumb-acting switch.
13. 1 kinds of memorizer memory devices, comprising:
One type nonvolatile chip, has multiple physical blocks;
A connector, in order to couple a host computer system; And
One Memory Controller, be coupled to this type nonvolatile chip and this connector, this Memory Controller is in order to configure multiple logical blocks with those physical blocks of demapping section, and those logical blocks are at least divided into one first cut section and one second cut section, wherein this first cut section record one automatically performs file
This Memory Controller, also in order to judge whether a trigger pip exists, transmits media ready information to host computer system in response to this trigger pip exists, makes this host computer system automatically run this and automatically perform file to receive a first password,
This Memory Controller also judges whether those logical blocks belonging to this second cut section to be supplied to the access of this host computer system in order to basis this first password from this host computer system,
Wherein do not exist in response to this trigger pip and receive from this host computer system one media check instruction time, this Memory Controller those logical blocks belonging to this second cut section are not supplied to this host computer system access and reply media not yet ready information to this host computer system.
14. memorizer memory devices according to claim 13, wherein this first cut section is modeled as a CD cut section by this Memory Controller, if and this trigger pip exist, this Memory Controller receive from this host computer system one media check instruction time, reply this media ready information to this host computer system.
15. memorizer memory devices according to claim 13, if wherein this trigger pip exists, this Memory Controller makes this memorizer memory devices simulate a power-off reclosing behavior, and this first cut section is modeled as a CD cut section, and when receiving the media inspection instruction from this host computer system, reply this media ready information to this host computer system.
16. memorizer memory devices according to claim 13, wherein also comprise:
One card reader, couples this Memory Controller, and wherein this trigger pip produced when one authorizes identification card to insert this card reader.
17. memorizer memory devices according to claim 16, wherein this mandate identification card record one second password and this second cut section record 1 the 3rd password, this Memory Controller obtains this second password and the 3rd password, and judge that whether this first password, this second password and the 3rd password are by a proving program, and by providing those logical blocks belonging to this second cut section to access to this host computer system during this proving program.
18. memorizer memory devices according to claim 13, wherein also comprise:
One switch module, couple this Memory Controller, this switch module is in order to produce this trigger pip when being in a particular state, wherein this particular state changes in response to the operation of an input element when this switch module, and this input element is a button, a button, a turn-knob, a seesaw, an or thumb-acting switch.
The access method of 19. 1 kinds of plug type memorizer memory devices, wherein this plug type memorizer memory devices has a storage area, and is suitable for coupling with a host computer system, and the method comprises:
Judge whether a trigger pip exists by this plug type memorizer memory devices, wherein this trigger pip is produced by a portable object and the interaction of this plug type memorizer memory devices;
Exist in response to this trigger pip, and transmit a ready information to this host computer system, make this host system application one first password;
Judge whether to provide this storage area to access to this host computer system according to from this first password of this host computer system and at least one the second password from this plug type memorizer memory devices; And
Do not exist in response to this trigger pip and receive from this host computer system one media check instruction time, and this storage area is not supplied to this host computer system access and reply media not yet ready information to this host computer system.
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| TWI548990B (en) * | 2013-05-17 | 2016-09-11 | 宇瞻科技股份有限公司 | Memory storage apparatus and method for restoring thereof, memory controller |
| CN103558994A (en) * | 2013-09-29 | 2014-02-05 | 记忆科技(深圳)有限公司 | Method for encrypting solid state disk partitions and solid state disk |
| CN106250785A (en) * | 2016-08-17 | 2016-12-21 | 成都市和平科技有限责任公司 | The guard method of a kind of data interruption transmission and data storage based on this guard method |
| CN109165532A (en) * | 2017-06-27 | 2019-01-08 | 慧荣科技股份有限公司 | Storage device management method and storage device management system |
| TWI681296B (en) * | 2018-09-28 | 2020-01-01 | 慧榮科技股份有限公司 | Apparatus and method and computer program product for accessing a memory card |
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| TW200722994A (en) * | 2005-12-08 | 2007-06-16 | Lightuning Tech Inc | Memory storage device with plug-and-play application programs function and method of protecting data therein |
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| US20030041160A1 (en) * | 2001-08-21 | 2003-02-27 | Sandman Robert James | Methods and systems for reducing command overhead |
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