CN102789430A - Memory storage device, memory controller and access method of storage device - Google Patents

Memory storage device, memory controller and access method of storage device Download PDF

Info

Publication number
CN102789430A
CN102789430A CN2011101280557A CN201110128055A CN102789430A CN 102789430 A CN102789430 A CN 102789430A CN 2011101280557 A CN2011101280557 A CN 2011101280557A CN 201110128055 A CN201110128055 A CN 201110128055A CN 102789430 A CN102789430 A CN 102789430A
Authority
CN
China
Prior art keywords
computer system
host computer
password
cut section
memory devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2011101280557A
Other languages
Chinese (zh)
Other versions
CN102789430B (en
Inventor
许家荣
许世贤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Phison Electronics Corp
Original Assignee
Phison Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Phison Electronics Corp filed Critical Phison Electronics Corp
Priority to CN201110128055.7A priority Critical patent/CN102789430B/en
Publication of CN102789430A publication Critical patent/CN102789430A/en
Application granted granted Critical
Publication of CN102789430B publication Critical patent/CN102789430B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

Disclosed are a memory storage device, a memory controller and an access method of the storage device. The memory storage device comprises a programmable nonvolatile memory chip provided with a plurality of solid blocks. The method includes configuring a plurality of logic blocks to map partial solid blocks, and dividing the logic blocks into at least a first partition and a second partition, wherein the first partition records an autorun file; determining whether a trigger signal exists, if exists, transmitting ready information of media to a host system so as to enable the host system to automatically operate the autorun file to receive a first password; and determining whether to provide the logic blocks belonging to the second partition for the host system to access according to the first password from the host system.

Description

Memorizer memory devices, its Memory Controller and access method
Technical field
The present invention relates to a kind of access method of memorizer memory devices, relate in particular to the method for a kind of need through the coded access memorizer memory devices, and memorizer memory devices and the Memory Controller of carrying out this method.
Background technology
Flash memory (Flash Memory) has that data are non-volatile, power saving, volume is little and characteristic such as no mechanical structure, so is widely used in various electronic installations.Little and the characteristic capacious and based on the volume of flash memory especially like portable memory devices such as carry-on dishes with its Storage Media as device inside.
In order to increase portability, the appearance design of portable memory device is also more and more lighter and handier, also causes easily comparatively speaking to lose and cause data wherein to leak.Therefore, many data are encrypted with authentication technology also arisen at the historic moment, with the data in the protection portable memory device.For instance, require the user to input the technology that password just is able to access data and also begin to adopt the multiple cipher cross validation gradually, improve data security according to this.
In addition; Also there is portable memory device partly that the automatic executing function of cryptoguard can be provided to operating platforms such as window operating systems; And then after computer system detects portable memory device, move above-mentioned functions automatically and come the requirement user to input password.Yet,, can cause sizable inconvenience undoubtedly if each desire is used all necessary input password of portable memory device when the user is in the comparatively safe like this environment for use of individual exclusive computing machine.Moreover the mode with the cryptoguard data most likely limits the trial input number of times of password, if the number of times of input error password surpasses preset value, portable memory device just can be locked.At this moment, the user must with the software of special use or even need go to the service retail sales of device manufacturer to carry out release, quite waste time and energy.
Summary of the invention
In view of this, the present invention provides a kind of access method, Memory Controller of memorizer memory devices, and memorizer memory devices, let the user more expediently access be provided with the memorizer memory devices of cryptoguard.
The present invention proposes a kind of access method of memorizer memory devices, and wherein memorizer memory devices has the duplicative nonvolatile memory chip, and the duplicative nonvolatile memory chip has a plurality of physical blocks.The method comprises the physical blocks of a plurality of blocks of configuration with the mapping part, and above-mentioned blocks is divided into first cut section and second cut section at least, and wherein first cut section record one automatically performs file.The method also comprises judges whether trigger pip exists.If trigger pip exists, then the ready information of transfer medium is moved host computer system automatically and is automatically performed file to receive first password to host computer system.The method comprises that also basis judges whether the blocks that belongs to second cut section is offered the host computer system access from first password of host computer system.
From another viewpoint, the present invention proposes a kind of Memory Controller, is used for the duplicative nonvolatile memory chip of diode-capacitor storage storage device.This Memory Controller comprises host system interface, memory interface, and memory management circuitry.Wherein, host system interface is in order to couple host computer system.Memory interface is in order to couple the duplicative nonvolatile memory chip, and this duplicative nonvolatile memory chip has a plurality of physical blocks.Memory management circuitry is coupled to host system interface and memory interface; Memory management circuitry is in order to dispose the physical blocks of a plurality of blocks with the mapping part; And above-mentioned blocks is divided into first cut section and second cut section at least, wherein first cut section record one automatically performs file.Also in order to judge whether trigger pip exists, the ready information of transfer medium is moved host computer system and is automatically performed file to receive first password to host computer system memory management circuitry automatically if trigger pip exists then.Memory management circuitry is also in order to judge whether the blocks that belongs to second cut section is offered the host computer system access according to first password from host computer system.
From another viewpoint, the present invention proposes a kind of memorizer memory devices, comprises duplicative nonvolatile memory chip, connector, and Memory Controller.The duplicative nonvolatile memory chip has a plurality of physical blocks.Connector is in order to couple host computer system.Memory Controller is coupled to duplicative nonvolatile memory chip and connector; Memory Controller is in order to dispose the physical blocks of a plurality of blocks with the mapping part; And above-mentioned blocks is divided into first cut section and second cut section at least, wherein first cut section record one automatically performs file.Also in order to judge whether trigger pip exists, the ready information of transfer medium is moved host computer system and is automatically performed file to receive first password to host computer system Memory Controller automatically if trigger pip exists then.Memory Controller is also in order to judge whether the blocks that belongs to second cut section is offered the host computer system access according to first password from host computer system.
From a viewpoint again, the present invention proposes a kind of access method of plug type memorizer memory devices, and this plug type memorizer memory devices has a storage area, and is suitable for coupling with host computer system.The method comprises by the plug type memorizer memory devices judges whether a trigger pip exists.Wherein, this trigger pip is by Portable object and the interactive generation of plug type memorizer memory devices.If trigger pip exists, then ready information is sent to host computer system, make host system application one first password.The plug type memorizer memory devices is according to judging whether the storage area is offered the host computer system access from first password of host computer system and at least one second password from the plug type memorizer memory devices.
Based on above-mentioned; When the present invention detects trigger pip at memorizer memory devices; Just make host computer system remove the password that file is imported with the reception user that automatically performs in the automatic run memory storage device, thereby judge whether to allow host computer system that memorizer memory devices is carried out access according to password.Because only the user just is able to therefore can increase the intensity with the cryptoguard data security through host computer system input password when trigger pip exists.
For letting the above-mentioned feature and advantage of the present invention can be more obviously understandable, hereinafter is special lifts embodiment, and conjunction with figs. elaborates as follows.
Description of drawings
Figure 1A is the synoptic diagram according to the host computer system of the use memorizer memory devices shown in one embodiment of the invention.
Figure 1B is the synoptic diagram according to the computing machine shown in the embodiment of the invention, input/output device and memorizer memory devices.
Fig. 1 C is the synoptic diagram according to host computer system shown in another embodiment of the present invention and memorizer memory devices.
Fig. 2 is the summary block scheme of the memorizer memory devices shown in Figure 1A.
Fig. 3 is the summary block scheme according to the Memory Controller shown in one embodiment of the invention.
Fig. 4 is the synoptic diagram according to the management entity block shown in one embodiment of the invention.
Fig. 5 is the configuration schematic diagram according to the blocks shown in one embodiment of the invention.
Fig. 6 A to 6C is the synoptic diagram according to the access memory storage device shown in one embodiment of the invention.
Fig. 7 is the process flow diagram according to the access method of the memorizer memory devices shown in one embodiment of the invention.
Reference numeral:
1000: host computer system
1100: computing machine
1102: microprocessor
1104: RAS
1106: input/output device
1108: system bus
1110: data transmission interface
1111: in build storage device
10: operating system
1202: mouse
1204: keyboard
1206: display
1208: printer
1212: coil with oneself
1214: memory card
1216: solid state hard disc
1310: digital camera
The 1312:SD card
The 1314:MMC card
1316: memory stick
The 1318:CF card
1320: embedded storage device
100: memorizer memory devices
102: connector
104: Memory Controller
106: the duplicative nonvolatile memory chip
1041: host system interface
1043: memory management circuitry
1045: memory interface
3002: memory buffer
3004: electric power management circuit
3006: bug check and correcting circuit
410 (0)~410 (N): physical blocks
502: the data field
504: idle district
506: system region
508: replace the district
610 (0)~610 (L): blocks
710: the first cut sections
710a: automatically perform file
720: the second cut sections
810: CR
810a: authorize identification card
S710~S770: each step of the access method of the described memorizer memory devices of one embodiment of the invention
Embodiment
Generally speaking, memorizer memory devices (also claiming memory storage system) comprises memory chip and controller (also claiming control circuit).Usually memorizer memory devices can use with host computer system, so that host computer system can write to memorizer memory devices or reading of data from memorizer memory devices with data.In addition, memorizer memory devices also being arranged is to comprise embedded storer and can be executed on the host computer system with substantially as the software of the controller of this embedded storer.
Figure 1A is the synoptic diagram according to the host computer system of the use memorizer memory devices shown in one embodiment of the invention.
Host computer system 1000 comprises computing machine 1100 and I/O (Input/Output, I/O) device 1106.Computing machine 1100 comprise microprocessor 1102, RAS (Random Access Memory, RAM) 1104, system bus 1108, data transmission interface 1110 and in build storage device 1111.Input/output device 1106 comprises mouse 1202, keyboard 1204, the display 1206 and printer 1208 shown in Figure 1B.It must be appreciated, the unrestricted input/output device 1106 of the device shown in Figure 1B, input/output device 1106 can also comprise other devices.
In embodiments of the present invention, memorizer memory devices 100 is to couple through data transmission interface 1110 other elements with host computer system 1000.Memorizer memory devices 100 for example is the storage device of plug type.By the running of microprocessor 1102, RAS 1104, input/output device 1106 with the operating system 10 of building storage device 1111 in promptly being installed in; Host computer system 1000 can write to memorizer memory devices 100 with data, or from memorizer memory devices 100 reading of data.For example, memorizer memory devices 100 can be shown in Figure 1B memory card 1214, coil 1212 or solid state hard disc (Solid State Drive, SSD) 1216 with oneself.
Generally speaking, but host computer system 1000 is any system of storage data.Though host computer system 1000 is to explain with computer system in the present embodiment; Yet; In another embodiment of the present invention, host computer system 1000 can also be systems such as mobile phone, digital camera, video camera, communication device, audio player or video player.For example; When host computer system is digital camera 1310; Memorizer memory devices then is its employed safe digital (Secure Digital; SD) card 1312, multimedia memory (Multimedia Card, MMC) card 1314, memory stick (Memory Stick) 1316, compact flash (Compact Flash, CF) card 1318 or embedded storage device 1320 (shown in Fig. 1 C).Embedded storage device 1320 comprise embedded multimedia card (Embedded MMC, eMMC).What deserves to be mentioned is that embedded multimedia card is directly to be coupled on the substrate of host computer system.
Fig. 2 is the block scheme of the memorizer memory devices 100 shown in Figure 1A.See also Fig. 2, memorizer memory devices 100 comprises connector 102, Memory Controller 104 and duplicative nonvolatile memory chip 106.
Connector 102 is coupled to Memory Controller 104, and in order to couple host computer system 1000.In the present embodiment, the transmission interface kind that connector 102 is supported is USB (Universal Serial Bus, USB) interface.Yet in other embodiments; The transmission interface kind of connector 102 also can be Serial Advanced Technology Attachment (Serial Advanced Technology Attachment; SATA) interface, Multi Media Card (Multimedia Card, MMC) interface, parallel Advanced Technology Attachment (Parallel Advanced Technology Attachment, PATA) interface, Institute of Electrical and Electric Engineers (Institute of Electrical and Electronic Engineers; IEEE) 1394 interfaces, high-speed peripheral component connecting interface (Peripheral Component Interconnect Express; PCIExpress) interface, safe digital (Secure Digital, SD) interface, memory stick (Memory Stick, MS) interface, compact flash (Compact Flash; CF) interface; Or integrated driving electronics (Integrated Drive Electronics, IDE) any suitable interface such as interface does not limit at this.
Memory Controller 104 can be carried out with hardware pattern or real a plurality of logic gates or the steering order of doing of firmware pattern, and in duplicative nonvolatile memory chip 106, carries out the runnings such as writing, read and erase of data according to the instruction of host computer system 1000.Wherein, Memory Controller 104 also comes the access right of keyholed back plate to memorizer memory devices 100 in order to the access method according to the memorizer memory devices of present embodiment especially, according to this data in the protected storage storage device 100.The access method of the memorizer memory devices of present embodiment will cooperate diagram to remake explanation in the back.
Duplicative nonvolatile memory chip 106 is coupled to Memory Controller 104.Duplicative nonvolatile memory chip 106 is in order to store like file allocation list (File Allocation Table; FAT) or (the New Technology File System of enhanced file system; Filesystem information such as NTFS), and store like general data such as literal, image or audio files.For instance; Duplicative nonvolatile memory chip 106 is multi-level cell memory (Multi Level Cell; MLC) NAND flash memory chip; But the invention is not restricted to this, duplicative nonvolatile memory chip 106 also can be single-order storage unit (Single Level Cell, SLC) NAND flash memory chip, other flash memory chips or any memory chip with identical characteristics.
Fig. 3 is the summary block scheme according to the Memory Controller shown in one embodiment of the invention.See also Fig. 3, Memory Controller 104 comprises host system interface 1041, memory management circuitry 1043, and memory interface 1045.
Host system interface 1041 is coupled to memory management circuitry 1043, and through connector 102 to couple host computer system 1000.Host system interface 1041 is in order to receive instruction and the data that transmitted with identification host computer system 1000.In view of the above, the instruction and the data that are transmitted of host computer system 1000 can be sent to memory management circuitry 1043 through host system interface 1041.In the present embodiment; Host system interface 1041 corresponding connectors 102 and be USB interface; And in other embodiments, host system interface 1041 also can be SATA interface, MMC interface, PATA interface, IEEE 1394 interfaces, PCI Express interface, SD interface, MS interface, CF interface, ide interface or the interface that meets other interface standards.
Memory management circuitry 1043 is in order to the overall operation of control store controller 104.Specifically, memory management circuitry 1043 has a plurality of steering orders, and when memorizer memory devices 100 runnings, above-mentioned steering order can be performed the access method with the memorizer memory devices of realizing present embodiment.
In one embodiment, the steering order of memory management circuitry 1043 is to come real the work with the firmware pattern.For example, memory management circuitry 1043 has microprocessor unit (not shown) and ROM (read-only memory) (not shown), and above-mentioned steering order by burning in ROM (read-only memory).When memorizer memory devices 100 runnings, above-mentioned steering order can be carried out the access method with the memorizer memory devices of accomplishing present embodiment by microprocessor unit.
In another embodiment of the present invention; The steering order of memory management circuitry 1043 can also the procedure code pattern be stored in the specific region (for example, being exclusively used in the system region of storage system data in the duplicative nonvolatile memory chip 106) of duplicative nonvolatile memory chip 106.In addition, memory management circuitry 1043 has microprocessor unit (not shown), ROM (read-only memory) (not shown) and RAS (not shown).Wherein, ROM (read-only memory) has the sign indicating number of driving section; And when Memory Controller 104 was enabled, microprocessor unit can be carried out this driving yard steering order that section will be stored in the duplicative nonvolatile memory chip 106 earlier and be loaded in the RAS of memory management circuitry 1043.Afterwards, microprocessor unit can move the access method of above-mentioned steering order with the memorizer memory devices of execution present embodiment.In addition, in another embodiment of the present invention, the steering order of memory management circuitry 1043 can also a hardware pattern be come real the work.
Memory interface 1045 is coupled to memory management circuitry 1043, so that Memory Controller 104 couples with duplicative nonvolatile memory chip 106 mutually.In view of the above, Memory Controller 104 can be to duplicative nonvolatile memory chip 106 running of being correlated with.That is to say that the data of desiring to write to duplicative nonvolatile memory chip 106 can convert 106 receptible forms of duplicative nonvolatile memory chip into via memory interface 1045.
In one embodiment of this invention, Memory Controller 104 also comprises memory buffer 3002.Memory buffer 3002 can be static RAM (Static Random Access Memory, SRAM) or dynamic RAM (Dynamic Random Access Memory, DRAM) etc., the present invention does not limit.Memory buffer 3002 is coupled to memory management circuitry 1043, in order to the temporary data that come from host computer system 1000, or the temporary data that come from duplicative nonvolatile memory chip 106.
In another embodiment of the present invention, Memory Controller 104 also comprises electric power management circuit 3004.Electric power management circuit 3004 is coupled to memory management circuitry 1043, in order to the power supply of control store storage device 100.
In further embodiment of this invention, Memory Controller 104 also comprises bug check and correcting circuit 3006.Bug check and correcting circuit 3006 are coupled to memory management circuitry 1043, in order to execution error inspection and correction program to guarantee the correctness of data.Particularly; When memory management circuitry 1043 receives when instruction of writing from host computer system 1000; Bug check can produce corresponding bug check and correcting code (Error Checking and Correcting Code for the corresponding data that this writes instruction with correcting circuit 3006; ECC Code), and memory management circuitry 1043 can corresponding these data that write instruction be write to duplicative nonvolatile memory chip 106 with corresponding bug check and correcting code.Afterwards when memory management circuitry 1043 from duplicative nonvolatile memory chip 106 during reading of data; Can read this data corresponding bug check and correcting code simultaneously, and bug check is understood according to this bug check and data execution error inspection and the correction program of correcting code to being read with correcting circuit 3006.
Fig. 4 is the synoptic diagram according to the management entity block shown in one embodiment of the invention.
See also Fig. 4, the duplicative nonvolatile memory chip 106 of present embodiment comprises physical blocks 410 (0)~410 (N), and each physical blocks comprises several physical page.Memory management circuitry 1043 in the Memory Controller 104 can logically be grouped into physical blocks 410 (0)~410 (N) data field 502, idle district 504, system region 506 and replace district 508.Wherein, the F that Fig. 4 indicated, S, R and N are positive integer, the physical blocks quantity of each district's configuration of representative, and it can be set according to the capacity of employed duplicative nonvolatile memory chip 106 by the manufacturer of memorizer memory devices 100.
The physical blocks that belongs to data field 502 and idle district 504 in logic is the data that come from host computer system 1000 in order to storage.Specifically, the physical blocks of data field 502 is to be regarded as the physical blocks of storage data, and the physical blocks in idle district 504 is the physical blocks in order to replacement data district 502.In other words, the physical blocks in idle district 504 is empty or spendable physical blocks (no record data or be labeled as invalid data useless).When receiving the data that write instruction and desire to write from host computer system 1000, memory management circuitry 1043 can be extracted physical blocks from idle district 504, and data are write in the physical blocks of being extracted, with the physical blocks in replacement data district 502.
The physical blocks that belongs to system region 506 in logic is in order to the register system data.For instance, system data comprises about information such as the manufacturer of duplicative nonvolatile memory chip 106 and models.
When belonging to the physical blocks that replaces district 508 in logic and be in order to the physical blocks damage in data field 502, idle district 504 or system region 506, replacing damaged physical blocks.Particularly, if replace when distinguishing the physical blocks damage that still has normal physical blocks and data field 502 in 508, memory management circuitry 1043 meetings normal physical blocks of extraction from replace district 508 changed the physical blocks of damage in the data field 502.
In order to let host computer system 1000 carry out access to duplicative nonvolatile memory chip 106, memory management circuitry 1043 can dispose several blocks 610 (0)~610 (L) with the physical blocks in the mapping (enum) data district 502 410 (0)~410 (F-1).Wherein each blocks comprises a plurality of logical page (LPAGE)s, and the logical page (LPAGE) in the blocks 610 (0)~610 (L) can shine upon the physical page in the physical blocks 410 (0)~410 (F-1) in regular turn.
In detail; Memory management circuitry 1043 offers host computer system 1000 with the blocks that is disposed 610 (0)~610 (L), and service logic block-physical blocks mapping table (logical block-physical block mapping table) is with the mapping relations of record blocks 610 (0)~610 (L) with physical blocks 410 (0)~410 (F-1).Therefore; When host computer system 1000 is desired access one logic access address; Memory management circuitry 1043 can convert this logic access address into the logical page (LPAGE) of corresponding blocks, finds its physical page of shining upon to carry out access through blocks-physical blocks mapping table again.
Fig. 5 is the configuration schematic diagram according to the blocks shown in one embodiment of the invention.See also Fig. 5, memory management circuitry 1043 is divided into first cut section 710 that comprises blocks 610 (0)~610 (P) and second cut section 720 that comprises blocks 610 (P+1)~610 (L) with blocks 610 (0)~610 (L).Wherein, first cut section 710 record before memorizer memory devices 100 dispatches from the factory just burning good automatically perform file.Second cut section 720 (also being referred to as the storage area) then is the cut section of hiding, and needs just to be able to access through password authentification.What must specify is, the present invention does not limit the quantity of cut section, and in other embodiments, memory management circuitry 1043 also can be divided into the cut section more than three with blocks 610 (0)~610 (L).
In the present embodiment; When memorizer memory devices 100 is coupled to host computer system 1000; Can the data of host computer system 1000 in still can't access memory storage device 100 need whether to decide host computer system 1000 carry out further access action to the data in the memorizer memory devices 100 by memory management circuitry 1043 according to the existence of a trigger pip.Wherein, trigger pip is by a Portable object (for example, contactless card, electronic key, or non-electronic key etc.) and memorizer memory devices 100 interactive generations, and interactive mode comprises that contact such as electrical connection is interactive, or contactless interaction such as magnetic induction.
The mode of the access of memory management circuitry 1043 keyholed back plate memorizer memory devices 100 below will be described with Fig. 6 A to 6C.In the present embodiment, memorizer memory devices 100 comprises the CR 810 that is coupled to memory management circuitry 1043, and trigger pip then is when one authorizes identification card to insert CR 810, to produce.Wherein, authorizing the kind of identification card can be smart card (Smart Card) or safe digital card, does not limit at this.At length say, just can send signalisation memory management circuitry 1043 in case CR 810 has detected the card insertion, memory management circuitry 1043 can judge whether the card that inserts is the identification card through mandate.
See also Fig. 6 A, in the present embodiment, memory management circuitry 1043 is modeled as the CD cut section with first cut section 710.Therefore after memorizer memory devices 100 is coupled to host computer system 1000 through connector 102; When host computer system 1000 during to its device characteristics of memorizer memory devices 100 inquiry; Memory management circuitry 1043 can (for example be declared as CD player with memorizer memory devices 100; CD (Compact Disc; CD) machine, digital video disk (Digital Video Disc, DVD) machine, Blu-ray Disc (Blue-Ray Disc) machine or the like), and the operating system 10 of host computer system 1000 can configuration one mounting points (mount point) be come carry (mount) CD player.In view of the above, memory management circuitry 1043 just can receive the instruction from host computer system 1000 through mounting points.For instance, operating system 10 can regularly constantly be assigned medium inspection instruction in the inquiry CD player whether medium (discs) are arranged through mounting points.At this moment, because CR 810 does not detect the insertion of authorizing identification card as yet, thereby does not produce trigger pip, so memory management circuitry 1043 can be with the not ready as yet information-reply of medium to host computer system 1000.Further, host computer system 1000 not only can't be discerned the existence of second cut section 720 at this moment, and can assert that memorizer memory devices 100 is CD players of also not putting into any medium.
Then see also Fig. 6 B; If have one to authorize identification card 810a to be inserted into CR 810; Memory management circuitry 1043 judges that thereupon trigger pip exists; Thereby after the medium inspection instruction that receives from host computer system 1000, a ready information (for example, the ready information of medium) is returned back to host computer system 1000.Next, the operating system in the host computer system 1,000 10 can automatic loggings automatically performs file 710a in first cut section 710.In the present embodiment, automatically performing file 710a is the script file (for example, the script file (script file) of file " autorun.inf " by name) that operating system 10 is automatically performed, and writes down the application-specific that will be automatically performed.Operating system 10 is after operation automatically performs file 710a automatically, and application-specific will be executed in host computer system 1000 and require the user to input password, and host computer system 1000 can be sent to memorizer memory devices 100 with the password of user's input.Below the user is referred to as first password in the password of host computer system 1000 input; Host computer system 1000 for example can be used earlier and (for example encrypt algorithm; The rsa encryption algorithm) first password is carried out computing, the result after will encrypting again is sent to memorizer memory devices 100.
Because first password does not pass through the authentication of memorizer memory devices 100 as yet; So the time host computer system 1000 can't discern second cut section 720; Must obtain from the encrypted result of host computer system 1000 and after restoring first password, judge whether and can second cut section 720 be offered host computer system 1000 accesses by memory management circuitry 1043 according to first password.In detail, memory management circuitry 1043 is to carry out proving program according to first password and from another (or a plurality of) password of memorizer memory devices 100, thereby judges whether second cut section 720 is offered host computer system 1000 accesses.
For instance, in the present embodiment, authorize to record second password among the identification card 810a and second cut section 720 records the 3rd password.Memory management circuitry 1043 can obtain second and third password respectively from authorizing the identification card 810a and second cut section 720.Wherein, The second and the 3rd password also has when being sent to memory management circuitry 1043 through encrypting; Therefore memory management circuitry 1043 need be deciphered earlier to reduce its value, judges that more whether first password, second password and the 3rd password are through a proving program.For instance, memory management circuitry 1043 can to first password and second password carry out mutual exclusion or (Exclusive-OR, XOR) computing, and judge operation result whether with the 3rd passwords match.If then the decision verification program is passed through, the blocks 610 (P+1)~610 (L) that memory management circuitry 1043 will belong to second cut section 720 offers host computer system 1000 accesses.If can't pass through proving program, then second cut section 720 is remained on hidden state.In another embodiment; Whether memory management circuitry 1043 can only pass through proving program according to first password with authorizing second password among the identification card 810a; Or only whether determine whether second cut section 720 is offered host computer system 1000 accesses through proving program according to the 3rd password in first password and second cut section 720; Untapped password then need not be provided with.Mandatory declaration be whether the present invention does not limit proving program, in other embodiments, also can adopt first password that other modes verify that the user inputs and second password and/or the 3rd password from memorizer memory devices 100 to coincide.
If proving program passes through, shown in Fig. 6 C, memory management circuitry 1043 is the devices that comprise CD player and high capacity storage device to host computer system 1000 declaration memorizer memory devices 100.Base this, operating system 10 can two mounting points of configuration, except with first cut section, 710 carries of corresponding CD player to one of them mounting points, also can be with second cut section, 720 carries of corresponding high capacity storage device to another mounting points.Thus, host computer system 1000 just can read the data in second cut section 720, also can data be write to second cut section 720.
Yet in case authorize identification card 810a to be detached from CR 810, trigger pip just no longer exists.At this moment, memory management circuitry 1043 blocks 610 (P+1)~610 (L) that no longer will belong to second cut section 720 offers host computer system 1000 accesses.And when receiving from the medium of host computer system 1000 inspection instruction, memory management circuitry 1043 can be with the not ready as yet information-reply of medium to host computer system 1000.In other words, this moment, host computer system 1000 meetings be identified as the CD player (shown in Fig. 6 A) of not putting into any medium with memorizer memory devices 100 once again.
In another embodiment, memory management circuitry 1043 is not modeled as the CD cut section with first cut section 710 in advance.Therefore when memorizer memory devices 100 is coupled to host computer system 1000 through connector 102, the type of device that host computer system 1000 can't recognition memory storage device 100.
In the case, produce trigger pip if there is the identification card of mandate to be inserted into CR, memory management circuitry 1043 can judged under the situation that trigger pip exists, and makes memorizer memory devices 100 simulations one outage reclosing behavior.That is; Memory management circuitry 1043 can send specific instruction indication host system interface 1041 interrupt coupling with data transmission interface 1110 (that is; Make connector 102 and host computer system 1000 become non-coupling access status) and couple again again (that is; Make connector 102 and host computer system 1000 become coupling access status again), and then let host computer system 1000 inquire the identifying information of memorizer memory devices 100 again.At this moment, memory management circuitry 1043 is modeled as first cut section 710 the CD cut section and is CD player to host computer system 1000 declaration memorizer memory devices 100.When receiving from the medium of host computer system 1000 inspection instruction; Memory management circuitry 1043 with the ready information-reply of medium to host computer system 1000; Make the operating system 10 automatic operations of host computer system 1000 be stored in the file that automatically performs of first cut section 710, and require the user to input password (i.e. first password).
Memory management circuitry 1043 is receiving the user behind first password that host computer system 1000 is inputed, and can carry out proving program with the mode of similar previous embodiment.That is; Judge first password, second password from authorizing identification card to obtain; And whether the 3rd password of being obtained from second cut section 720 through proving program, and the blocks 610 (P+1)~610 (L) that when judging through proving program, will belong to second cut section 720 offers host computer system 1000 accesses.In another embodiment; Memory management circuitry 1043 also can receive the user behind first password that host computer system 1000 is inputed; Only utilize judge first password, and from second password of authorizing identification card to obtain " or " whether the 3rd password obtained from second cut section 720 through proving program, to determine whether blocks 610 (P+1)~610 (L) is offered host computer system 1000 accesses.That is in the present embodiment, proving program only need use first password and second password, or first password and the 3rd password, and untapped password then need not be provided with, and proving program can use symmetrical algorithm or other modes.
Likewise, in case authorize identification card to be pulled out CR (trigger pip does not exist), 1043 of memory management circuitry no longer let 1000 pairs second cut sections of host computer system 720 carry out access.
In the above-described embodiments; Be to trigger host computer system 1000 by the behavior of authorizing identification card to insert CR to remove the file that automatically performs in the automatic run memory storage device 100; And then require the user to input password, and judge whether being offered host computer system 1000 accesses by second cut section of hiding 720 originally according to this password.In other words, the user must could import password with authorizing identification card to insert CR, and this kind pattern can improve the threshold of release and increase data security.And the behavior meeting of in the above-described embodiments, authorizing identification card to pull out from CR is converted to memorizer memory devices 100 automatically can not be by the lock-out state of host computer system 1000 accesses.Therefore, as long as just the user will authorize identification card to pull out and can easily memorizer memory devices 100 be locked from CR, increase the convenience of protected data.
Though be to produce trigger pip to authorize identification card to insert CR in the above-described embodiments, the present invention does not limit the producing method of trigger pip.For instance; In other embodiments; Memorizer memory devices 100 comprises the switch module that is coupled to memory management circuitry 1043, and the shell of memorizer memory devices 100 has an input element, and input element is coupled to the switch module and can changes the state of switch module.Wherein, input element can be button, button, turn-knob, seesaw, or thumb-acting switch or the like.When the switch module is in particular state in response to the operation of input element, just can produce trigger pip, make that the operating system 10 automatic files that automatically perform that move in first cut sections 710 in the host computer system 1000 come the requirement user to input password.Memory management circuitry 1043 can judge whether second cut section 720 in the duplicative nonvolatile memory chip 106 is offered host computer system 1000 accesses with the mode of similar previous embodiment.
Fig. 7 is the process flow diagram according to the access method of the memorizer memory devices shown in one embodiment of the invention.
See also Fig. 7, at first shown in step S710, the memory management circuitry 1043 configuration logic blocks 610 (0)~610 (L) in the memorizer memory devices 100 are with the physical blocks 410 (0)~410 (F-1) in the mapping duplicative nonvolatile memory chip 106.And shown in step S720, memory management circuitry 1043 is divided into first cut section 710 and second cut section 720 with all blocks 610 (0)~610 (L), and wherein first cut section, 710 records one automatically perform file.
Then shown in step S730, memory management circuitry 1043 judges whether trigger pip exists.For instance, if memorizer memory devices 100 has CR, trigger pip for example is when one authorizes identification card to insert CR, to produce.If memorizer memory devices 100 has the switch module, trigger pip can be when the switch module is in particular state, to produce.
If trigger pip exists; Then shown in step S740; When memory management circuitry 1043 is sent medium inspection instruction in host computer system 1000; The ready information of medium is sent to host computer system 1000, makes the automatically perform file of host computer system 1000 automatic loggings in first cut section 710 pass through first password that host computer system 1000 is imported to receive the user.
Then in step S750, memory management circuitry 1043 judges whether the blocks that belongs to second cut section 720 610 (P+1)~610 (L) is offered host computer system 1000 accesses according to first password from host computer system 1000.Because judgment mode is in the previous embodiment explanation, so repeat no more at this.
If trigger pip does not exist, then shown in step S760, the blocks 610 (P+1)~610 (L) that memory management circuitry 1043 will not belong to second cut section 720 offers host computer system 1000 accesses.And shown in step S770, when receiving from the medium of host computer system 1000 inspection instruction, memory management circuitry 1043 with the not ready as yet information-reply of medium to host computer system 1000.
Couple at memorizer memory devices 100 under the situation of host computer system 1000; The access method of the described memorizer memory devices of present embodiment repeatedly execution in step S730 to step S770; When trigger pip does not exist, forbid host computer system 1000 access memory storage devices 100 according to this, and when trigger pip exists, judge to make and do not allow host computer system 1000 access memory storage devices 100 according to the password correctness of user input.
In sum; Memorizer memory devices of the present invention, its Memory Controller and access method can authorize the modes such as state of identification card or adjustment switch module to produce trigger pip by inserting; And have only under the situation that trigger pip exists, just allow the user to pass through host computer system input password.In view of the above, facilitate and safe mode is come the access right of memorizer memory devices keyholed back plate in addition.
Though the present invention discloses as above with embodiment, so it is not in order to limiting the present invention, any under those of ordinary skill in the technical field, when can doing a little change and retouching, and do not break away from the spirit and scope of the present invention.

Claims (22)

1. the access method of a memorizer memory devices, wherein this memorizer memory devices has a duplicative nonvolatile memory chip, and this duplicative nonvolatile memory chip has a plurality of physical blocks, and this method comprises:
Dispose a plurality of blocks those physical blocks with the mapping part;
Those blocks are divided into one first cut section and one second cut section at least, and wherein this first cut section record one automatically performs file;
Judge whether a trigger pip exists;
If this trigger pip exists, then transmit ready information to one host computer system of medium, make this host computer system move this automatically and automatically perform file to receive one first password; And
Judge whether those blocks that belong to this second cut section are offered this host computer system access according to this first password from this host computer system.
2. the access method of memorizer memory devices according to claim 1, wherein this first cut section is modeled as a CD cut section, if this trigger pip exists the step that then transmits the ready information of these medium to this host computer system to comprise:
When receiving, reply the ready information of these medium to this host computer system from medium of this host computer system inspection instruction.
3. the access method of memorizer memory devices according to claim 1, wherein if this trigger pip exists the step that then transmits the ready information of these medium to this host computer system to comprise:
Make this memorizer memory devices simulation one outage reclosing behavior;
This first cut section is modeled as a CD cut section; And
When receiving, reply the ready information of these medium to this host computer system from medium of this host computer system inspection instruction.
4. the access method of memorizer memory devices according to claim 1, wherein this memorizer memory devices comprises a CR, and this trigger pip is when one authorizes identification card to insert this CR, to produce.
5. the access method of memorizer memory devices according to claim 4; Wherein this mandate identification card writes down one second password and this second cut section writes down one the 3rd password, and judges whether that according to this first password from this host computer system the step that those blocks that belong to this second cut section is offered this host computer system access comprises:
Obtain this second password and the 3rd password;
Judge that whether this first password, this second password and the 3rd password are through a proving program; And
If, then provide those blocks that belong to this second cut section to this host computer system access through this proving program.
6. the access method of memorizer memory devices according to claim 1, wherein this trigger pip be a switch module on this memorizer memory devices when being in a particular state produce.
7. the access method of memorizer memory devices according to claim 1 wherein also comprises:
If this trigger pip does not exist, those blocks that then will not belong to this second cut section offer this host computer system access; And
When receiving, reply the not ready as yet information of medium to this host computer system from medium of this host computer system inspection instruction.
8. Memory Controller is used for managing a duplicative nonvolatile memory chip of a memorizer memory devices, and this Memory Controller comprises:
One host system interface is in order to couple a host computer system;
One memory interface, in order to couple this duplicative nonvolatile memory chip, wherein this duplicative nonvolatile memory chip has a plurality of physical blocks; And
One memory management circuitry; Be coupled to this host system interface and this memory interface; This memory management circuitry is in order to dispose a plurality of blocks those physical blocks with the mapping part; And those blocks are divided into one first cut section and one second cut section at least, wherein this first cut section record one automatically performs file
This memory management circuitry then transmits ready information to one host computer system of medium also in order to judging whether a trigger pip exists if this trigger pip exists, and make this host computer system move this automatically and automatically perform file receiving one first password,
This memory management circuitry is also in order to judge whether those blocks that belong to this second cut section are offered this host computer system access according to this first password from this host computer system.
9. Memory Controller according to claim 8; Wherein this memory management circuitry is modeled as a CD cut section with this first cut section; If this trigger pip exists this memory management circuitry then when the medium inspection instruction that receives from this host computer system, reply the ready information of these medium to this host computer system.
10. Memory Controller according to claim 8; Wherein this memory management circuitry makes this memorizer memory devices simulation one outage reclosing behavior if this trigger pip exists then; And this first cut section is modeled as a CD cut section; And when receiving, reply the ready information of these medium to this host computer system from medium of this host computer system inspection instruction.
11. Memory Controller according to claim 8, wherein this memorizer memory devices comprises a CR, and this trigger pip is when one authorizes identification card to insert this CR, to produce.
12. Memory Controller according to claim 11; Wherein this mandate identification card writes down one second password and this second cut section writes down one the 3rd password; This memory management circuitry obtains this second password and the 3rd password; And whether judge this first password, this second password and the 3rd password, and through this proving program the time, provide those blocks that belong to this second cut section to this host computer system access through a proving program.
13. Memory Controller according to claim 8, wherein this trigger pip be a switch module on this memorizer memory devices when being in a particular state produce.
14. Memory Controller according to claim 8; Wherein if this trigger pip does not exist; Those blocks that this memory management circuitry will not belong to this second cut section offer this host computer system access; And when receiving, reply the not ready as yet information of medium to this host computer system from medium of this host computer system inspection instruction.
15. a memorizer memory devices comprises:
One duplicative nonvolatile memory chip has a plurality of physical blocks;
A connector is in order to couple a host computer system; And
One Memory Controller; Be coupled to this duplicative nonvolatile memory chip and this connector; This Memory Controller is in order to dispose a plurality of blocks those physical blocks with the mapping part; And those blocks are divided into one first cut section and one second cut section at least, wherein this first cut section record one automatically performs file
This Memory Controller then transmits ready information to one host computer system of medium also in order to judging whether a trigger pip exists if this trigger pip exists, and make this host computer system move this automatically and automatically perform file receiving one first password,
This Memory Controller is also in order to judge whether those blocks that belong to this second cut section are offered this host computer system access according to this first password from this host computer system.
16. memorizer memory devices according to claim 15; Wherein this Memory Controller is modeled as a CD cut section with this first cut section; And, reply the ready information of these medium to this host computer system if this trigger pip exists this Memory Controller then when the medium inspection instruction that receives from this host computer system.
17. memorizer memory devices according to claim 15; Wherein this Memory Controller makes this memorizer memory devices simulation one outage reclosing behavior if this trigger pip exists then; And this first cut section is modeled as a CD cut section; And when receiving, reply the ready information of these medium to this host computer system from medium of this host computer system inspection instruction.
18. memorizer memory devices according to claim 15 wherein also comprises:
One CR couples this Memory Controller, and wherein this trigger pip is when one authorizes identification card to insert this CR, to produce.
19. memorizer memory devices according to claim 18; Wherein this mandate identification card writes down one second password and this second cut section writes down one the 3rd password; This Memory Controller is obtained this second password and the 3rd password; And whether judge this first password, this second password and the 3rd password, and through this proving program the time, provide those blocks that belong to this second cut section to this host computer system access through a proving program.
20. memorizer memory devices according to claim 15 wherein also comprises:
One switch module couples this Memory Controller, and this switch module is in order to produce this trigger pip when being in a particular state.
21. memorizer memory devices according to claim 15; Wherein if this trigger pip does not exist; Those blocks that this Memory Controller will not belong to this second cut section offer this host computer system access; And when receiving, reply the not ready as yet information of medium to this host computer system from medium of this host computer system inspection instruction.
22. the access method of a plug type memorizer memory devices, wherein this plug type memorizer memory devices has a storage area, and is suitable for coupling with a host computer system, and this method comprises:
Judge by this plug type memorizer memory devices whether a trigger pip exists, wherein this trigger pip is by a Portable object and the interactive generation of this plug type memorizer memory devices;
If this trigger pip exists, the ready information that then transmits makes this host system application one first password to this host computer system; And
According to judging whether to provide this storage area to this host computer system access from this first password of this host computer system and at least one second password from this plug type memorizer memory devices.
CN201110128055.7A 2011-05-18 2011-05-18 Memorizer memory devices, its Memory Controller and access method Active CN102789430B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110128055.7A CN102789430B (en) 2011-05-18 2011-05-18 Memorizer memory devices, its Memory Controller and access method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110128055.7A CN102789430B (en) 2011-05-18 2011-05-18 Memorizer memory devices, its Memory Controller and access method

Publications (2)

Publication Number Publication Date
CN102789430A true CN102789430A (en) 2012-11-21
CN102789430B CN102789430B (en) 2015-11-18

Family

ID=47154834

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110128055.7A Active CN102789430B (en) 2011-05-18 2011-05-18 Memorizer memory devices, its Memory Controller and access method

Country Status (1)

Country Link
CN (1) CN102789430B (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103558994A (en) * 2013-09-29 2014-02-05 记忆科技(深圳)有限公司 Method for encrypting solid state disk partitions and solid state disk
CN104166636A (en) * 2013-05-17 2014-11-26 宇瞻科技股份有限公司 Memory storage device and restoration method thereof and memory controller
CN106250785A (en) * 2016-08-17 2016-12-21 成都市和平科技有限责任公司 The guard method of a kind of data interruption transmission and data storage based on this guard method
CN109165532A (en) * 2017-06-27 2019-01-08 慧荣科技股份有限公司 Storage device management method and storage device management system
TWI681296B (en) * 2018-09-28 2020-01-01 慧榮科技股份有限公司 Apparatus and method and computer program product for accessing a memory card

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030041160A1 (en) * 2001-08-21 2003-02-27 Sandman Robert James Methods and systems for reducing command overhead
US20050015540A1 (en) * 2003-07-18 2005-01-20 Hung-Chou Tsai Auto-executable portable data storage device and the method of auto-execution thereof
CN1300711C (en) * 2003-04-30 2007-02-14 日商.萩原科技股份有限公司 Usb storage device and program
US20070112979A1 (en) * 2005-11-16 2007-05-17 Phison Electronics Corp. [portable storage device with auto-executable program]
TW200722994A (en) * 2005-12-08 2007-06-16 Lightuning Tech Inc Memory storage device with plug-and-play application programs function and method of protecting data therein
US20100169510A1 (en) * 2008-12-31 2010-07-01 Yi-Chen Ho Auto-execution signal processing method and apparatus performing the method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030041160A1 (en) * 2001-08-21 2003-02-27 Sandman Robert James Methods and systems for reducing command overhead
CN1300711C (en) * 2003-04-30 2007-02-14 日商.萩原科技股份有限公司 Usb storage device and program
US20050015540A1 (en) * 2003-07-18 2005-01-20 Hung-Chou Tsai Auto-executable portable data storage device and the method of auto-execution thereof
US20070112979A1 (en) * 2005-11-16 2007-05-17 Phison Electronics Corp. [portable storage device with auto-executable program]
TW200722994A (en) * 2005-12-08 2007-06-16 Lightuning Tech Inc Memory storage device with plug-and-play application programs function and method of protecting data therein
US20100169510A1 (en) * 2008-12-31 2010-07-01 Yi-Chen Ho Auto-execution signal processing method and apparatus performing the method

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104166636A (en) * 2013-05-17 2014-11-26 宇瞻科技股份有限公司 Memory storage device and restoration method thereof and memory controller
CN104166636B (en) * 2013-05-17 2017-04-12 宇瞻科技股份有限公司 Memory storage device and restoration method thereof and memory controller
CN103558994A (en) * 2013-09-29 2014-02-05 记忆科技(深圳)有限公司 Method for encrypting solid state disk partitions and solid state disk
CN106250785A (en) * 2016-08-17 2016-12-21 成都市和平科技有限责任公司 The guard method of a kind of data interruption transmission and data storage based on this guard method
CN109165532A (en) * 2017-06-27 2019-01-08 慧荣科技股份有限公司 Storage device management method and storage device management system
TWI681296B (en) * 2018-09-28 2020-01-01 慧榮科技股份有限公司 Apparatus and method and computer program product for accessing a memory card

Also Published As

Publication number Publication date
CN102789430B (en) 2015-11-18

Similar Documents

Publication Publication Date Title
TWI479359B (en) Command executing method, memory controller and memory storage apparatus
US9467288B2 (en) Encryption key destruction for secure data erasure
CN104346103B (en) Instruction executing method, Memory Controller and memorizer memory devices
TWI447580B (en) Memory space managing method, and memory controller and memory storage device using the same
US8589669B2 (en) Data protecting method, memory controller and memory storage device
US8996933B2 (en) Memory management method, controller, and storage system
TWI451248B (en) Data protecting method, memory controller and memory storage apparatus
TWI454912B (en) Data processing method, memory controller and memory storage device
US20130080787A1 (en) Memory storage apparatus, memory controller and password verification method
CN105005450A (en) Data writing method, memory storage device, and memory control circuit unit
CN102789430B (en) Memorizer memory devices, its Memory Controller and access method
TWI446172B (en) Memory storage device, memory controller thereof, and access method thereof
CN103257938B (en) Data guard method, Memory Controller and memorizer memory devices
TWI486765B (en) Memory management method, memory controller and memory storage device using the same
TWI489272B (en) Data protecting method, and memory controller and memory storage device using the same
CN102890645A (en) Memory storage device, memory controller and data writing method
CN102446137A (en) Data write-in method, memory controller and memory storage device
US20160216893A1 (en) Smart card management method, memory storage device and memory control circuit unit
CN103377132B (en) The method in diode-capacitor storage space, Memory Controller and memorizer memory devices
CN103034594A (en) Memory storage device and memory controller and password authentication method thereof
CN102375943B (en) Identification code generation method, memory management method, controller and storage system
CN103985403B (en) Work clock changing method, Memory Controller and memory storage apparatus
CN102148054A (en) Flash memory storage system, controller of flash memory storage system and data falsification preventing method
TWI546729B (en) Data storage device and method thereof
CN102375698A (en) Method for assigning and transmitting data strings, memory controller and memory storage device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant