CN102769077A - Method for manufacturing flip-chip bonding light emitting diode (LED) - Google Patents
Method for manufacturing flip-chip bonding light emitting diode (LED) Download PDFInfo
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- CN102769077A CN102769077A CN2012102413743A CN201210241374A CN102769077A CN 102769077 A CN102769077 A CN 102769077A CN 2012102413743 A CN2012102413743 A CN 2012102413743A CN 201210241374 A CN201210241374 A CN 201210241374A CN 102769077 A CN102769077 A CN 102769077A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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- Engineering & Computer Science (AREA)
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- Led Device Packages (AREA)
Abstract
The invention discloses a method for manufacturing a flip-chip bonding light emitting diode (LED). The method comprises the following steps of: providing a substrate, and sequentially forming a gallium nitride buffer layer and a gallium nitride LED epitaxial layer on the substrate, wherein the gallium nitride LED epitaxial layer comprises an n-type gallium nitride layer, a light emitting layer and a p-type gallium nitride layer, which are sequentially arranged; forming a p-electrode on the p-type gallium nitride layer; performing dry etching on the gallium nitride LED epitaxial layer which is not covered by the p-electrode, and reaching the n-type gallium nitride layer; forming an n-electrode on the n-type gallium nitride layer; forming an insulating layer on the p-electrode, the n-type gallium nitride layer and the n-electrode to make the insulating layer cover the p-electrode and the n-electrode; performing dry etching on a planar insulating layer, and exposing the p-electrode and the n-electrode, which do not extend to a semiconductor; and welding the p-electrode and the n-electrode on an installation table. By adoption of the method, the light output and luminous efficiency of a nitride flip-chip bonding LED can be effectively improved.
Description
Technical field
The present invention relates to a kind of manufacturing field of flip welding LED, particularly be used for the light-emitting diode through III group-III nitride flip chip bonding joint of illumination application.
Background technology
Metal knuckling (Bump) is used in nitride LED (light-emitting diode) flip chip bonding encapsulation the earliest, and the metal knuckling (Bump) on the crystal grain precisely is positioned at the conductive junction point that covers on the brilliant keyset (Board).Afterwards, again with mode heating of metal knucklings such as microwaves, make crystal grain and cover brilliant keyset electric connection.At last, utilize dispensing technology encapsulation crystal grain and cover the space between brilliant keyset, so far accomplish the encapsulation of a chip and make; In addition, chip also need once toast usually again, the material of filling during with solidification point glue.Because metal knuckling contact area is still little, not in full conformity with the heat radiation and the injection current uniformity demand of power LED.And need bonding equipment or cover brilliant ball attachment machine, solid brilliant machine or surface mount chip mounter that (Surface Mounting Technology SMT) waits equipment, and even expendable is got the raw materials ready and the expenditure of covering brilliant keyset.Neither symbol demand on manufacturing cost and unit interval production capacity.
The electrode metal bare area that uses flip-chip light-emitting diode crystal grain is also arranged for directly coating one conductive bond agent.Insulating barrier then is positioned between first electrode layer and the second electrode lay, with electrical isolation and support first electrode layer and the second electrode lay.When elargol was selected in the conductive bond agent for use, above-mentioned bare area must at least 625 square microns, for direct coating.When tin cream was selected in the conductive bond agent for use, above-mentioned bare area must at least 10000 square microns, for direct coating.When directly engaging, two electrodes etc. flatness of the response be very important to the yield of processing procedure, occur bad be that two electrodes do not reach the real plane of waiting in fact, though or two electrodes the plane such as reach, the waste light-emitting area is still arranged; The contact of n semiconductor is bad; Areflexia layer under the p-electrode; In reflector and the nurse layer difficult to understand across insulating barrier, so reflectivity reduces; The p-electrode area is little, so be not inconsistent the heat radiation and the injection current uniformity demand of power LED.
Summary of the invention
Goal of the invention: to the problem and shortage that above-mentioned prior art exists, the purpose of this invention is to provide a kind of manufacturing approach of flip welding LED, when directly engaging, the upper level of two electrodes is identical, improves process rate, does not waste light-emitting area; The contact of n semiconductor is good; Reflectivity is high; The p-electrode area is big, meets the heat radiation and the injection current uniformity demand of power LED.
Technical scheme: for realizing the foregoing invention purpose, the technical scheme that the present invention adopts is a kind of manufacturing approach of flip welding LED, comprises the steps:
(1) substrate is provided, and on said substrate, forms gallium nitride resilient coating and gallium nitride light-emitting diode epitaxial layer successively, wherein the gallium nitride light-emitting diode epitaxial layer comprises n type gallium nitride layer, luminescent layer and the p type gallium nitride layer that sets gradually;
(2) on p type gallium nitride layer, form the p-electrode;
(3) the gallium nitride light-emitting diode epitaxial layer that is not covered by the p-electrode is carried out dry ecthing, arrive n type gallium nitride layer;
(4) on n type gallium nitride layer, form the n-electrode;
(5) on p-electrode, n type gallium nitride layer and n-electrode, form insulating barrier, make this insulating barrier cover p-electrode and n-electrode;
(6) dry ecthing insulating barrier exposes p-electrode and n-electrode, but too late in semiconductor;
(7) p-electrode and n-electrode are welded on the erecting bed.
Further, in said step (6), use etch shield, feasible only p-electrode and the subregional insulating barrier of n-electrode upper portion are formed contact hole by dry ecthing.
Further, in said step (4), on n type gallium nitride layer, form the ohmic contact layer of n-electrode earlier, on the ohmic contact layer of n-electrode, form the second jointing metal layer then.
Further, said p-electrode and n-electrode all utilize the lithography technology controlling and process to form the zone of electrode.
Further, said p-electrode is identical with the upper level of n-electrode.
Further, said p-electrode comprises first transparency conducting layer, metallic reflector and the first jointing metal layer that sets gradually.Further, the material of said first transparency conducting layer is alloy, tin indium oxide, zinc oxide or the aluminum zinc oxide of nickel oxide and gold, is used for forming ohmic contact with p type gallium nitride layer; The material of said metallic reflector is nickel, palladium, chromium, platinum, aluminium or silver, is used to reflect light that the gallium nitride light-emitting diode epitaxial layer sends and as diffusion barrier; The material of the said first jointing metal layer is gold or billon, is used for engaging with erecting bed.
Further; Said insulating barrier comprises second insulating barrier that uses PECVD to form the organic polymer material that material coats as first insulating barrier of SiO2 or SiN with by first insulating barrier, and second insulating barrier makes that through flatening process the upper surface of second insulating barrier is concordant.
Beneficial effect: the present invention can effectively increase amount of light and the luminous efficiency that the nitride flip chip bonding engages LED.Because the n electrode of light-emitting diode equates with the p electrode height; During the light-emitting diode flip chip bonding; Electrode can directly connect weld pad, needn't use projection, therefore can improve the thermal diffusivity of light-emitting diode and the uniformity of CURRENT DISTRIBUTION; And then the luminous efficiency and the useful life of increase light-emitting diode, and reduce light decay.
Description of drawings
Fig. 1 is the structural representation (not containing erecting bed) of the flip chip bonding luminous tube of embodiment 1, and the horizontal line district is the n-electrode among the figure, and the oblique line district is the p-electrode;
Fig. 2 is the A-A ' cross-sectional schematic of Fig. 1;
Fig. 3 is the structural representation that the first step processing procedure of embodiment 1 forms;
Fig. 4 is the structural representation that the second step processing procedure of embodiment 1 forms;
Fig. 5 is the structural representation that the 3rd step processing procedure of embodiment 1 forms;
Fig. 6 is the structural representation that the 4th step processing procedure of embodiment 1 forms;
Fig. 7 is the structural representation that the 5th step processing procedure of embodiment 1 forms;
Fig. 8 is the structural representation that the 6th step processing procedure of embodiment 1 forms;
Fig. 9 is the structural representation (containing erecting bed) of the flip chip bonding luminous tube of embodiment 1;
Figure 10 is the structural representation (not containing erecting bed) of the flip chip bonding luminous tube of embodiment 2, and the horizontal line district is the n-electrode among the figure, and the oblique line district is the p-electrode;
Figure 11 is the B-B ' cross-sectional schematic of Figure 11;
Figure 12 is the structural representation (not containing erecting bed) of the flip chip bonding luminous tube of embodiment 3, and the horizontal line district is the ohmic contact layer of n-electrode and the second jointing metal layer of n-electrode among the figure, and the oblique line district is the p-electrode, and real black area is the ohmic contact layer of n-electrode;
Figure 13 is the C-C ' cross-sectional schematic of Figure 12;
Figure 14 is the D-D ' cross-sectional schematic of Figure 12;
Figure 15 is the structural representation (not containing erecting bed) of the flip chip bonding luminous tube of embodiment 4, and the horizontal line district is the ohmic contact layer of n-electrode and the second jointing metal layer of n-electrode among the figure, and the oblique line district is the p-electrode, and real black area is the ohmic contact layer of n-electrode;
Figure 16 is the E-E ' cross-sectional schematic of Figure 15;
Figure 17 is the F-F ' cross-sectional schematic of Figure 15.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment; Further illustrate the present invention; Should understand these embodiment only be used to the present invention is described and be not used in the restriction scope of the present invention; After having read the present invention, those skilled in the art all fall within the application's accompanying claims institute restricted portion to the modification of the various equivalent form of values of the present invention.
Because the high resistivity of p type gallium nitride layer, the p-metal is paved with light-emitting zone in the design of LED, to provide the P-end preferable CURRENT DISTRIBUTION.Because the Sapphire Substrate insulation, the electric current diffusion of N-end must be by the n type gallium nitride layer.The typical thickness of n type gallium nitride layer is 2 microns, the about 10-3 Ω of sheet resistor cm.This part resistance of ignoring needs the conduction of current distance less than 200 microns, and therefore, light-emitting diode is than 400*400 micron
2When big (large scale light-emitting diode), the n-electrode need extend out, and forms a plurality of palpus shapes, to reduce resistance.This structure increases flip chip bonding processing procedure difficulty, because the light-emitting diode flip chip bonding is when erecting bed, p-metal and n-metal must keep insulating.
Embodiment 1: small size light-emitting diode, no etch shield
1, as shown in Figure 3, at first, a substrate is provided, the material of substrate can for example be sapphire (sapphire) in present embodiment.On substrate 30, form gallium nitride resilient coating (GaN buffer layer) 31 and gallium nitride light-emitting diode epitaxial layer in regular turn.The gallium nitride light-emitting diode epitaxial layer comprises n type gallium nitride layer 32, multi-layer quantum well active layers (multi-quantum well active layer, MQW active layer, i.e. luminescent layer) 33 and p type gallium nitride layer 34 in regular turn.
2, p-electrode: utilize a lithography (photolithography) processing procedure on p type gallium nitride layer 34, to form the p-electrode.As shown in Figure 4; Utilize vapor deposition, sputter or electroplating technology; On p type gallium nitride layer (p-type GaN layer) 34; Form first transparency conducting layer 35, metallic reflector 36 and the first jointing metal layer 37 in regular turn, this first transparency conducting layer 35, metallic reflector 36 and the first jointing metal layer 37 are as the p-electrode.In present embodiment; The material of first transparency conducting layer 35 can for example be alloy (NiO/Au), tin indium oxide (the Indium Tin Oxide of nickel oxide and gold; ITO), zinc oxide (ZnO) or aluminum zinc oxide (Aluminum Zinc Oxide; AlZnO), in order to form ohmic contact (ohmic contact) with semiconductor layer; The material of metallic reflector 36 can for example be nickel (Ni), palladium (Pd), chromium (Cr), platinum Pt, aluminium (Al) or silver (Ag) in present embodiment, the light that sends in order to reflection gallium nitride light-emitting diode epitaxial layer and as diffusion barrier (diffusion barrier layer); The material of the first jointing metal layer 37 can for example be gold (Au) or billon (Au alloy) in present embodiment, in order to engage (as shown in Figure 9) with erecting bed 41.
3, do the GaN dry ecthing, arrive the n-GaN semiconductor.
With the p-electrode is that etching shields (hard mask) firmly, carries out dry-etching (Dry Etching) and claims electric paste etching (Plasma Etching) again, is that to utilize gas be main etching media, for example Cl
2/ BCl
3, and driving reaction by electricity slurry energy, dry ecthing GaN arrives n-GaN semiconductor (being n type gallium nitride layer 32), and is as shown in Figure 5.
Another executive mode is at first in the surface coated photosensitive material (optical cement) of wafer, and places light shield in the wafer top, and this light shield is provided with respect to the figure of etching region and non-etching region and the pattern of quantity; (Exposure) step of making public again; Make directional light carry out optionally sensitization to photosensitive material, so just complete being transferred on the wafer of the pattern on the light shield utilizes after exposure develop (Development) again through light shield; Can make photoresistance obtain identical with mask pattern or complementary figure; Carrying out dry-etching (Dry Etching) again and claim electric paste etching (Plasma Etching) again, is that to utilize gas be main etching media, for example Cl
2/ BCl
3, and driving reaction by electricity slurry energy, dry ecthing GaN arrives the n-GaN semiconductor, afterwards, removes the photoresistance on the wafer again.
4, n-electrode: amount etched thickness (backing down the beginning) from the p-electrode, utilize a lithography (photolithography) processing procedure on n type gallium nitride layer 32, to form the n-electrode.As shown in Figure 6; Utilize vapor deposition, sputter or electroplating technology, on n type gallium nitride layer (n-type GaN layer) 32, plating n-electrode; The material of n-electrode is the alloy of Ti and Al or alloy or the alloy of Ti and Au or the alloy of Ti, Al, Cr and Au of Cr and Au, lets height such as p-electrode and n-electrode grade.
5, first insulating barrier: as shown in Figure 7, use PECVD (Plasma Enhanced Chemical Vapor Deposition, plasma enhanced chemical vapor deposition method) growth SiO comprehensively
2Or SiN is as first insulating barrier, and thickness is 100 to 300 nanometers.
6, second insulating barrier: as shown in Figure 8; First insulating barrier coats benzocyclobutene (BCB), crosses fluorine cyclobutane (PFBC), epoxy resin (Epoxy), silica gel (Silicone) or polyimides organic polymer materials such as (Polyimide) as second insulating barrier; Do second insulating barrier planarization (planarization) operation; Make the surface of second insulating barrier become smooth, first insulating barrier and second insulating barrier guarantee that p-electrode and n-electrode keep insulation, and the position of the fixing n-electrode of giving prominence to.
7, electrode is windowed: do not use etch shield; Direct dry ecthing first insulating barrier and second insulating barrier; For example adopt RIE (Reactive lon Etching, reactive ion etching) or ICP (Inductively Coupled Plasma, reaction coupled plasma etching).After p-electrode and n-electrode surface expose, good for guaranteeing conductive effect, after etching (over-etching), but not as good as in semiconductor (being n type gallium nitride layer 32), as depicted in figs. 1 and 2.
8, flip chip bonding: as shown in Figure 9, apply scolding tin (elargol also can) 38 at the upper surface of the first jointing metal layer 37 and n-electrode respectively, be welded on the erecting bed 41 through first weld pad 39 and second weld pad 40 respectively.
Embodiment 2: the small size light-emitting diode has etch shield
Shown in Figure 10 and 11, present embodiment is with the different of embodiment 1:
7, electrode is windowed: use etch shield; Place light shield at first in the surface coated photosensitive material (optical cement) of wafer, and in the wafer top, this light shield is provided with respect to want the pattern in etching isolation layer zone; (Exposure) step of making public again; Make directional light carry out optionally sensitization to photosensitive material, so just complete being transferred on the wafer of the pattern on the light shield utilizes after exposure develop (Development) again through light shield; Can make photoresistance obtain identical with mask pattern or complementary figure, dry ecthing first insulating barrier and second insulating barrier again.
Embodiment 3: large scale light-emitting diode, no etch shield
Like Figure 12, shown in 13 and 14, present embodiment is with the different of embodiment 1:
4, n-electrode: the ohmic contact layer that forms the n-electrode earlier: utilize a lithography (photolithography) processing procedure on n type gallium nitride layer 32, to form the ohmic contact layer of n-electrode; The thickness of ohmic contact layer less than p-thickness of electrode and etch depth with, the material of the ohmic contact layer of n-electrode can be the alloy of Cr and Au or alloy or the alloy of Ti and Al or the alloy of Ti, Al, Cr and Au of Ti and Au; Form the second jointing metal layer of n-electrode again: amount thickness (backing down the ohmic contact layer top of beginning from the p-electrode) to the n-electrode; Utilize a lithography (photolithography) processing procedure to form the second jointing metal layer of n-electrode; The material of the second jointing metal layer can be titanium, nickel, gold (Au), copper (Cu), aluminium, palladium, indium (In) or tin (Sn), and the top of the second jointing metal layer is concordant with the top of the first jointing metal layer 37.
7, electrode is windowed: when crossing etching, not as good as in the ohmic contact layer of n-electrode and not as good as in semiconductor.
Embodiment 4: the large scale light-emitting diode has etch shield
Like Figure 15, shown in 16 and 17, present embodiment is with the different of embodiment 3:
7, electrode is windowed: use etch shield; Place light shield at first in the surface coated photosensitive material (optical cement) of wafer, and in the wafer top, this light shield is provided with respect to want the pattern in etching isolation layer zone; (Exposure) step of making public again; Make directional light carry out optionally sensitization to photosensitive material, so just complete being transferred on the wafer of the pattern on the light shield utilizes after exposure develop (Development) again through light shield; Can make photoresistance obtain identical with mask pattern or complementary figure, dry ecthing first insulating barrier and second insulating barrier again.When crossing etching, not as good as in the ohmic contact layer of n-electrode and not as good as in semiconductor.
Claims (8)
1. the manufacturing approach of a flip welding LED comprises the steps:
(1) substrate is provided, and on said substrate, forms gallium nitride resilient coating and gallium nitride light-emitting diode epitaxial layer successively, wherein the gallium nitride light-emitting diode epitaxial layer comprises n type gallium nitride layer, luminescent layer and the p type gallium nitride layer that sets gradually;
(2) on p type gallium nitride layer, form the p-electrode;
(3) the gallium nitride light-emitting diode epitaxial layer that is not covered by the p-electrode is carried out dry ecthing, arrive n type gallium nitride layer;
(4) on n type gallium nitride layer, form the n-electrode;
(5) on p-electrode, n type gallium nitride layer and n-electrode, form insulating barrier, make this insulating barrier cover p-electrode and n-electrode;
(6) dry ecthing insulating barrier exposes p-electrode and n-electrode, but too late in semiconductor;
(7) p-electrode and n-electrode are welded on the erecting bed.
2. according to the manufacturing approach of the said a kind of flip welding LED of claim 1, it is characterized in that:
In said step (6), use etch shield, feasible only p-electrode and the subregional insulating barrier of n-electrode upper portion are formed contact hole by dry ecthing.
3. according to the manufacturing approach of the said a kind of flip welding LED of claim 1; It is characterized in that: in said step (4); On n type gallium nitride layer, form the ohmic contact layer of n-electrode earlier, on the ohmic contact layer of n-electrode, form the second jointing metal layer then.
4. according to the manufacturing approach of the said a kind of flip welding LED of claim 1, it is characterized in that: said p-electrode and n-electrode all utilize the lithography technology controlling and process to form the zone of electrode.
5. according to the manufacturing approach of the said a kind of flip welding LED of claim 1, it is characterized in that: said p-electrode is identical with the upper level of n-electrode.
6. according to the manufacturing approach of the said a kind of flip welding LED of claim 1, it is characterized in that: said p-electrode comprises first transparency conducting layer, metallic reflector and the first jointing metal layer that sets gradually.
7. according to the manufacturing approach of the said a kind of flip welding LED of claim 6; It is characterized in that: the material of said first transparency conducting layer is alloy, tin indium oxide, zinc oxide or the aluminum zinc oxide of nickel oxide and gold, is used for forming ohmic contact with p type gallium nitride layer; The material of said metallic reflector is nickel, palladium, chromium, platinum, aluminium or silver, is used to reflect light that the gallium nitride light-emitting diode epitaxial layer sends and as diffusion barrier; The material of the said first jointing metal layer is gold or billon, is used for engaging with erecting bed.
8. according to the manufacturing approach of the said a kind of flip welding LED of claim 1; It is characterized in that: said insulating barrier comprises second insulating barrier that uses PECVD to form the organic polymer material that material coats as first insulating barrier of SiO2 or SiN with by first insulating barrier, and second insulating barrier makes that through flatening process the upper surface of second insulating barrier is concordant.
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WO2014012323A1 (en) * | 2012-07-12 | 2014-01-23 | 江苏扬景光电有限公司 | Method for manufacturing flip-chip bonding light-emitting diode |
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