CN102751182A - Method for manufacturing semiconductor - Google Patents

Method for manufacturing semiconductor Download PDF

Info

Publication number
CN102751182A
CN102751182A CN2011100954590A CN201110095459A CN102751182A CN 102751182 A CN102751182 A CN 102751182A CN 2011100954590 A CN2011100954590 A CN 2011100954590A CN 201110095459 A CN201110095459 A CN 201110095459A CN 102751182 A CN102751182 A CN 102751182A
Authority
CN
China
Prior art keywords
wafer
ion
batch
carry out
illusory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2011100954590A
Other languages
Chinese (zh)
Other versions
CN102751182B (en
Inventor
李春龙
李俊峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Yandong Microelectronic Co., Ltd.
Original Assignee
Institute of Microelectronics of CAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Institute of Microelectronics of CAS filed Critical Institute of Microelectronics of CAS
Priority to CN201110095459.0A priority Critical patent/CN102751182B/en
Publication of CN102751182A publication Critical patent/CN102751182A/en
Application granted granted Critical
Publication of CN102751182B publication Critical patent/CN102751182B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Physical Vapour Deposition (AREA)

Abstract

The invention provides a method for manufacturing a semiconductor. In a batch ion implantation technology, photoresist (PR) patterns which are the same with patterns on wafers to be performed by ion implantation are formed on dummy wafers. Thus, a PR transmission ratio of the dummy wafers is the same with that of the wafers to be performed by ion implantation, so a total PR transmission ratio of each wafer in a same batch can be maintained stable and uniform, making pressure compensation on each wafer keep stable and be controlled conveniently, thereby making a final batch implanted dose maintain stable and uniform.

Description

Semiconductor making method
Technical field
The present invention relates to a kind of semiconductor making method, especially, relate to a kind of semiconductor making method that adopts illusory wafer to carry out the injection of batch ion.
Background technology
It is the important process step of semiconductor fabrication that ion injects (implantation), and in order to reduce manufacturing cost, to reduce the flow process time spent and make the performance of semiconductor device parameter have good consistency, industry adopts ion implantation technology in batches usually.In the batch ion implantation technology, the wafer that a plurality of needs carry out the ion injection is placed in the same flood chamber, and carry out ion in bulk and inject, be example with 12 inches production lines, ion implantation device can carry out the batch ion to 13 wafer and inject.Be not enough to gather into a batch if desire to carry out the wafer number that ion injects; Then need introduce one or more illusory wafers (dummy wafer); Make total wafer number reach the number of a batch, like this, the batch ion of different batches injects can obtain good process consistency.In addition; Consider and desire to carry out to have established photoresist figure usually on the wafer that ion injects; And photoresist degasification (outgas of PR) can exert an influence to ion implantation dosage final on the wafer, and this has more remarkable influence to the batch ion implantation technology, therefore; In order to make the implantation dosage on each wafer of each batch stable, even, consistent, need to introduce pressure compensation (pressure compensation).But; Traditional illusory wafer is bare silicon wafer (bare wafer), referring to accompanying drawing 2b, does not have the photoresist figure on it; Thereby illusory wafer and the photoresist transfer ratio (PR transmission ratio) of desiring to carry out the wafer that ion injects and inequality; The pressure compensation numerical value at each wafer place and inequality, this makes become difficulty and be difficult to the even effect that obtains to expect of pressure compensation, and then; Inevitably final implantation dosage is exerted an influence, make the ion implantation dosage of each wafer inconsistent.Therefore, need develop a kind of new batch ion implantation technology so that each batch and with batch in the implantation dosage of each wafer stable, consistent.
Summary of the invention
The invention provides a kind of semiconductor making method, introduced the illusory wafer that is formed with the photoresist pattern, thereby improved the uniformity of ion implantation technology in batches.
The present invention provides a kind of semiconductor making method, comprising:
Provide and desire to carry out the wafer that ion injects, desire to carry out to form the first photoresist pattern on the wafer that ion injects said;
Illusory wafer is provided;
Desire to carry out wafer and said illusory wafer that ion injects and place ion implantation device said, carry out the injection of batch ion;
Wherein:
Before carrying out said batch ion injection, on said illusory wafer, form the second photoresist pattern, the said second photoresist pattern is identical with the said first photoresist pattern.
In the method for the invention; According to the number of the said illusory wafer of batch processing capabilities setting of said ion implantation device, make the said number sum of desiring to carry out wafer that ion injects and said illusory wafer reach the number of a batch of said ion implantation device; The batch processing ability of said ion implantation device is 13~17 wafers.In the method for the invention, said product wafer and said illusory diameter wafer are 12 inches, and the batch processing ability of ion implantation device is 13 wafers.In the method for the invention, said product wafer and said illusory diameter wafer are 8 inches, and the batch processing ability of ion implantation device is 17 wafers.
The invention has the advantages that: in the batch ion implantation technology; Form on the illusory wafer with the wafer of desiring to carry out the ion injection on identical photoresist pattern; Like this; Illusory wafer is identical with the photoresist transfer ratio (PR transmission ratio) of desiring to carry out the wafer that ion injects, and therefore the total photoresist transfer ratio of each wafer in same batch can keep stable with consistent, and this makes needed pressure compensation keep stable at each wafer place; Be convenient to control, thereby make final batch implantation dosage can keep stable with consistent.
Description of drawings
Fig. 1 the present invention has introduced the batch ion implantation technology of illusory wafer;
Fig. 2 a desires to carry out the wafer that ion injects;
The illusory wafer that Fig. 2 b is naked;
Fig. 2 c is formed with the illusory wafer of photoresist pattern.
Embodiment
Following with reference to accompanying drawing and combine schematic embodiment to specify the characteristic and the technique effect thereof of technical scheme of the present invention.
At first, provide and desire to carry out the wafer 1 that ion injects, desiring to carry out to form the first photoresist pattern 11 on the wafer 1 that ion injects, referring to accompanying drawing 2a.In the batch ion implantation technology, a plurality ofly desire to carry out the wafer 1 that ion injects and be placed in same ion implantation device, carry out ion in bulk and inject.Usually; The batch process chamber that ion implantation device adopted can hold 13~17 wafers, and this diameter by wafer determines, for example; When adopting 12 inches wafers; The batch processing ability of ion implantation device is 13 wafers, and when adopting 8 inches wafers, the batch processing ability of ion implantation device is 17 wafers.If wafer 1 number deficiency of desiring to carry out the ion injection then need be introduced one or more illusory wafers 2 to gather into a batch, make total wafer number reach the number of a batch; Referring to Fig. 1, this is the batch ion injection sketch map that the present invention has introduced illusory wafer, wherein; The number deficiency of desiring to carry out the wafer 1 that ion injects is to gather into a batch; Therefore, on the loading plate of injecting chamber, arranged some illusory wafers 2, made total wafer number reach a batch.Like this, the batch ion of different batches injects and can obtain good process consistency.Simultaneously, method of the present invention is not limited to the ion implantation device that is applied to a certain model; So long as possess the ion implantation device of polycrystalline circle batch processing ability, but the method for equal embodiment of the present invention, and can obtain stable, consistent ion injection effect.
Illusory wafer 2 then is provided, and it is identical with the first photoresist pattern 11 on illusory wafer 2, to form the second photoresist pattern, 1, the second photoresist pattern 12, referring to accompanying drawing 2c.According to the batch processing ability of the ion implantation device that is adopted, the number of needed illusory wafer 2 is set, so that total wafer number reaches the number of a batch.
Then, with number be a batch desire carry out the wafer 1 that ion injects and place ion implantation device with illusory wafer 2, carry out the injection of batch ion, referring to accompanying drawing 1.
In the method for the invention; Since form on the illusory wafer 2 with the wafer 1 of desiring to carry out the ion injection on identical photoresist pattern; This makes illusory wafer 2 identical with the photoresist transfer ratio of desiring to carry out the wafer 1 that ion injects, and therefore the total photoresist transfer ratio of each wafer injected of ion can keep stable with consistent in batches; So, to the photoresist degasification and the pressure compensation of required introducing is identical and stable on each wafer, therefore pressure compensated control is effectively simple more, thus make final batch implantation dosage can keep stablizing, consistent and be easy to control.
Although with reference to above-mentioned exemplary embodiment explanation the present invention, those skilled in the art can know and need not to break away from the scope of the invention and technical scheme of the present invention is made various suitable changes and equivalents.In addition, can make by disclosed instruction and manyly possibly be suitable for the modification of particular condition or material and do not break away from the scope of the invention.Therefore, the object of the invention does not lie in and is limited to as being used to realize preferred forms of the present invention and disclosed specific embodiment, and disclosed device architecture and manufacturing approach thereof will comprise all embodiment that fall in the scope of the invention.

Claims (5)

1. semiconductor making method comprises:
Provide and desire to carry out the wafer that ion injects, desire to carry out to form the first photoresist pattern on the wafer that ion injects said;
Illusory wafer is provided;
Desire to carry out wafer and said illusory wafer that ion injects and place ion implantation device said, carry out the injection of batch ion;
It is characterized in that:
Before carrying out said batch ion injection, on said illusory wafer, form the second photoresist pattern, the said second photoresist pattern is identical with the said first photoresist pattern.
2. semiconductor making method according to claim 1; It is characterized in that; According to the number of the said illusory wafer of batch processing capabilities setting of said ion implantation device, make the said number sum of desiring to carry out wafer that ion injects and said illusory wafer reach the number of a batch of said ion implantation device.
3. semiconductor making method according to claim 2 is characterized in that, the batch processing ability of said ion implantation device is 13~17 wafers.
4. semiconductor making method according to claim 3 is characterized in that, said to desire to carry out wafer and said illusory diameter wafer that ion injects be 12 inches, and the batch processing ability of ion implantation device is 13 wafers.
5. semiconductor making method according to claim 3 is characterized in that, said to desire to carry out wafer and said illusory diameter wafer that ion injects be 8 inches, and the batch processing ability of ion implantation device is 17 wafers.
CN201110095459.0A 2011-04-17 2011-04-17 Method for manufacturing semiconductor Active CN102751182B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110095459.0A CN102751182B (en) 2011-04-17 2011-04-17 Method for manufacturing semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110095459.0A CN102751182B (en) 2011-04-17 2011-04-17 Method for manufacturing semiconductor

Publications (2)

Publication Number Publication Date
CN102751182A true CN102751182A (en) 2012-10-24
CN102751182B CN102751182B (en) 2015-01-14

Family

ID=47031266

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110095459.0A Active CN102751182B (en) 2011-04-17 2011-04-17 Method for manufacturing semiconductor

Country Status (1)

Country Link
CN (1) CN102751182B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113539803A (en) * 2021-06-28 2021-10-22 上海华虹宏力半导体制造有限公司 Batch type ion implantation method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1438679A (en) * 2002-02-14 2003-08-27 株式会社日立制作所 Method for making semiconductor integrated circuit device
US20040251432A1 (en) * 2003-06-11 2004-12-16 Sumitomo Eaton Nova Corporation Ion implanter and method for controlling the same
US20050095800A1 (en) * 2003-10-31 2005-05-05 Infineon Technologies Richmond, Lp Method of calculating a pressure compensation recipe for a semiconductor wafer implanter
US20070023698A1 (en) * 2005-07-15 2007-02-01 Samsung Electronics Co., Ltd. Ion implanting apparatus and method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1438679A (en) * 2002-02-14 2003-08-27 株式会社日立制作所 Method for making semiconductor integrated circuit device
US20040251432A1 (en) * 2003-06-11 2004-12-16 Sumitomo Eaton Nova Corporation Ion implanter and method for controlling the same
US20050095800A1 (en) * 2003-10-31 2005-05-05 Infineon Technologies Richmond, Lp Method of calculating a pressure compensation recipe for a semiconductor wafer implanter
US20070023698A1 (en) * 2005-07-15 2007-02-01 Samsung Electronics Co., Ltd. Ion implanting apparatus and method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113539803A (en) * 2021-06-28 2021-10-22 上海华虹宏力半导体制造有限公司 Batch type ion implantation method

Also Published As

Publication number Publication date
CN102751182B (en) 2015-01-14

Similar Documents

Publication Publication Date Title
TWI471928B (en) Integrated steerability array arrangement for minimizing non-uniformity
JP2016131210A5 (en)
SG10201808148QA (en) Method of manufacturing semiconductor device, substrate processing apparatus and program
CN110416044B (en) Ion implantation corner monitoring method and ion implanter
CN102751182A (en) Method for manufacturing semiconductor
CN104835769B (en) Ion implantation apparatus stage fiducial originates the calibration method of implant angle
CN101740448A (en) Plasma processing equipment and substrate support plate thereof
KR101098794B1 (en) Plasma doping apparatus and method of plasma doping method
CN105239056B (en) A kind of atomic layer deposition apparatus and method
CN102629553B (en) Ion implantation method
CN105573273B (en) The method for improving performance of semiconductor device fluctuation
CN103094143A (en) Ion implantation monitoring method
CN101764094B (en) Method for regulating threshold voltage of complementary metal oxide semiconductor
CN102054678A (en) Oxidation method
TW202031455A (en) Injection molding apparatus and injection molding method
CN207068827U (en) A kind of wafer handler and high energy implanters
CN104022054B (en) Extension cavity temperature monitoring method
CN104217929A (en) Epitaxial wafer and processing method thereof
CN104701225A (en) Ion release deficiency improvement method based on model
CN104979171B (en) A kind of ion injection method that can prevent ion implanted region border silicon rib from peeling off
CN105324840B (en) For manufacturing the technique of multiple structures
US20150357162A1 (en) Jig and plasma etching apparatus including the same
CN101452831B (en) First wafer controlling method in wafer production
CN209981182U (en) Furnace tube device
CN104022059A (en) Boat of semiconductor furnace tube

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: BEIJING YANDONG MICROELECTRNIC CO.,LTD.

Free format text: FORMER OWNER: INST OF MICROELECTRONICS, C. A. S

Effective date: 20150624

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20150624

Address after: 100015 Beijing city Chaoyang District Dongzhimen West eight room Wanhong No. 2 West Street

Patentee after: Beijing Yandong Microelectronic Co., Ltd.

Address before: 100029 Beijing city Chaoyang District Beitucheng West Road 3#

Patentee before: Institute of Microelectronics, Chinese Academy of Sciences

CP02 Change in the address of a patent holder

Address after: 100020 West eight rooms, dongzhimenwai, Chaoyang District, Beijing

Patentee after: Beijing Yandong Microelectronic Co., Ltd.

Address before: 100015 Beijing city Chaoyang District Dongzhimen West eight room Wanhong No. 2 West Street

Patentee before: Beijing Yandong Microelectronic Co., Ltd.

CP02 Change in the address of a patent holder