CN102737727A - Method and system for testing stability of double date rate synchronous dynamic random access memory - Google Patents
Method and system for testing stability of double date rate synchronous dynamic random access memory Download PDFInfo
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Abstract
The present invention discloses a method and a system for testing stability of a double date rate synchronous dynamic random access memory. According to a preset testing mode, random synchronous noise code stream is adopted, and a buffer area performs a stability test on DDR and generates a testing result, wherein the random synchronous noise code stream provides more work pressure for the DDR compared with business data, such that the effectiveness of the DDR stability test can be effectively improved with the method and the system of the present invention; in addition, the testing method of the present invention does not perform burn-tests at the high temperature and the low temperature, and can complete the test in a short time so as to improve the test efficiency.
Description
Technical field
The present invention relates to the memory test technical field, particularly relate to the method and system of Double Data Rate synchronous DRAM stability test.
Background technology
Double Data Rate synchronous DRAM (DDR, Double Data Rate) is the internal memory specification of being concluded by eight company's agreements such as NEC, Mitsubishi, Fujitsu, Toshiba, Hitachi, Texas Instrument, Samsung and modern times.Because sort memory all can carry out data processing in rising edge of clock signal and negative edge, so it can make data transmission rate reach the twice of synchronous DRAM (SDRAM, Synchronous Dynamic Random Access Memory).The addressing of DDR is then identical with SDRAM with control signal, only transmits at rising edge clock.
Owing to all can carry out data processing in rising edge of clock signal and negative edge, so the core frequency of DDR is very high.With DDR3 is example, at present the core frequency of main flow be 400MHz to 800MHz, this has also caused the stability of DDR not enough.In case DDR the time unsettled situation occurs in work, go wrong in the time of will causing the veneer operation professional, even situation such as deadlock occurs.Therefore, before veneer is produced in enormous quantities, generally all need do the DDR stability test and verify that can DDR keep steady operation under rugged environment.
The method of the existing stability test that DDR is carried out is generally: make the veneer operation than the complicated service scene and carry out height temperature strike-machine, whether the work of observation veneer is unusual.Concrete; The control veneer operates in the complicated business scene; The business datum sending module sends the pairing business datum of complicated business through the AXI bus to the DDR controller, and the DDR controller carries out frequent read operation and write operation repeatedly to this business datum to the DDR particle.Can cause DDR unstable when DDR sequential configuration during not good or single board design defectiveness, thereby make DDR occur in the read-write process that data are made mistakes or the address error situation.Utilize DDR the situation that data are made mistakes or make mistakes in the address in the read-write process, whether to occur, just can carry out stability test DDR.
Yet the existing method that DDR is carried out stability test has following shortcoming:
1, because the test of business datum need; Existing method of testing must be tested the veneer that comprises DDR; Owing to also comprise other elements in the veneer, therefore when DDR occurred in the read-write process that data are made mistakes or make mistakes in the address, can not locate was exactly that the DDR instability causes.
2, because the working pressure that DDR can bear is big more, its stability is just high more.Therefore in test process, need to cause very large working pressure to DDR as far as possible.But be to use the complicated business data that DDR is tested and might not cause very large working pressure to DDR, this also makes precision of test result reduce.
3, for DDR is operated under the harsh working environment, existing method of testing is also carried out strike-machine to DDR, but because the long time of strike-machine process need, therefore existing method of testing can't obtain test result at short notice.
Summary of the invention
For solving the problems of the technologies described above; The embodiment of the invention provides a kind of method and system of Double Data Rate synchronous DRAM stability test; To solve the problem that bearing accuracy is not enough, the test result accuracy is low and the test duration is long that existing method of testing exists, technical scheme is following:
A kind of method of Double Data Rate synchronous DRAM DDR stability test comprises:
According to predefined test pattern, use synchronization noise code stream at random, through buffer zone DDR is carried out stability test;
Confirm the code stream of synchronization noise at random current among said buffer zone and the said DDR;
Judge whether the code stream of synchronization noise at random current in code stream of synchronization noise at random current among the said DDR and the said buffer zone matees, generate judged result and generate DDR stability test result according to said judged result.
A kind of system of Double Data Rate synchronous DRAM DDR stability test; Comprise: buffer zone, test cell, test patterns are confirmed unit and test result generation unit; Said test cell is connected with DDR through said buffer zone; Said test patterns confirms that the unit is connected with said buffer zone, said DDR respectively, and said test result generation unit confirms that with said test patterns the unit is connected
Said test cell is used for according to predefined test pattern, uses synchronization noise code stream at random, through said buffer zone said DDR is carried out stability test;
Said test patterns is confirmed the unit, is used for confirming said buffer zone and the current code stream of synchronization noise at random of said DDR;
Said test result generation unit is used for judging whether the current code stream of synchronization noise at random matees in code stream of synchronization noise at random that said DDR is current and the said buffer zone, generates judged result and generates DDR stability test result according to said judged result.
Through using above technical scheme; The method and system of a kind of Double Data Rate synchronous DRAM stability test provided by the invention; Can use synchronization noise code stream at random according to predefined test pattern, DDR carried out stability test and generates test result through buffer zone.Because the synchronization noise code stream is compared with business datum and can be brought bigger working pressure to DDR at random, so the present invention can effectively improve the validity of DDR stability test.On the other hand, method of testing of the present invention need not be carried out high low temperature strike-machine again, can accomplish test at short notice, has improved testing efficiency.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art; To do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below; Obviously, the accompanying drawing in describing below only is some embodiment that put down in writing among the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
The schematic flow sheet of the method for a kind of Double Data Rate synchronous DRAM DDR stability test that Fig. 1 provides for the embodiment of the invention;
The schematic flow sheet of the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that Fig. 2 provides for the embodiment of the invention;
The schematic flow sheet of the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that Fig. 3 provides for the embodiment of the invention;
The schematic flow sheet of the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that Fig. 4 provides for the embodiment of the invention;
The schematic flow sheet of the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that Fig. 5 provides for the embodiment of the invention;
The schematic flow sheet of the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that Fig. 6 provides for the embodiment of the invention;
The schematic flow sheet of the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that Fig. 7 provides for the embodiment of the invention;
The structural representation of the system of a kind of Double Data Rate synchronous DRAM DDR stability test that Fig. 8 provides for the embodiment of the invention;
The structural representation of the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that Fig. 9 provides for the embodiment of the invention;
The structural representation of the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that Figure 10 provides for the embodiment of the invention;
The structural representation of the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that Figure 11 provides for the embodiment of the invention;
The structural representation of the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that Figure 12 provides for the embodiment of the invention;
The structural representation of the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that Figure 13 provides for the embodiment of the invention;
The structural representation of the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that Figure 14 provides for the embodiment of the invention.
Embodiment
In order to make those skilled in the art person understand the technical scheme among the present invention better; To combine the accompanying drawing in the embodiment of the invention below; Technical scheme in the embodiment of the invention is carried out clear, intactly description; Obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all should belong to the scope of the present invention's protection.
As shown in Figure 1, the method for a kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides comprises:
S100, according to predefined test pattern, use synchronization noise code stream at random, through buffer zone DDR is carried out stability test;
Wherein, test pattern can comprise: read-only test pattern, only write test pattern and readwrite tests pattern.Buffer zone can comprise: read buffer zone and/or compose buffer.It will be appreciated by persons skilled in the art that buffer zone is buffer memory, this buffer memory can be random access memory ram.Buffer memory is the impact damper between storer and the extraneous interface, can improve the transfer rate of data.
Under read-only test pattern, can only carry out read operation to DDR, the code stream of synchronization noise at random among the DDR is read in the buffer zone.Only writing under the test pattern, can only carry out write operation to DDR, the synchronization noise code stream is put into buffer zone at random, and buffer zone carries out write operation to DDR, and the synchronization noise code stream writes among the DDR at random.Under the readwrite tests pattern, can divide buffer zone, mark off two different zones (as compose buffer with read buffer zone), store write operation corresponding random synchronization noise code stream and read operation corresponding random synchronization noise code stream respectively.Certainly, under read-only test pattern, also can mark off corresponding zone (as reading buffer zone) storage read operation corresponding random synchronization noise code stream; Also can mark off corresponding zone (as writing the test section) storage write operation corresponding random synchronization noise code stream under the test pattern only writing.
In practical application, can test duration and/or testing time be set for each test pattern.For example under read-only test pattern, the number of times that read operation is set is 1000 times, and the number of times that read operation perhaps is set is 10 seconds.Test duration and testing time can certainly be set simultaneously and the two priority limits to this; As the priority of setting testing time is higher than the priority of test duration, then when testing time reaches the testing time threshold value that is provided with in advance, just can stop test process to carry out the judge of test result.
In order to reach test result preferably, often need carry out a large amount of read operations and/or write operation to DDR.Concrete, when carrying out write operation, the data that write in the DDR will leave on the different address of compose buffer at every turn, so just can not cause to write between the data to cover mutually.For repeatedly read operation, can earlier data read be got and read in the buffer zone, and then the data of reading in the buffer zone are read.
Wherein, the present invention uses that the synchronization noise code stream is as test code streams at random, and the synchronization noise code stream has pseudo-random characteristics and synchronization noise characteristic simultaneously at random.
Code stream with random character is a kind of at arbitrary given time in future, the code stream that its instantaneous value all can not accurately be foreseen.Therefore has the code stream that the code stream of random character can be used for simulating multiple business scene under the practical business in the present invention.The code stream of synchronization noise at random that the present invention uses has pseudo-randomness, and it can be confirmed in advance on the one hand, and can repeatedly produce and duplicate; It has the random character (being statistical property) of certain random series again on the one hand.Because the code stream of synchronization noise at random that the present invention uses is can be predetermined, so we can know that a certain data bit is 1 or 0 in the data, just can obtain the positional information of error data like this during verification.The code stream of synchronization noise at random that uses owing to the present invention again has the characteristic of random series, therefore can the analog service scene.
Synchronization noise also is called synchronous upset noise (SSN, Synchronization Switch Noise), is meant that working as device is on off state; Produce the electric current (di/dt) of instantaneous variation; Through the inductance that exists on the backflow approach time, form and exchange pressure drop, thereby cause noise.Synchronization noise representes that the unlike signal line is turned to 1 or be turned to the synchronization noise that produced simultaneously at 0 o'clock simultaneously in the present invention, and it is very big to the quality of signals influence.The present invention uses the code stream with synchronization noise characteristic to test, and can make to occur simultaneously on many signal wires of DDR crosstalking more greatly and current fluctuation, brings very large working pressure to DDR, thereby improves the effect of DDR stability test.
Concrete, the synchronization noise code stream can comprise at random: PRBS7 sign indicating number, PRBS15 sign indicating number, PRBS23 sign indicating number and PRBS31 sign indicating number.Preferably, the present invention uses the PRBS7 sign indicating number to carry out the DDR stability test.How the storage depth that it will be appreciated by persons skilled in the art that buffer zone can send data volume with test code streams is disposable.When DDR to be measured is the 16bit bit wide, when test code streams was the PRBS7 sign indicating number, the storage depth of buffer zone needed 128word.
In practical application, can select the different code streams of synchronization noise at random to test, the length of the code stream of synchronization noise at random tested (following the code stream of testing of synchronization noise is at random abbreviated as test code streams) also can be set.Further, the test code streams transmission that circulates also can be set, to reach desired test duration or testing time.Simultaneously, also can be set the time interval of two adjacent read operations, and the time interval that two adjacent write operations are set.When test pattern is the readwrite tests pattern, also can be set the time interval between adjacent read operation and the write operation.
S200, confirm the code stream of synchronization noise at random current among buffer zone and the DDR;
Under read-only test pattern, can confirm to read the code stream of synchronization noise at random that is used to be read among code stream of synchronization noise at random current in the buffer zone and the DDR.Only writing under the test pattern, can confirm the code stream of synchronization noise at random that writes by compose buffer among the code stream of synchronization noise at random and the DDR in the compose buffer.Under the readwrite tests pattern, the code stream of synchronization noise at random that writes by compose buffer among the code stream of synchronization noise at random that can confirm to read to be used for being read among the code stream of synchronization noise at random current in the buffer zone, the DDR, the code stream of synchronization noise at random of compose buffer and the DDR.
S300, judge whether the code stream of synchronization noise at random current in code stream of synchronization noise at random current among the DDR and the buffer zone matees, generate judged result and generate DDR stability test result according to judged result.
It is understandable that, when the code stream of synchronization noise at random current in code stream of synchronization noise at random current among the DDR and the buffer zone does not match, can confirm that then the situation of job insecurity appears in DDR.
Concrete; Under read-only test pattern; Judge that whether the determined code stream of reading to be used to be read among the code stream of synchronization noise at random current in the buffer zone and the DDR of synchronization noise at random matees (consistent), if judged result is not match, can confirm that then mistake appears in read operation.
Only writing under the test pattern, judging that whether the code stream of synchronization noise at random that is write by compose buffer among the code stream of synchronization noise at random and the DDR in the determined compose buffer matees, if judged result is not match, can confirm that then mistake appears in write operation.
Under the readwrite tests pattern; Judge whether the determined code stream of reading to be used to be read among code stream of synchronization noise at random current in the buffer zone and the DDR of synchronization noise at random matees; If judged result is not match, can confirm that then mistake appears in read operation; Judge that whether the code stream of synchronization noise at random that is write by compose buffer among the code stream of synchronization noise at random and the DDR in the determined compose buffer matees, if judged result is not match, can confirm that then mistake appears in write operation.Therefore, under the readwrite tests pattern, can detect read operation and write operation simultaneously.Owing to can confirm that it still is that mistake appears in write operation that mistake appears in read operation, so the present invention can directly locate the instable source of DDR.Data pressure is to be configured according to the sign indicating number type, and source address and destination address are to pass through software arrangements.Check errors lets sending big data pressure code stream under the less situation of address wire upset, if can think that then this mistake is an error in data.And let sending little data pressure code stream under the more frequent situation of address wire upset, if check errors can think that then this mistake is an error in address.And, according to data of makeing mistakes and address, can judge who data line has problem or which root address wire that problem is arranged.Therefore, further, the present invention can also confirm error in address or error in data.
The present invention can directly test DDR, and does not relate to other parts of veneer, therefore can get rid of because mistake appears in the test result that other elements caused in the veneer.Simultaneously, the present invention can be used to test DDR stability on any veneer with business datum sending function, has improved the dirigibility of test, has also guaranteed the unification of DDR stability test.
Wherein, the method for a kind of Double Data Rate synchronous DRAM DDR stability test provided by the invention can be applied in the DDR controller.The DDR controller is a kind of dynamic memory controller, and the main equipments such as CPU in can the realization system are to the data access of DDR.
The method of a kind of Double Data Rate synchronous DRAM DDR stability test provided by the invention can be used synchronization noise code stream at random according to predefined test pattern, through buffer zone DDR is carried out stability test and generates test result.Because the synchronization noise code stream is compared with business datum and can be brought bigger working pressure to DDR at random, so the present invention can effectively improve the validity of DDR stability test.On the other hand, method of testing of the present invention need not be carried out high low temperature strike-machine again, can accomplish test at short notice, has improved testing efficiency.
As shown in Figure 2, in the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides, test pattern can comprise: read-only test pattern, and buffer zone can comprise: read buffer zone,
When predefined test pattern is read-only test pattern and buffer zone when reading buffer zone, step S100 can comprise:
S110, according to read-only test pattern, the code stream of synchronization noise at random that is stored in advance among the DDR is carried out read operation;
S120, with the data storage that reads in reading buffer zone.
As shown in Figure 3, in the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides, when step S100 comprised step S110 and step S120, step S300 can comprise:
S310 judges whether code stream of synchronization noise at random that is stored in advance among the DDR and the code stream of reading in the buffer zone of synchronization noise at random mate; Generate the read operation judged result, when the read operation judged result for not, execution in step S320 then; When the read operation judged result when being, execution in step S330;
S320, generation DDR stability test result are the read operation mistake;
The result is normal for read operation for S330, generation DDR stability test.
Wherein, the DDR stability test result of generation can directly export processing, also can preserve.Concrete, test result can print or show output through equipment such as displays.
As shown in Figure 4; In the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides; Test pattern can comprise: only write test pattern; Buffer zone can comprise: compose buffer, and when predefined test pattern was compose buffer for only writing test pattern and buffer zone, step S100 can comprise:
S130, basis are only write test pattern, and the code stream of synchronization noise at random that is stored in advance in the compose buffer is write among the DDR.
In practical application, can write among the DDR through the code stream of synchronization noise at random that the AXI bus will be stored in the compose buffer in advance.
As shown in Figure 5, in the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides, when step S100 comprised step S130, step S300 can comprise:
S340, judge whether the code stream of synchronization noise at random among the DDR matees with the code stream of synchronization noise at random that is stored in advance in the compose buffer; Generate the write operation judged result, if judged result for not, execution in step S350 then; If judged result is for being, execution in step S360 then;
S350, generation DDR stability test result are the write operation mistake;
S360, generation DDR stability test result are that write operation is normal.
Wherein, the DDR stability test result of generation can directly export processing, also can preserve.Concrete, test result can print or show output through equipment such as displays.
As shown in Figure 6, in the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides, test pattern can comprise: the readwrite tests pattern, buffer zone can comprise: read buffer zone and compose buffer.
When predefined test pattern was the readwrite tests pattern, step S100 can comprise:
S140, according to the readwrite tests pattern, write among the DDR and and carry out read operation being stored in the code stream of synchronization noise at random in the compose buffer the code stream of synchronization noise at random that is stored among the DDR, with the data storage that reads in reading buffer zone.
What need explanation a bit is under the readwrite tests pattern, can carry out read operation and write operation to DDR simultaneously, to increase the test pressure to DDR, raising test effect.
As shown in Figure 7, in the method for the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides, when step S100 comprised step S140, step S300 can comprise:
Whether S380, judgement are stored in the code stream of reading to be read among interior code stream of synchronization noise at random of buffer zone and the DDR of synchronization noise at random and mate; Generate the read operation judged result; If the read operation judged result is that then generating DDR stability test result is not the read operation mistake;
Whether the code stream of synchronization noise at random that S390, judgement are stored in the compose buffer matees with the code stream of synchronization noise at random that writes among the DDR; Generate the write operation judged result; If the write operation judged result is that then generating DDR stability test result is not the write operation mistake.
Wherein, the execution sequence of step S380 and step S390 can be for multiple, as: carry out simultaneously, step S380 prior to step S390 carry out, step S390 carries out prior to step S380, the present invention does not do qualification at this.
Corresponding to top method embodiment, the present invention also provides a kind of system of Double Data Rate synchronous DRAM DDR stability test.
As shown in Figure 8; The system of a kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides; Can comprise: buffer zone 100, test cell 200, test patterns are confirmed unit 300 and test result generation unit 400, and test cell 200 is connected with DDR500 through buffer zone 100, and test patterns confirms that unit 300 is connected with buffer zone 100, DDR500 respectively; Test result generation unit 400 confirms that with test patterns unit 300 is connected
What need explanation a bit is that buffer zone 100 can become one with test cell 200.
Wherein, test pattern can comprise: read-only test pattern, only write test pattern and readwrite tests pattern.Buffer zone 100 can comprise: read buffer zone and/or compose buffer.It will be appreciated by persons skilled in the art that buffer zone is buffer memory, this buffer memory can be random access memory ram.Buffer memory is the impact damper between storer and the extraneous interface, can improve the transfer rate of data.
Under read-only test pattern, can only carry out read operation to DDR500, the code stream of synchronization noise at random among the DDR500 is read in the buffer zone 100.Only writing under the test pattern, can only carry out write operation to DDR500, the synchronization noise code stream is put into buffer zone 100 at random, and 100 couples of DDR500 of buffer zone carry out write operation, and the synchronization noise code stream writes among the DDR500 at random.Under the readwrite tests pattern, can divide buffer zone 100, mark off two different zones (as compose buffer with read buffer zone), store write operation corresponding random synchronization noise code stream and read operation corresponding random synchronization noise code stream respectively.Certainly, under read-only test pattern, also can mark off corresponding zone (as reading buffer zone) storage read operation corresponding random synchronization noise code stream; Also can mark off corresponding zone (as writing the test section) storage write operation corresponding random synchronization noise code stream under the test pattern only writing.
In practical application, can test duration and/or testing time be set for each test pattern.For example under read-only test pattern, the number of times that read operation is set is 1000 times, and the number of times that read operation perhaps is set is 10 seconds.Test duration and testing time can certainly be set simultaneously and the two priority limits to this; As the priority of setting testing time is higher than the priority of test duration, then when testing time reaches the testing time threshold value that is provided with in advance, just can stop test process to carry out the judge of test result.
In order to reach test result preferably, often need carry out a large amount of read operations and/or write operation to DDR500.Concrete, when carrying out write operation, the data that write in the DDR500 will leave on the different address of compose buffer at every turn, so just can not cause to write between the data to cover mutually.For repeatedly read operation, can earlier data read be got and read in the buffer zone, and then the data of reading in the buffer zone are read.
Wherein, the present invention uses that the synchronization noise code stream is as test code streams at random, and the synchronization noise code stream has pseudo-random characteristics and synchronization noise characteristic simultaneously at random.
Code stream with random character is a kind of at arbitrary given time in future, the code stream that its instantaneous value all can not accurately be foreseen.Therefore has the code stream that the code stream of random character can be used for simulating multiple business scene under the practical business in the present invention.The code stream of synchronization noise at random that the present invention uses has pseudo-randomness, and it can be confirmed in advance on the one hand, and can repeatedly produce and duplicate; It has the random character (being statistical property) of certain random series again on the one hand.Because the code stream of synchronization noise at random that the present invention uses is can be predetermined, so we can know that a certain data bit is 1 or 0 in the data, just can obtain the positional information of error data like this during verification.The code stream of synchronization noise at random that uses owing to the present invention again has the characteristic of random series, therefore can the analog service scene.
Synchronization noise also is called synchronous upset noise (SSN, Synchronization Switch Noise), is meant that working as device is on off state; Produce the electric current (di/dt) of instantaneous variation; Through the inductance that exists on the backflow approach time, form and exchange pressure drop, thereby cause noise.Synchronization noise representes that the unlike signal line is turned to 1 or be turned to the synchronization noise that produced simultaneously at 0 o'clock simultaneously in the present invention, and it is very big to the quality of signals influence.The present invention uses the code stream with synchronization noise characteristic to test, and can make to occur simultaneously on many signal wires of DDR crosstalking more greatly and current fluctuation, brings very large working pressure to DDR, thereby improves the effect of DDR stability test.
Concrete, the synchronization noise code stream can comprise at random: PRBS7 sign indicating number, PRBS15 sign indicating number, PRBS23 sign indicating number and PRBS31 sign indicating number.Preferably, the present invention uses the PRBS7 sign indicating number to carry out the DDR stability test.How the storage depth that it will be appreciated by persons skilled in the art that buffer zone can send data volume with test code streams is disposable.When DDR to be measured is the 16bit bit wide, when test code streams was the PRBS7 sign indicating number, the storage depth of buffer zone needed 128word.
In practical application, can select the different code streams of synchronization noise at random to test, the length of the code stream of synchronization noise at random tested (following the code stream of testing of synchronization noise is at random abbreviated as test code streams) also can be set.Further, the test code streams transmission that circulates also can be set, to reach desired test duration or testing time.Simultaneously, also can be set the time interval of two adjacent read operations, and the time interval that two adjacent write operations are set.When test pattern is the readwrite tests pattern, also can be set the time interval between adjacent read operation and the write operation.
Test patterns is confirmed unit 300, is used for confirming buffer zone 100 and the current code stream of synchronization noise at random of DDR500;
Under read-only test pattern, can confirm to read the code stream of synchronization noise at random that is used to be read among code stream of synchronization noise at random current in the buffer zone and the DDR500.Only writing under the test pattern, can confirm the code stream of synchronization noise at random that writes by compose buffer among the code stream of synchronization noise at random and the DDR500 in the compose buffer 100.Under the readwrite tests pattern, the code stream of synchronization noise at random that writes by compose buffer among the code stream of synchronization noise at random that can confirm to read to be used for being read among the code stream of synchronization noise at random current in the buffer zone, the DDR500, the code stream of synchronization noise at random of compose buffer and the DDR500.
Test result generation unit 400 is used for judging whether the current code stream of synchronization noise at random matees in code stream of synchronization noise at random that DDR500 is current and the buffer zone 100, generates judged result and generates DDR stability test result according to judged result.
It is understandable that, when the code stream of synchronization noise at random current among the DDR not with buffer zone in during the current code stream of synchronization noise at random coupling, can confirm that then the situation of job insecurity appears in DDR.
Concrete; Under read-only test pattern; Judge that whether the determined code stream of reading to be used to be read among the code stream of synchronization noise at random current in the buffer zone and the DDR500 of synchronization noise at random matees (consistent), if judged result is not match, can confirm that then mistake appears in read operation.
Only writing under the test pattern, judging that whether the code stream of synchronization noise at random that is write by compose buffer among the code stream of synchronization noise at random and the DDR500 in the determined compose buffer matees, if judged result is not match, can confirm that then mistake appears in write operation.
Under the readwrite tests pattern; Judge whether the determined code stream of reading to be used to be read among code stream of synchronization noise at random current in the buffer zone and the DDR500 of synchronization noise at random matees; If judged result is not match, can confirm that then mistake appears in read operation; Judge that whether the code stream of synchronization noise at random that is write by compose buffer among the code stream of synchronization noise at random and the DDR500 in the determined compose buffer matees, if judged result is not match, can confirm that then mistake appears in write operation.Therefore, under the readwrite tests pattern, can detect read operation and write operation simultaneously.Owing to can confirm that it still is that mistake appears in write operation that mistake appears in read operation, so the present invention can directly locate the instable source of DDR500.Further, the present invention can also confirm error in address or error in data.
The present invention can directly test DDR500, and does not relate to other parts of veneer, therefore can get rid of because mistake appears in the test result that other elements caused in the veneer.Simultaneously, the present invention can be used to test DDR stability on any veneer with business datum sending function, has improved the dirigibility of test, has also guaranteed the unification of DDR500 stability test.
Wherein, the method for a kind of Double Data Rate synchronous DRAM DDR stability test provided by the invention can be applied in the DDR controller.The DDR controller is a kind of dynamic memory controller, and the main equipments such as CPU in can the realization system are to the data access of DDR.
The system of a kind of Double Data Rate synchronous DRAM DDR stability test provided by the invention can use synchronization noise code stream at random according to predefined test pattern, through buffer zone DDR is carried out stability test and generates test result.Because the synchronization noise code stream is compared with business datum and can be brought bigger working pressure to DDR at random, so the present invention can effectively improve the validity of DDR stability test.On the other hand, method of testing of the present invention need not be carried out high low temperature strike-machine again, can accomplish test at short notice, has improved testing efficiency.
As shown in Figure 9, in the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides, test pattern can comprise: read-only test pattern, and buffer zone 100 can comprise: read buffer zone 110,
When predefined test pattern is read-only test pattern and buffer zone 100 when reading buffer zone 110, test cell 200 can comprise:
Read operation unit 210 is used for according to read-only test pattern, and the code stream of synchronization noise at random that is stored in advance among the DDR500 is carried out read operation, and with the data storage that reads in reading buffer zone 110.
Shown in figure 10; In the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides; When comprising read operation unit 210 and buffer zone 100, test cell 200 comprises that when reading buffer zone 110, test result generation unit 400 can comprise:
Read operation judging unit 410; Be used for judging whether code stream of synchronization noise at random that is stored in DDR500 in advance and the code stream of reading in the buffer zone 110 of synchronization noise at random mate; Generate the read operation judged result; If the read operation judged result is that then generating DDR stability test result is not the read operation mistake.
Wherein, the DDR stability test result of generation can directly export processing, also can preserve.Concrete, test result can print or show output through equipment such as displays.
Shown in figure 11, in the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides, test pattern comprises: only write test pattern, buffer zone comprises: compose buffer 120,
When predefined test pattern was compose buffer 120 for only writing test pattern and buffer zone, test cell 200 can comprise:
In practical application, can write among the DDR500 through the code stream of synchronization noise at random that the AXI bus will be stored in the compose buffer 120 in advance.
Shown in figure 12; In the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides; When test cell 200 comprised that write operation unit 220 and buffer zone 100 comprise compose buffer 120, test result generation unit 400 can comprise:
Write operation judging unit 420; Be used for judging whether the code stream of synchronization noise at random of DDR500 and the code stream of synchronization noise at random that is stored in advance in the compose buffer 120 mate; Generate the write operation judged result; If the write operation judged result is that then generating DDR stability test result is not the write operation mistake.
Wherein, when the write operation judged result when being, it is normal for write operation that write operation judging unit 420 can also generate DDR stability test result.
Wherein, the DDR stability test result of generation can directly export processing, also can preserve.Concrete, test result can print or show output through equipment such as displays.
Shown in figure 13, in the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides, test pattern can comprise: the readwrite tests pattern, and buffer zone can comprise: read buffer zone 110 and compose buffer 120,
When predefined test pattern was the readwrite tests pattern, test cell 200 can comprise: read operation subelement 230 and write operation subelement 240,
Read operation subelement 230 is used for according to the readwrite tests pattern code stream of synchronization noise at random that is stored in DDR500 being carried out read operation, with the data storage that reads in reading buffer zone 110;
What need explanation a bit is under the readwrite tests pattern, can carry out read operation and write operation to DDR500 simultaneously, to increase the test pressure to DDR500, raising test effect.
Shown in figure 14, in the system of the another kind of Double Data Rate synchronous DRAM DDR stability test that the embodiment of the invention provides, test result generation unit 400 can comprise: write operation judgment sub-unit 440 and read operation judgment sub-unit 430,
Write operation judgment sub-unit 440; Be used for judging whether be stored in the code stream of synchronization noise at random that the code stream of synchronization noise at random read in the buffer zone 110 and DDR500 be read matees; Generate the read operation judged result; If the read operation judged result is that then generating DDR stability test result is not the read operation mistake;
Read operation judgment sub-unit 430; Be used for judging whether code stream of synchronization noise at random that is stored in the compose buffer 120 and the code stream of synchronization noise at random that writes DDR500 mate; Generate the write operation judged result; If the write operation judged result is that then generating DDR stability test result is not the write operation mistake.
For the convenience of describing, be divided into various unit with function when describing above the device and describe respectively.Certainly, when embodiment of the present invention, can in same or a plurality of softwares and/or hardware, realize the function of each unit.
Description through above embodiment can know, those skilled in the art can be well understood to the present invention and can realize by the mode that software adds essential general hardware platform.Based on such understanding; The part that technical scheme of the present invention contributes to prior art in essence in other words can be come out with the embodied of software product; This computer software product can be stored in the storage medium, like ROM/RAM, magnetic disc, CD etc., comprises that some instructions are with so that a computer equipment (can be a personal computer; Server, the perhaps network equipment etc.) carry out the described method of some part of each embodiment of the present invention or embodiment.
Each embodiment in this instructions all adopts the mode of going forward one by one to describe, and identical similar part is mutually referring to getting final product between each embodiment, and each embodiment stresses all is the difference with other embodiment.Especially, for system embodiment, because it is basically similar in appearance to method embodiment, so describe fairly simplely, relevant part gets final product referring to the part explanation of method embodiment.System embodiment described above only is schematic; Wherein said unit as the separating component explanation can or can not be physically to separate also; The parts that show as the unit can be or can not be physical locations also; Promptly can be positioned at a place, perhaps also can be distributed on a plurality of NEs.Can realize the purpose of present embodiment scheme according to the needs selection some or all of module wherein of reality.Those of ordinary skills promptly can understand and implement under the situation of not paying creative work.
The present invention can be used in numerous general or special purpose computingasystem environment or the configuration.For example: personal computer, server computer, handheld device or portable set, plate equipment, multicomputer system, the system based on microprocessor, set top box, programmable consumer-elcetronics devices, network PC, small-size computer, mainframe computer, comprise DCE of above any system or equipment or the like.
The present invention can describe in the general context of the computer executable instructions of being carried out by computing machine, for example program module.Usually, program module comprises the routine carrying out particular task or realize particular abstract, program, object, assembly, data structure or the like.Also can in DCE, put into practice the present invention, in these DCEs, by through communication network connected teleprocessing equipment execute the task.In DCE, program module can be arranged in this locality and the remote computer storage medium that comprises memory device.
Need to prove; In this article; Relational terms such as first and second grades only is used for an entity or operation are made a distinction with another entity or operation, and not necessarily requires or hint relation or the order that has any this reality between these entities or the operation.
The above only is an embodiment of the present invention; Should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; Can also make some improvement and retouching, these improvement and retouching also should be regarded as protection scope of the present invention.
Claims (14)
1. the method for a Double Data Rate synchronous DRAM DDR stability test is characterized in that, comprising:
According to predefined test pattern, use synchronization noise code stream at random, through buffer zone DDR is carried out stability test;
Confirm the code stream of synchronization noise at random current among said buffer zone and the said DDR;
Judge whether the code stream of synchronization noise at random current in code stream of synchronization noise at random current among the said DDR and the said buffer zone matees, generate judged result and generate DDR stability test result according to said judged result.
2. method according to claim 1 is characterized in that, said test pattern comprises: read-only test pattern, and said buffer zone comprises: read buffer zone,
When said predefined test pattern is read-only test pattern and said buffer zone when reading buffer zone, said according to predefined test pattern, use synchronization noise code stream at random, through buffer zone DDR is carried out stability test, comprising:
According to said read-only test pattern, the code stream of synchronization noise at random that is stored in advance among the DDR is carried out read operation, and the data storage that reads is read in the buffer zone said.
3. method according to claim 2; It is characterized in that; Saidly judge whether the code stream of synchronization noise at random current in code stream of synchronization noise at random current among the said DDR and the said buffer zone matees, generate judged result and generate DDR stability test result and comprise according to said judged result:
Judge whether the code stream of synchronization noise at random and the said code stream of reading in the buffer zone of synchronization noise at random that are stored in advance among the DDR mate; Generate the read operation judged result; If said read operation judged result is that then generating DDR stability test result is not the read operation mistake.
4. method according to claim 1 is characterized in that, said test pattern comprises: only write test pattern, said buffer zone comprises: compose buffer,
When said predefined test pattern is compose buffer for only writing test pattern and said buffer zone, said according to predefined test pattern, use synchronization noise code stream at random, through buffer zone DDR is carried out stability test and comprise:
Write test pattern according to said, the code stream of synchronization noise at random that is stored in advance in the said compose buffer is write among the DDR.
5. method according to claim 4; It is characterized in that; Saidly judge whether the code stream of synchronization noise at random current in code stream of synchronization noise at random current among the said DDR and the said buffer zone matees, generate judged result and generate DDR stability test result and comprise according to said judged result:
Judge whether the code stream of synchronization noise at random among the DDR matees with the code stream of synchronization noise at random that is stored in advance in the said compose buffer; Generate the write operation judged result; If said write operation judged result is that then generating DDR stability test result is not the write operation mistake.
6. method according to claim 1 is characterized in that, said test pattern comprises: the readwrite tests pattern, and said buffer zone comprises: read buffer zone and compose buffer,
When said predefined test pattern is the readwrite tests pattern, said according to predefined test pattern, use synchronization noise code stream at random, through buffer zone DDR is carried out stability test and comprise:
According to said readwrite tests pattern, write among the DDR and and carry out read operation being stored in the code stream of synchronization noise at random in the said compose buffer the code stream of synchronization noise at random that is stored among the DDR, the data storage that reads is read in the buffer zone said.
7. method according to claim 6; It is characterized in that; Saidly judge whether the code stream of synchronization noise at random current in code stream of synchronization noise at random current among the said DDR and the said buffer zone matees, generate judged result and generate DDR stability test result and comprise according to said judged result:
Judge whether be stored in the said code stream of reading to be read among interior code stream of synchronization noise at random of buffer zone and the DDR of synchronization noise at random matees; Generate the read operation judged result; If said read operation judged result is that then generating DDR stability test result is not the read operation mistake;
Judge whether code stream of synchronization noise at random that is stored in the said compose buffer and the code stream of synchronization noise at random that writes among the said DDR mate; Generate the write operation judged result; If said write operation judged result is that then generating DDR stability test result is not the write operation mistake.
8. the system of a Double Data Rate synchronous DRAM DDR stability test; It is characterized in that; Comprise: buffer zone, test cell, test patterns are confirmed unit and test result generation unit, and said test cell is connected with DDR through said buffer zone, and said test patterns confirms that the unit is connected with said buffer zone, said DDR respectively; Said test result generation unit confirms that with said test patterns the unit is connected
Said test cell is used for according to predefined test pattern, uses synchronization noise code stream at random, through said buffer zone said DDR is carried out stability test;
Said test patterns is confirmed the unit, is used for confirming said buffer zone and the current code stream of synchronization noise at random of said DDR;
Said test result generation unit is used for judging whether the current code stream of synchronization noise at random matees in code stream of synchronization noise at random that said DDR is current and the said buffer zone, generates judged result and generates DDR stability test result according to said judged result.
9. system according to claim 8 is characterized in that, said test pattern comprises: read-only test pattern, and said buffer zone comprises: read buffer zone,
When said predefined test pattern is read-only test pattern and said buffer zone when reading buffer zone, said test cell comprises:
The read operation unit is used for according to said read-only test pattern, the code stream of synchronization noise at random that is stored in advance among the said DDR is carried out read operation, and the data storage that reads is read in the buffer zone said.
10. system according to claim 9 is characterized in that, said test result generation unit comprises:
The read operation judging unit; Be used for judging whether the code stream of synchronization noise at random and the said code stream of reading in the buffer zone of synchronization noise at random that are stored in said DDR in advance mate; Generate the read operation judged result; If said read operation judged result is that then generating DDR stability test result is not the read operation mistake.
11. system according to claim 8 is characterized in that, said test pattern comprises: only write test pattern, said buffer zone comprises: compose buffer,
When said predefined test pattern was compose buffer for only writing test pattern and said buffer zone, said test cell comprised:
Write operation unit is used for writing test pattern according to said, and the code stream of synchronization noise at random that is stored in advance in the said compose buffer is write among the said DDR.
12. system according to claim 11 is characterized in that, said test result generation unit comprises:
The write operation judging unit; Be used for judging whether the code stream of synchronization noise at random of said DDR and the code stream of synchronization noise at random that is stored in advance in the said compose buffer mate; Generate the write operation judged result; If said write operation judged result is that then generating DDR stability test result is not the write operation mistake.
13. system according to claim 8 is characterized in that, said test pattern comprises: the readwrite tests pattern, and said buffer zone comprises: read buffer zone and compose buffer,
When said predefined test pattern was the readwrite tests pattern, said test cell comprised: read operation subelement and write operation subelement,
Said read operation subelement is used for according to said readwrite tests pattern the code stream of synchronization noise at random that is stored in said DDR being carried out read operation, and the data storage that reads is read in the buffer zone said;
Said write operation subelement is used for the code stream of synchronization noise at random that is stored in the said compose buffer is write said DDR.
14. system according to claim 13 is characterized in that, said test result generation unit comprises: write operation judgment sub-unit and read operation judgment sub-unit,
Said write operation judgment sub-unit; Be used for judging whether be stored in the code stream of synchronization noise at random that the said code stream of synchronization noise at random and the DDR that reads in the buffer zone be read matees; Generate the read operation judged result; If said read operation judged result is that then generating DDR stability test result is not the read operation mistake;
Said read operation judgment sub-unit; Be used for judging whether code stream of synchronization noise at random that is stored in the said compose buffer and the code stream of synchronization noise at random that writes said DDR mate; Generate the write operation judged result; If said write operation judged result is that then generating DDR stability test result is not the write operation mistake.
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