CN102721917B - Test method and device for tag chip without clock circuit - Google Patents
Test method and device for tag chip without clock circuit Download PDFInfo
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- CN102721917B CN102721917B CN201210236898.3A CN201210236898A CN102721917B CN 102721917 B CN102721917 B CN 102721917B CN 201210236898 A CN201210236898 A CN 201210236898A CN 102721917 B CN102721917 B CN 102721917B
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Abstract
The invention relates to a test method and device for a tag chip without a clock circuit. The method comprises the following step: a tester samples the frame header of a tag chip without a clock circuit at a fixed frequency so as to acquire the level data of the frame header; the continuous appearance duration of a first level of the frame header is obtained according to the level data; and the tester samples follow-up frames of the tag chip by taking the duration as the period so as to acquire level data of the follow-up frames. According to the invention, the tester samples the frame header of the tag chip without the clock circuit at a fixed frequency so as to acquire the continuous appearance duration of the first level in the frame header, as the tag chip adopts the EPC (Electronic Product Code) protocol, the period of the follow-up data takes the duration of the first level of the frame header as the reference cycle, data acquired by sampling the follow-up frame data of the tag chip by taking the duration as the cycle has small error and high precision.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly a kind of method of testing for the label chip without clock circuit and proving installation.
Background technology
By using radiofrequency signal, used widely radio-frequency (RF) identification (RFID) label chip to carry out automatic identifying object.In order to carry out automatic identifying object with RFID label chip, first RFID label is adhered on object to be identified, and the RFID label of RFID reader and described object carries out radio communication and does not need to carry out sight line or physical contact with RFID label.Due to being widely used of this RFID technology, can greatly reduce relevant automatic identification technology such as the shortcoming of bar code and optical character recognition technology.
Wherein said label chip adopts EPC agreement, inquisitor is to one or more label transmitting information, and send mode is two sideband amplitude offset keyings (DSB-ASK), single-side belt amplitude shift keying (SSB-ASK) or negative amplitude offset keying (PR-ASK) the modulated RF carrier signal that adopts pulse-spacing coding (PIE) form.Label is by identical modulated RF carrier wave received power.
Inquisitor is by sending unmodulated radio-frequency carrier and listening attentively to backscattering and answer the information of sending from label that receives.Label, by amplitude and/or the phase place of backscattered modulation radio-frequency carrier, conveys a message.For coded format or FM0 or the subcarrier of miller-modulate that order responds to inquisitor.Communication line between inquiry and label is half-duplex, namely should not require label at backscattered while demodulation inquisitor.Label should not utilize full-duplex communication to respond to mandatory order or option command.
In there is no the label chip of external clock, inquisitor sends instruction to label chip, and because label chip does not have external clock, the label chip response time is uncertain, and chip clock pulse width is unfixing, causes the cycle of chip clock uncertain.Test machine of the prior art adopts the method for the point of sampling within the fixed cycle to test the label chip without clock circuit conventionally, because described label chip adopts EPC agreement, it is reference period that the cycle of follow-up data be take the time span T1 of first level of frame head, take in one-period high level or low level is 1, and level redirect is 0; Or take in one-period high level or low level is 0, level redirect is 1.For the coded format that order responds to inquisitor, be the subcarrier of FM0 preamble, its oscillogram as shown in Figure 1.Because the cycle of chip clock is uncertain, may there is redirect in the level that test machine samples within the fixed cycle, and then the data that sample are made mistakes, and do not meet the test request of label chip.
Summary of the invention
The object of this invention is to provide a kind of method of testing for the label chip without clock circuit and proving installation, to reduce error in the test process of label chip, improve precision.
Technical solution of the present invention is a kind of method of testing for the label chip without clock circuit, its
Be characterised in that, comprise:
One test machine is sampled to the frame head of a label chip without clock circuit under a fixed frequency, obtains the level data of described frame head;
According to described level data, obtain the continuous duration occurring of first level of described frame head;
Described test machine be take described duration and the subsequent frame of described label chip is sampled as the cycle, obtains the level data of subsequent frame.
As preferably: described fixed frequency is 1KHZ-50MHZ.
The present invention also provides a kind of proving installation for the label chip without clock circuit, comprising:
The first sampling unit, samples to the frame head of a label chip without clock circuit with a fixed frequency, obtains the level data of described frame head;
Processing unit, the duration that the level data of the described frame head that processing the first sampling unit obtains occurs continuously to calculate first level;
The second sampling unit, the duration that first level occurs continuously of take was sampled to the subsequent frame data of described label chip as the cycle, obtained the level data of subsequent frame.
As preferably: the fixed frequency of described sampling unit is 1KHZ-50MHZ.
Compared with prior art, a method of testing of the present invention first test machine is sampled to the frame head of a label chip without clock circuit under a fixed frequency, obtain the level data of described frame head, sample frequency is high can be reduced because the label chip response time is uncertain and the uncertain measurement error bringing of frame head cycle;
According to described level data, obtain the duration that first level occurs continuously, because label chip adopts EPC agreement, according to label chip described in frame head principle, take frame head the first level time length is reference period; Then described test machine be take described duration and the subsequent frame data of described label chip is sampled as the cycle, obtains subsequent frame level data.The data error that adopts said method test machine to obtain is little, and precision is high.
Accompanying drawing explanation
The coded format that when Fig. 1 is label chip employing EPC agreement, order responds to inquisitor is the oscillogram of the subcarrier of FM0 preamble;
Fig. 2 is the process flow diagram of the method for testing of the present invention's one specific embodiment;
Fig. 3 is the present invention's schematic diagram of the proving installation of specific embodiment.
Embodiment
The present invention is further detailed in conjunction with the accompanying drawings below:
A lot of details have been set forth in the following description so that fully understand the present invention.But the present invention can implement to be much different from alternate manner described here, and those skilled in the art can do similar popularization without prejudice to intension of the present invention in the situation that, so the present invention is not subject to the restriction of following public concrete enforcement.
Secondly, the present invention utilizes schematic diagram to be described in detail, when the embodiment of the present invention is described in detail in detail; for ease of explanation; the sectional view that represents device architecture can be disobeyed general ratio and be done local amplification, and described schematic diagram is example, and it should not limit the scope of protection of the invention at this.The three-dimensional space that should comprise in addition, length, width and the degree of depth in actual fabrication.
Fig. 2 shows the process flow diagram of the method for testing of the present invention's one specific embodiment.
Refer to shown in Fig. 2, in the present embodiment,
A method of testing for the label chip without clock circuit, comprising:
One test machine is sampled to the frame head of a label chip without clock circuit under a fixed frequency, obtain the level data of described frame head, described fixed frequency is 1KHZ-50MHZ, n the point of sampling within a fixed cycle, sample frequency is high, be different from the sample method of a point of test machine in prior art within the fixed cycle, can reduce because the label chip response time is uncertain and the uncertain measurement error bringing of frame head cycle;
According to described level data, obtain the continuous duration occurring of first level of described frame head, because label chip of the present invention adopts EPC agreement, for the coded format that order responds to inquisitor, it is the subcarrier of FM0 preamble, first level of its frame head is high level or low level, it is long to take described high level or low level time as the very first time, and it is benchmark that the data cycle in described label chip be take very first time length;
Described test machine be take described duration and the subsequent frame of described label chip is sampled as the cycle, obtains the level data of subsequent frame.
The present invention also provides a kind of proving installation for the label chip without clock circuit, comprises
The first sampling unit 11, samples to the frame head of a label chip without clock circuit with a fixed frequency, obtains the level data of described frame head, and the fixed frequency of described the first sampling unit 11 is 1KHZ-50MHZ;
Processing unit 12, the duration that the level data of the described frame head that processing the first sampling unit 11 obtains occurs continuously to calculate first level;
The second sampling unit 13, the duration that first level occurs continuously of take was sampled to the subsequent frame data of described label chip as the cycle, obtained the level data of subsequent frame.
In sum, a method of testing of the present invention first test machine is sampled to the frame head of a label chip without clock circuit under a fixed frequency, obtain the level data of described frame head, sample frequency is high can be reduced because the label chip response time is uncertain and the uncertain measurement error bringing of frame head cycle; According to described level data, obtain the duration that first level occurs continuously, because label chip adopts EPC agreement, according to label chip described in frame head principle, take frame head the first level time length is reference period; Then described test machine be take described duration and the subsequent frame data of described label chip is sampled as the cycle, obtains subsequent frame level data.The data error that adopts said method test machine to obtain is little, and precision is high.
The foregoing is only preferred embodiment of the present invention, all equalizations of doing according to the claims in the present invention scope change and modify, and all should belong to the covering scope of the claims in the present invention.
Claims (4)
1. for a method of testing for the label chip without clock circuit, it is characterized in that, comprising:
One test machine is sampled to the frame head of a label chip without clock circuit under a fixed frequency, obtains the level data of described frame head;
According to described level data, obtain the continuous duration occurring of first level of described frame head;
Described test machine be take described duration and the subsequent frame of described label chip is sampled as the cycle, obtains the level data of subsequent frame.
2. the method for testing for the label chip without clock circuit according to claim 1, is characterized in that: described fixed frequency is 1KHZ-50MHZ.
3. for a proving installation for the label chip without clock circuit, it is characterized in that, comprising:
The first sampling unit, samples to the frame head of a label chip without clock circuit with a fixed frequency, obtains the level data of described frame head;
Processing unit, the duration that the level data of the described frame head that processing the first sampling unit obtains occurs continuously to calculate first level;
The second sampling unit, the duration that first level occurs continuously of take was sampled to the subsequent frame of described label chip as the cycle, obtained the level data of subsequent frame.
4. the proving installation for the label chip without clock circuit according to claim 3, is characterized in that: the fixed frequency of described sampling unit is 1KHZ-50MHZ.
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| CN201210236898.3A CN102721917B (en) | 2012-07-09 | 2012-07-09 | Test method and device for tag chip without clock circuit |
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| CN201210236898.3A CN102721917B (en) | 2012-07-09 | 2012-07-09 | Test method and device for tag chip without clock circuit |
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| CN102721917A CN102721917A (en) | 2012-10-10 |
| CN102721917B true CN102721917B (en) | 2014-08-13 |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103235961A (en) * | 2013-04-27 | 2013-08-07 | 无锡昶达信息技术有限公司 | Base band control chip and ultrahigh frequency radio-frequency identification read-write device |
| CN108631898B (en) * | 2018-04-17 | 2019-04-09 | 孙驰 | A kind of fiber optic serial data communications method |
| CN111863112B (en) * | 2019-04-29 | 2022-05-17 | 长鑫存储技术有限公司 | Chip sampling quasi-position determining method and device |
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| CN102721917A (en) | 2012-10-10 |
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