CN102708827A - Scanning driving circuit - Google Patents

Scanning driving circuit Download PDF

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Publication number
CN102708827A
CN102708827A CN2012101827277A CN201210182727A CN102708827A CN 102708827 A CN102708827 A CN 102708827A CN 2012101827277 A CN2012101827277 A CN 2012101827277A CN 201210182727 A CN201210182727 A CN 201210182727A CN 102708827 A CN102708827 A CN 102708827A
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signal
transistor
circuit
couples
control
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CN2012101827277A
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CN102708827B (en
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苏忠信
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Sitronix Technology Corp
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Sitronix Technology Corp
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Abstract

The invention relates to a scanning driving circuit. A decoding circuit generates a decoding signal by a decoding circuit according to a decoding control signal; a plurality of quasi-phase conversion and driving circuits are coupled with the decoding circuit and a scanning signal is generated in sequence according to the decoding signal; a control circuit is coupled with the quasi-phase conversion and driving circuits and the control circuit is used for generating a first control signal and a second control signal according to the decoding control signal and transmitting the first control signal and the second control signal to the quasi-phase conversion and driving circuits; and the quasi-phase conversion and driving circuits are controlled to be enabled or stopped. Therefore, a circuit area of each quasi-phase conversion and driving circuit is reduced by one control circuit and the cost is further reduced.

Description

Scan drive circuit
Technical field
The present invention relates to a kind of scan drive circuit, it is a kind of scan drive circuit of saving the circuit area degree of outstanding finger.
Background technology
In the epoch now that development in science and technology is maked rapid progress, LCD has been widely used in electronics and has shown on the product, for example TV, computing machine screen, mobile computer, mobile phone or personal digital assistant (PDA) etc.LCD comprises data driver (Data Driver), scanner driver (Scan Driver) and display panels.Have pixel array in the display panels, and scanner driver is scanned up to picture element in order to a plurality of picture element row in the open pixels array with the picture element data with the output of data driver, and then demonstrates the image that desire shows.
Hold the above, general scanner driver comprises a decoding scheme and plural number accurate position conversion and driver.Decoding scheme can be exported a decoding signal according to the encoded control signal to those conversion of accurate position and driver; Those accurate position conversions and driver produce the one scan signal according to the decoding signal more in regular turn; With the scanning display panel; The type of drive that is display panels is opened with gate terminal (Gate) control internal element; Use source terminal (Source) to send into voltage accurately again and control the liquid crystal of display panel and turn to, because the voltage of gate terminal output is high power supply voltage (VGH) and low reference potential (VGL), so must use high voltage devices; Its scan drive circuit must be raised to high power supply voltage (VGH) and low reference potential (VGL) to the scanning signal through conversion of accurate position and driver, and causes area bigger.
Please Fig. 1 in the lump is the conversion of position surely of known techniques and the circuit diagram of driver.As shown in the figure, the accurate position conversion of known techniques and driver comprise first accurate converting unit 10 ', second accurate converting unit 20 ' and export driver element 30 ' with one.First accurate converting unit 10 ' is in order to receive decoding signal GI; And the accurate position of conversion decoding signal GI; And the decoding signal GI after will changing is sent to second accurate converting unit 20 '; And change the accurate position that first accurate converting unit 10 ' changed back decoding signal GI once more, afterwards, the decoding signal GI after second accurate converting unit 20 ' changed secondary is sent to output driver element 30 '; Decoding signal GI after making output driver element 30 ' according to the secondary conversion produces the scanning signal, with the scanning display panel.
Yet; Known techniques is to utilize three layers conversion of accurate position and driver to change the accurate position of scanning signal; So minimum 10 above high voltage transistors and two resistance of will using could be accomplished one group of accurate position conversion and driver; So, known techniques has increased the area of scan drive circuit, and then has increased its cost.
Therefore, how to propose a kind of novel scan drive circuit to the problems referred to above, it reduces the circuit area of each accurate position conversion and driving circuit by a control circuit, and then reduces cost, makes and can solve the above problems.
Summary of the invention
One of the object of the invention is to provide a kind of scan drive circuit, and it reduces the circuit area of each accurate position conversion and driving circuit by a control circuit, and then reduces cost.
Scan drive circuit of the present invention comprises a decoding scheme, the accurate position conversion of plural number and a driving circuit and a control circuit.Decoding scheme according to an encoded control signal, is deciphered signal and produce one according to an encoded control signal; Plural number accurate position conversion and driving circuit couple this decoding scheme, and produce the one scan signal in regular turn according to this decoding signal; And control circuit couples those conversion of accurate position and driving circuits; This control circuit produces one first controlling signal and one second controlling signal according to this encoded control signal; And transmit this first controlling signal and this second controlling signal to those conversion of accurate position and driving circuit, to control those accurate position conversions and driving circuit conductings or to end.So, the present invention reduces the circuit area of each accurate position conversion and driving circuit by control circuit, and then reduces cost.
Description of drawings
Fig. 1 is the conversion of position surely of known techniques and the circuit diagram of driver;
Fig. 2 is the calcspar of an embodiment of scan driving circuit of the present invention;
Fig. 3 is the circuit diagram of an embodiment of accurate position conversion of the present invention and driving circuit;
Fig. 4 is the oscillogram of an embodiment of scan drive circuit of the present invention; And
Fig. 5 is the circuit diagram of an embodiment of bias generating circuit of the present invention.
[figure number is to as directed]
Known techniques:
20 ' second accurate converting unit of 10 ' first accurate converting unit
30 ' output driver element
The present invention:
10 decoding schemes, 20 conversion of accurate position and driving circuits
200 the first transistors, 202 transistor secondses
204 the 3rd transistors 206 the 4th transistor
208 the 5th transistors 210 the 6th transistor
212 the 7th transistors, 21 conversion of accurate position and driving circuits
22 accurate position conversions and driving circuit 23 conversion of accurate position and driving circuits
24 accurate position conversions and driving circuit 25 conversion of accurate position and driving circuits
26 accurate position conversions and driving circuit 27 conversion of accurate position and driving circuits
30 control circuits, 32 enable circuits
320 delay cells, 322 logical blocks
34 accurate converting unit 36 bias generating circuits
360 first impedors, 362 first constant current sources
364 first switches, 366 second switches
Embodiment
For making architectural feature of the present invention and the effect reached there are further understanding and understanding, cooperate detailed explanation, be described as follows in order to preferred embodiment and accompanying drawing:
See also Fig. 2, it is the calcspar of an embodiment of scan driving circuit of the present invention.As shown in the figure, scan drive circuit of the present invention comprises a decoding scheme 10, plural number accurate position conversion and a driving circuit 20～27 and a control circuit 30.Decoding scheme 10 produces a decoding signal according to an encoded control signal, in present embodiment, the encoded control signal is the encoded control signal D of one or three bits 2D 1D 0, and decoding scheme 10 is according to the encoded control signal D of this three bit 2D 1D 0To produce the decoding signal GI of eight bits 7～GI 0, decoding scheme 10 is again with the decoding signal G of eight bits I7～G I0Be sent to those conversion of accurate position and driving circuits 20～27 respectively, export a scanning signal G in regular turn to determine those accurate position conversions and driving circuit 20～27 0～G 7, and the scanning display panel.
Control circuit 30 couples those conversion of accurate position and driving circuits 20～27, and control circuit 30 is according to encoded control signal D 2D 1D 0And produce one first controlling signal BOEC and one second controlling signal OEHB; And control circuit 30 transmits the first controlling signal BOEC and the second controlling signal OEHB changes and driving circuit 20～27 to those accurate positions, to control those accurate position conversions and driving circuit 20～27 activations or to end.Be that those accurate position conversions and driving circuit 20～27 can be according to decoding signal G I7～G I0Cooperate the first controlling signal BOEC and the second controlling signal OEHB and an accurate position conversion and driving circuit output scanning signal are once only arranged; The first controlling signal BOEC that control circuit 30 of the present invention is produced and the second controlling signal OEHB are in order to confirm that those accurate position conversions and driving circuit 20～27 end; Just the accurate position conversion of activation next stage and driving circuit produce the scanning signal again; For example change the control circuit 30 first accurate position that produces the first controlling signal BOEC those accurate position conversions of activation and driving circuit 20～27 with the second controlling signal OEHB and during driving circuit 20; Produce the first controlling signal BOEC and the second controlling signal OEHB once more at control circuit 30 and can confirm that the first accurate position conversion and driving circuit 20 have ended; And change and driving circuit 21 the activation second accurate position again; So, the present invention can reduce the circuit area of each accurate position conversion and driving circuit 20～27 by control circuit 30, and then reduces cost.Below be to describe to the structure of each accurate position conversion and driving circuit 20～27.
Please consult Fig. 3 and Fig. 4 in the lump, it is respectively the circuit diagram and the oscillogram of accurate position conversion of the present invention and driving circuit and scan drive circuit.As shown in the figure; The first order accurate position conversion and driving circuit 20 with those accurate position conversions and driving circuit are example, and the accurate position conversion of present embodiment and driving circuit 20 comprise a first transistor 200, a transistor seconds 202, one the 3rd transistor 204, one the 4th transistor 206, one the 5th transistor 208, one the 6th transistor 210 and one the 7th transistor 212.One control end of the first transistor 200 is in order to receive the first controlling signal BOEC; One first end of the first transistor 200 couples one first power end, and to receive one first power supply VGH, a control end of transistor seconds 202 couples one second end of the first transistor 200; One first end of transistor seconds 202 couples first power end; Receiving one first power supply VGH, and one second end of transistor seconds 202 couples an output terminal Gout of conversion of accurate position and driving circuit, with output scanning signal G0; One control end of the 3rd transistor 204 is in order to receive decoding signal G at an input end I0, one first end of the 3rd transistor 204 couples second end of the first transistor 200 and the control end of transistor seconds 202, and one second end of the 3rd transistor 204 couples an earth terminal GND; One control end of the 4th transistor 206 is in order to receive decoding signal G I0, the 4th transistorized one first end couples a second source end and receives second source MV; One control end of the 5th transistor 208 couples one second end of the 4th transistor 206, and one first end of the 5th transistor 208 couples second end and the output terminal Gout of transistor seconds 202, and one second termination of the 5th transistor 208 is received a reference potential VGL; One control end of the 6th transistor 210 couples output terminal Gout, and one first end of the 6th transistor 210 couples second end of the 4th transistor 206 and the control end of the 5th transistor 208; And a control end of the 7th transistor 212 receives the second controlling signal OEHB, and first end of the 7th transistor 212 couples one second end of the 6th transistor 210, and one second termination of the 7th transistor 212 is received reference potential VGL.Below be how to operate and describe to conversion of accurate position and driving circuit 20.
Please consult Fig. 4 in the lump, the encoded control signal D of three bits 2D 1D 0Be 000,001,010 in regular turn ..., 111, decoding scheme 10 is according to the encoded control signal D of this three bit 2D 1D 0And produce and transmit decoding signal G in regular turn I0～G I7To those conversion of accurate position and driving circuit 20～27, for example work as the encoded control signal D of three bits 2D 1D 0Be 000 o'clock, 10 decoding signal G that produce and export high levels of decoding scheme I0To first conversion of accurate position and driving circuit 20, other decoding signal G I1～G I7Be low level; Encoded control signal D when three bits 2D 1D 0Be 001 o'clock, 10 decoding signal G that produce and export high levels of decoding scheme I1To second accurate position conversion and driving circuit 21, other decoding signal G I0, G I2～G I7Be low level, by that analogy.
Control circuit 30 can be according to encoded control signal D 2D 1D 0In minimum bit D 0And produce the first controlling signal BOEC and the second controlling signal OEHB; And control circuit 30 can transmit the first controlling signal BOEC and the second controlling signal OEHB changes and driving circuit 20～27 to those accurate positions, and 20～27 of those accurate position conversions and driving circuits can be according to decoding signal G I0～G I7, the first controlling signal BOEC and the second controlling signal OEHB and produce the scanning signal in output terminal Gout, in present embodiment, be example, as encoded control signal D with first accurate position conversion and driving circuit 20 in those accurate position conversions and the driving circuit 20～27 2D 1D 0Be 000 o'clock, 10 decoding signal G that produce and export high levels of decoding scheme I0To first conversion of accurate position and driving circuit 20, the input end G of first accurate position conversion and driving circuit 20 IReceive decoding signal G I0, at this moment, decoding signal G I0Standard position be the high levle signal; And the standard of first controlling signal BOEC position is the accurate position of ground connection GND and accurate the accurate position for reference potential VGL of the second controlling signal OEHB; Make the first transistor 200, the 3rd transistor 204 and the 5th transistor 208 be conducting state, and transistor seconds 202, the 4th transistor 206, the 6th transistor 210 are cut-off state with the 7th transistor 212, like this; The standard position of the scanning signal G0 of the output terminal Gout of conversion of accurate position and driving circuit 20 is the low level signal; At this moment, accurate position of those of scan drive circuit and driving circuit 20～27 neither meeting output scanning signals are all closed to confirm those accurate positions and driving circuit 20～27.
Then, decoding signal G I0Standard position still be the high levle signal; And the accurate position of the first controlling signal BOEC changes to high levle signal (being VGH) by the standard position that low level (being ground connection GND) changes to the high levle (being BIAS voltage) and the second controlling signal OEHB by low level (being reference potential VGL); The conducting state that makes the first transistor 200 present fixed current to flow through, the 3rd transistor 204 are conducting state; Let transistor seconds 202 conductings, so, the scanning signal G0 of output terminal Gout will rise.Originally the 4th transistor 206 and the 6th transistor 210 are cut-off state; The 5th transistor 208 and the 7th transistor 212 are conducting state; When the scanning signal G0 of output terminal Gout will rise and the 6th transistor 210 can become conducting state by cut-off state; When the 210 conducting meetings of the 6th transistor let the 5th transistor 208 become cut-off state, and let the standard position of scanning signal G0 of output terminal Gout become VGH.As encoded control signal D 2D 1D 0Convert at 001 o'clock, 10 generations of decoding scheme and output decoding signal GI7GI6GI5GI4GI3GI2GI1G by 000 I0Become 00000010 to first accurate by 00000001 and change and driving circuit 20, wherein, decoding signal GI7GI6GI5GI4GI3GI2GI1G I0In decoding signal G I1Standard position change to the high levle signal; At this moment; The standard position of the first controlling signal BOEC is the accurate position of ground connection GND; Make the first transistors 200 in conversion of accurate position and the driving circuit 20～27 present the conducting state that fixed current flows through and become the accurate position of the accurate position of fully conducting state and the second controlling signal OEHB for reference potential VGL, the 7th transistors 212 in conversion of accurate position and the driving circuit 20～27 become cut-off state for conducting state, decipher signal GI7GI6GI5GI4GI3GI2GI1G I0In G I0Standard position change to the low level signal by height; So the 3rd transistor 204 in conversion of accurate position and the driving circuit 20 becomes cut-off state by conducting state and makes transistor seconds 202 also become cut-off state by conducting state; The 4th transistor 206 becomes conducting state by cut-off state; And make the 5th transistor 208 become conducting state by cut-off state; The accurate position of the scanning signal G0 of output terminal Gout is moved to reference potential VGL by the standard position of the first power supply VGH accurate; And make the 6th transistor 210 become cut-off state by conducting state, at this moment, the scanning signal G7 G6 G5 G4 G3 G2 G1 G0 of the output terminal Gout of those accurate positions and driving circuit 20～27 becomes 00000000 by 00000001.Through a bit of time and the accurate position of the first controlling signal BOEC changes to high levle (i.e. the first power supply VGH) by low level (being reference potential VGL) by standard that low level (being ground connection GND) changes to high levle (being BIAS voltage) and the second controlling signal OEHB; Make the first transistors 200 in those accurate position conversions and the driving circuit 20～27 present conducting state, the 3rd transistor 204 that fixed current flows through and be conducting state, but because decoding signal G I1Be high levle; So the 3rd transistor 204 in conversion of accurate position and the driving circuit 21 is a conducting state, and makes also conducting of transistor seconds 202, so; The scanning signal G0 of output terminal Gout will rise; Originally the 4th transistor 206 is a cut-off state with the 6th transistor 210, and the 5th transistor 208 and the 7th transistor 212 are conducting state, understands because of rising the 6th transistor 210 of the scanning signal G0 of output terminal Gout become conducting state by cut-off state; When the 210 conducting meetings of the 6th transistor let the 5th transistor 208 become cut-off state; And let the standard position of scanning signal Go of output terminal Gout become the accurate position of the first power supply VGH, so the accurate position of the scanning signal G1 of the output terminal Gout of next stage accurate position conversion and driving circuit 21 can become the first power supply VGH by reference potential VGL; Therefore; The scanning signal G6 G5 G4 G3 G2 G1 G0 of the output terminal of those accurate position conversions and driving circuit 21～27 becomes 00000000 by 00000001 and becomes 00000010 again, by that analogy, just no longer gives unnecessary details in this.Please consult Fig. 2 again, control circuit 30 of the present invention comprises an activation circuit 32 and an accurate converting unit 34.Enable circuit 32 is in order to reception and according to encoded control signal D 2D 1D 0And produce an activation signal OE, and the accurate converting unit 34 in position couples enable circuit 32, and the accurate position of the accurate converting unit 34 conversion enable signal OE in position is to produce the first controlling signal BOEC and the second controlling signal OEHB.Wherein, enable circuit 32 comprises a delay cell 320 and a logical block 322.Delay cell 320 is in order to postpone encoded control signal D 2D 1D 0Minimum bit D 0, postponing signal DD0 and produce one, logical block 322 has a first input end and one second input end, and the first input end of logical block 322 is in order to receive delay signal DD0, and second input end of logical block 322 is in order to receive encoded control signal D 2D 1D 0Minimum bit D 0, 322 foundations of logical block postpone signal DD0 and encoded control signal D 2D 1D 0Minimum bit D 0And generation enable signal OE; In present embodiment; Logical block 322 is a mutual exclusion or lock, and logical block 322 also can utilize other logical circuits to replace the mutual exclusion or the lock of present embodiment certainly, and it can be revised according to the technology contents of present embodiment for having common knowledge the knowledgeable in this technical field easily; So, as long as utilize 322 foundations of logical block of present embodiment to postpone signal DD0 and encoded control signal D 2D 1D 0Minimum bit D 0And the correlation technique content that produces enable signal OE is all invention which is intended to be protected.
In addition, control circuit 30 of the present invention more comprises a bias generating circuit 36.Bias generating circuit 36 couples accurate position converting unit 34; And produce the first controlling signal BOEC according to an output signal OEH of accurate position converting unit 34; And in those accurate position conversions and driving circuit 20～27, produce a bias current; Promptly consult Fig. 3 in the lump again, because when the first transistor 200 and the 3rd transistor 204 ended simultaneously, the voltage of the node between the first transistor 200 and the 3rd transistor 204 was in the state of unsteady (Floting); Conducting and the cut-off state that makes transistor seconds 202 is indeterminate and influence the running of whole accurate position conversion and driving circuit 20-27; So bias generating circuit 30 of the present invention lets 200 meetings of the first transistor in the conducting state or the conducting state of fixed current, when ending simultaneously with the 3rd transistor 204; Still can produce a bias current; And the bias plasma the first transistor 200 of flowing through that fails to be convened for lack of a quorum, make node between the first transistor 200 and the 3rd transistor 204 maintain the fixed voltage of the first power supply VGH or ground connection GND, let transistor seconds 202 be fixed on by or conducting state.So, the bias current that the present invention can be produced by bias generating circuit 36, and avoid conversion of accurate position and driving circuit 20-27 to produce wrong action.
Please consult Fig. 5 in the lump, it is the circuit diagram of an embodiment of bias generating circuit of the present invention.As shown in the figure, bias generating circuit 36 of the present invention comprises one first impedor 360, one first constant current source 362, one first switch 364 and a second switch 366.One first end of first impedor 360 couples first power end; And receive the first power supply VGH; One first end of first current source 362 couples one second end of impedor 360; And one second end of first constant current source 362 is coupled to earth terminal GND, and one first end of first switch 364 couples second end of first impedor 360 and first end of first constant current source 362, and second end of first switch 364 couples an output terminal of bias generating circuit 36; First switch 364 is controlled by the output signal OEH of accurate position converting unit 34; One first end of second switch 366 couples the output terminal of bias generating circuit 36, and one second end of second switch 366 couples earth terminal GND, and second switch 366 is controlled by the output signal OEH of accurate position converting unit 34.In addition, the bias generating circuit 36 of present embodiment is a current mirroring circuit.So, bias generating circuit 36 of the present invention can produce bias current, and avoids conversion of accurate position and driving circuit 20-27 to produce wrong action.In sum, scan drive circuit of the present invention according to an encoded control signal, is deciphered signal and produce one by a decoding scheme; Plural number accurate position conversion and driving circuit couple decoding scheme, and produce the one scan signal in regular turn according to the decoding signal; And one control circuit couple those conversion of accurate position and driving circuits; Control circuit produces one first controlling signal and one second controlling signal according to the encoded control signal; And transmit first controlling signal and second controlling signal to those conversion of accurate position and driving circuit, to control those accurate position conversions and driving circuit activations or to end.So, the present invention reduces the circuit area of each accurate position conversion and driving circuit by a control circuit, and then reduces cost.
In sum; Be merely preferred embodiment of the present invention; Be not to be used for limiting the scope that the present invention implements, all equalizations of doing according to the described shape of claim scope of the present invention, structure, characteristic and spirit change and modify, and all should be included in the claim scope of the present invention.

Claims (8)

1. scanning driving device is characterized in that it comprises:
One decoding scheme according to an encoded control signal, and produces a decoding signal;
Plural number accurate position conversion and driving circuit couple this decoding scheme, and produce in regular turn according to this decoding signal
The one scan signal; And
One control circuit; Couple those conversion of accurate position and driving circuits; This control circuit produces one first controlling signal and one second controlling signal according to the encoded control signal; And transmit this first controlling signal and this second controlling signal to those conversion of accurate position and driving circuit, to control those accurate position conversions and driving circuit activations or to end.
2. scanning driving device as claimed in claim 1 is characterized in that, wherein this control circuit system produces this decoding signal according to the minimum bit of this encoded control signal.
3. scanning driving device as claimed in claim 1 is characterized in that, wherein this standard position conversion and driving circuit comprise:
One the first transistor, the one of which control end receives this first controlling signal, and one first end of this first transistor couples one first power end;
One transistor seconds, one of which control end couple one second end of this first transistor, and one first end of this transistor seconds couples this first power end, and one second end of this transistor seconds couples an output terminal of this standard position conversion and driving circuit;
One the 3rd transistor, one of which control end receive should decipher signal, and the 3rd transistorized one first end couples this second end of this first transistor and this control end of this transistor seconds, and the 3rd transistorized one second end couples an earth terminal;
One the 4th transistor, one of which control end receive should decipher signal, and the 4th transistorized one first end couples a second source end;
One the 5th transistor, one of which control end couple the 4th transistorized one second end, and the 5th transistorized one first end couples this second end and this output terminal of this transistor seconds, and the 5th transistorized one second termination is received a reference potential;
One the 6th transistor, the one of which control end couples this output terminal, and the 6th transistorized one first end couples the 4th transistorized this second end and the 5th transistorized this control end; And
One the 7th transistor, the one of which control end receives this second controlling signal, and the 7th transistorized this first end couples the 6th transistorized one second end, and the 7th transistorized one second termination is received this reference potential.
4. scanning driving device as claimed in claim 1 is characterized in that, wherein this control circuit comprises:
One activation circuit receives and produces an activation signal according to this encoded control signal; And
An accurate converting unit couples this enable circuit, and changes the accurate position of this enable signal, to produce this first controlling signal and this second controlling signal.
5. scanning driving device as claimed in claim 4 is characterized in that, wherein this control circuit more comprises:
One bias generating circuit couples this standard position converting unit, and produces this first controlling signal according to an output signal of this standard position converting unit.
6. scanning driving device as claimed in claim 5 is characterized in that, wherein this bias generating circuit is a current mirroring circuit.
7. scanning driving device as claimed in claim 5 is characterized in that, wherein this bias generating circuit comprises:
One impedor, one of which first end couples one first power end;
One constant current source, one of which first end couple this impedor one second end, and this one second end that decide current terminal couples an earth terminal;
One first switch; One of which first end couples this first end of this impedor this second end and this constant current source; And one second end of this first switch couples an output terminal of this bias generating circuit, and this first switch is controlled by this output signal of this standard position converting unit; And
One second switch, one of which first end couples this output terminal of this bias generating circuit, and one second end of this second switch couples this earth terminal, and is controlled by this output signal of this standard position converting unit.
8. scanning driving device as claimed in claim 4 is characterized in that, wherein this enable circuit comprises:
One delay cell is in order to postpone this encoded control signal; And
One logical block; The one of which first input end couples this delay cell and this encoded control signal behind the receive delay; One second input end of this logical block receives this encoded control signal, this logical block according to this encoded control signal with postpone after this encoded control signal and produce this enable signal.
CN201210182727.7A 2012-06-01 2012-06-01 Scanning driving circuit Active CN102708827B (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103050104A (en) * 2012-10-31 2013-04-17 矽创电子股份有限公司 Decoding scanning driving device
CN105609030A (en) * 2014-11-25 2016-05-25 矽创电子股份有限公司 Driving circuit of display panel
CN106486069A (en) * 2015-08-26 2017-03-08 矽创电子股份有限公司 Gate drive circuit and electrophoretic display
CN111833792A (en) * 2019-04-15 2020-10-27 矽创电子股份有限公司 Quasi-position converter

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0236767B1 (en) * 1986-02-12 1993-05-05 Canon Kabushiki Kaisha Driving apparatus
US6437766B1 (en) * 1998-03-30 2002-08-20 Sharp Kabushiki Kaisha LCD driving circuitry with reduced number of control signals
US7015886B2 (en) * 2001-07-27 2006-03-21 Seiko Epson Corporation Scanning line driver circuits, electrooptic apparatuses, electronic apparatuses and semiconductor devices
CN101577102A (en) * 2008-05-08 2009-11-11 联咏科技股份有限公司 Scanning driver
CN101826864A (en) * 2009-03-06 2010-09-08 扬智科技股份有限公司 Level shift device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0236767B1 (en) * 1986-02-12 1993-05-05 Canon Kabushiki Kaisha Driving apparatus
US6437766B1 (en) * 1998-03-30 2002-08-20 Sharp Kabushiki Kaisha LCD driving circuitry with reduced number of control signals
US7015886B2 (en) * 2001-07-27 2006-03-21 Seiko Epson Corporation Scanning line driver circuits, electrooptic apparatuses, electronic apparatuses and semiconductor devices
CN101577102A (en) * 2008-05-08 2009-11-11 联咏科技股份有限公司 Scanning driver
CN101826864A (en) * 2009-03-06 2010-09-08 扬智科技股份有限公司 Level shift device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103050104A (en) * 2012-10-31 2013-04-17 矽创电子股份有限公司 Decoding scanning driving device
CN105609030A (en) * 2014-11-25 2016-05-25 矽创电子股份有限公司 Driving circuit of display panel
CN105609030B (en) * 2014-11-25 2019-06-25 矽创电子股份有限公司 Driving circuit of display panel
CN106486069A (en) * 2015-08-26 2017-03-08 矽创电子股份有限公司 Gate drive circuit and electrophoretic display
CN106486069B (en) * 2015-08-26 2019-02-19 矽创电子股份有限公司 Gate drive circuit and electrophoretic display
CN111833792A (en) * 2019-04-15 2020-10-27 矽创电子股份有限公司 Quasi-position converter
CN111833792B (en) * 2019-04-15 2023-08-08 矽创电子股份有限公司 Level converter

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