CN102708740A - Manual input ocular demonstration bridge chopping and inverting experimental circuit - Google Patents
Manual input ocular demonstration bridge chopping and inverting experimental circuit Download PDFInfo
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- CN102708740A CN102708740A CN2012101988207A CN201210198820A CN102708740A CN 102708740 A CN102708740 A CN 102708740A CN 2012101988207 A CN2012101988207 A CN 2012101988207A CN 201210198820 A CN201210198820 A CN 201210198820A CN 102708740 A CN102708740 A CN 102708740A
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Abstract
The invention discloses a manual input ocular demonstration bridge chopping and inverting experimental circuit belonging to the field of electrical experiments and solving the problems of complex structure and difficulty in knowing of the traditional experiment circuit of displaying a bridge chopping circuit and an inverting circuit. The manual input ocular demonstration bridge chopping and inverting experimental circuit comprises a drive signal manual input switch S1, a chopping or inverting function selection switch S2, seven resistors, a first LED D1, a second LED D2 ad five switch tubes, wherein the switch tubes are realized by adopting an IGBT transistor, an NMOS transistor, a PMOS transistor, an NPN triode, a PNP triode or GTO thyristor, the chopping or inverting function selection switch S2 is used for selecting types of demonstration circuits, the drive signal manual input switch S1 is used for manually inputting a drive signal, and the real-time state of the chopping or inverting circuit is demonstrated by observing the switching on or off of the first LED D1 and the second LED D2.
Description
Technical field
The present invention relates to manually import copped wave of ocular demonstration bridge-type and inversion experimental circuit, belong to the Experiments of Electricity field.
Background technology
In Power Electronic Technique, bridge-type chopper circuit and inverter circuit are circuit forms main and commonly used.In Power Electronic Technique study, learning and mastering bridge-type chopper circuit and inverter circuit also are very important.Wherein a kind of main learning method is to carry out bridge-type chopper circuit and inverter circuit experiment.But, when carrying out this type experiment, still can run into the complicated and not intelligible problem of circuit structure.
Summary of the invention
The present invention seeks to provides a kind of manual input ocular demonstration bridge-type copped wave and inversion experimental circuit in order to solve the existing demonstration bridge-type chopper circuit and the experimental circuit complex structure of inverter circuit, not intelligible problem.
Manual input ocular demonstration bridge-type copped wave according to the invention and inversion experimental circuit have six technical schemes:
First technical scheme: adopt IGBT to realize; Said manual input ocular demonstration bridge-type copped wave and inversion experimental circuit comprise the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance R 1; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one IGBT manages I1; The 2nd IGBT manages I2; The 3rd IGBT manages I3; The 4th IGBT pipe I4 and the 5th IGBT pipe I5
The end of the manual input switch S1 of drive signal connects power Vcc, and the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, another termination power ground of first resistance R 1;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the grid of IGBT pipe I1; The collector of the one IGBT pipe I1 links to each other with an end of the 3rd resistance R 3; The other end of the 3rd resistance R 3 connects power Vcc, and the emitter of IGBT pipe I1 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with the grid of the 2nd IGBT pipe I2 simultaneously; The collector of the 2nd IGBT pipe I2 connects power Vcc; The emitter of the 2nd IGBT pipe I2 links to each other with the collector of the 3rd IGBT pipe I3, and the emitter of the 3rd IGBT pipe I3 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the grid of the 5th IGBT pipe I5; The emitter of the 5th IGBT pipe I5 connects power supply ground; The collector of the 5th IGBT pipe I5 links to each other with the emitter of the 4th IGBT pipe I4; The collector of the 4th IGBT pipe I4 connects power Vcc, and the grid of the 4th IGBT pipe I4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the collector of IGBT pipe I1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, another termination power ground of the 5th resistance R 5,
The other end of the 4th resistance R 4 also links to each other with the grid of the 3rd IGBT pipe I3 simultaneously,
The collector of the 3rd IGBT pipe I3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the collector of the 5th IGBT pipe I5 simultaneously.
Second technical scheme: adopt NMOS to realize; Said manual input ocular demonstration bridge-type copped wave and inversion experimental circuit comprise the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance R 1; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one NMOS manages G1; The 2nd NMOS manages G2; The 3rd NMOS manages G3; The 4th NMOS pipe G4 and the 5th NMOS pipe G5
The end of the manual input switch S1 of drive signal connects power Vcc, and the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, another termination power ground of first resistance R 1;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the grid of NMOS pipe G1; The drain electrode of the one NMOS pipe G1 links to each other with an end of the 3rd resistance R 3; The other end of the 3rd resistance R 3 connects power Vcc, and the source electrode of NMOS pipe G1 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with the grid of the 2nd NMOS pipe G2 simultaneously; The drain electrode of the 2nd NMOS pipe G2 connects power Vcc; The source electrode of the 2nd NMOS pipe G2 links to each other with the drain electrode of the 3rd NMOS pipe G3, and the source electrode of the 3rd NMOS pipe G3 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the grid of the 5th NMOS pipe G5; The source electrode of the 5th NMOS pipe G5 connects power supply ground; The drain electrode of the 5th NMOS pipe G5 links to each other with the source electrode of the 4th NMOS pipe G4; The drain electrode of the 4th NMOS pipe G4 connects power Vcc, and the grid of the 4th NMOS pipe G4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the drain electrode of NMOS pipe G1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, another termination power ground of the 5th resistance R 5,
The other end of the 4th resistance R 4 also links to each other with the grid of the 3rd NMOS pipe G3 simultaneously,
The drain electrode of the 3rd NMOS pipe G3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the drain electrode of the 5th NMOS pipe G5 simultaneously.
The 3rd technical scheme: adopt PMOS to realize; Said manual input ocular demonstration bridge-type copped wave and inversion experimental circuit comprise the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance R 1; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one PMOS manages G1; The 2nd PMOS manages G2; The 3rd PMOS manages G3; The 4th PMOS pipe G4 and the 5th PMOS pipe G5
The termination power ground of the manual input switch S1 of drive signal, the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, and the other end of first resistance R 1 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the grid of PMOS pipe G1; The drain electrode of the one PMOS pipe G1 links to each other with an end of the 3rd resistance R 3; Another termination power ground of the 3rd resistance R 3, the source electrode of PMOS pipe G1 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with the grid of the 2nd PMOS pipe G2 simultaneously; The drain electrode of the 2nd PMOS pipe G2 connects power supply ground; The source electrode of the 2nd PMOS pipe G2 links to each other with the drain electrode of the 3rd PMOS pipe G3, and the source electrode of the 3rd PMOS pipe G3 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the grid of the 5th PMOS pipe G5; The source electrode of the 5th PMOS pipe G5 connects power Vcc; The drain electrode of the 5th PMOS pipe G5 links to each other with the source electrode of the 4th PMOS pipe G4; The drain electrode of the 4th PMOS pipe G4 connects power supply ground, and the grid of the 4th PMOS pipe G4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the drain electrode of PMOS pipe G1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, and the other end of the 5th resistance R 5 connects power Vcc,
The other end of the 4th resistance R 4 also links to each other with the grid of the 3rd PMOS pipe G3 simultaneously,
The drain electrode of the 3rd PMOS pipe G3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the drain electrode of the 5th PMOS pipe G5 simultaneously.
The 4th technical scheme: adopt the NPN triode to realize; Said manual input ocular demonstration bridge-type copped wave and inversion experimental circuit comprise the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance R 1; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one NPN triode T1; The 2nd NPN triode T2; The 3rd NPN triode T3; The 4th NPN triode T4 and the 5th NPN triode T5
The end of the manual input switch S1 of drive signal connects power Vcc, and the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, another termination power ground of first resistance R 1;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the base stage of a NPN triode T1; The collector of the one NPN triode T1 links to each other with an end of the 3rd resistance R 3; The other end of the 3rd resistance R 3 connects power Vcc, and the emitter of a NPN triode T1 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with the base stage of the 2nd NPN triode T2 simultaneously; The collector of the 2nd NPN triode T2 connects power Vcc; The emitter of the 2nd NPN triode T2 links to each other with the collector of the 3rd NPN triode T3, and the emitter of the 3rd NPN triode T3 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the base stage of the 5th NPN triode T5; The emitter of the 5th NPN triode T5 connects power supply ground; The collector of the 5th NPN triode T5 links to each other with the emitter of the 4th NPN triode T4; The collector of the 4th NPN triode T4 connects power Vcc, and the base stage of the 4th NPN triode T4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the collector of a NPN triode T1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, another termination power ground of the 5th resistance R 5,
The other end of the 4th resistance R 4 also links to each other with the base stage of the 3rd NPN triode T3 simultaneously,
The collector of the 3rd NPN triode T3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the collector of the 5th NPN triode T5 simultaneously.
The 5th technical scheme: adopt the PNP triode to realize; Said manual input ocular demonstration bridge-type copped wave and inversion experimental circuit comprise the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance then; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one PNP triode T1; The 2nd PNP triode T2; The 3rd PNP triode T3; The 4th PNP triode T4 and the 5th PNP triode T5
The termination power ground of the manual input switch S1 of drive signal, the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, and the other end of first resistance R 1 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the base stage of a PNP triode T1; The collector of the one PNP triode T1 links to each other with an end of the 3rd resistance R 3; Another termination power ground of the 3rd resistance R 3, the emitter of a PNP triode T1 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with the base stage of the 2nd PNP triode T2 simultaneously; The collector of the 2nd PNP triode T2 connects power supply ground; The emitter of the 2nd PNP triode T2 links to each other with the collector of the 3rd PNP triode T3, and the emitter of the 3rd PNP triode T3 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the base stage of the 5th PNP triode T5; The emitter of the 5th PNP triode T5 connects power Vcc; The collector of the 5th PNP triode T5 links to each other with the emitter of the 4th PNP triode T4; The collector of the 4th PNP triode T4 connects power supply ground, and the base stage of the 4th PNP triode T4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the collector of a PNP triode T1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, and the other end of the 5th resistance R 5 connects power Vcc,
The other end of the 4th resistance R 4 also links to each other with the base stage of the 3rd PNP triode T3 simultaneously,
The collector of the 3rd PNP triode T3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the collector of the 5th PNP triode T5 simultaneously.
The 6th technical scheme: adopt the GTO thyristor to realize; Said manual input ocular demonstration bridge-type copped wave and inversion experimental circuit comprise the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance R 1; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one GTO thyristor G1; The 2nd GTO thyristor G2; The 3rd GTO thyristor G3; The 4th GTO thyristor G4 and the 5th GTO thyristor G5
The end of the manual input switch S1 of drive signal connects power Vcc, and the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, another termination power ground of first resistance R 1;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the gate pole of a GTO thyristor G1; The anode of the one GTO thyristor G1 links to each other with an end of the 3rd resistance R 3; The other end of the 3rd resistance R 3 connects power Vcc, and the negative electrode of a GTO thyristor G1 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with the gate pole of the 2nd GTO thyristor G2 simultaneously; The anode of the 2nd GTO thyristor G2 connects power Vcc; The negative electrode of the 2nd GTO thyristor G2 links to each other with the anode of the 3rd GTO thyristor G3, and the negative electrode of the 3rd GTO thyristor G3 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the gate pole of the 5th GTO thyristor G5; The negative electrode of the 5th GTO thyristor G5 connects power supply ground; The anode of the 5th GTO thyristor G5 links to each other with the negative electrode of the 4th GTO thyristor G4; The anode of the 4th GTO thyristor G4 connects power Vcc, and the gate pole of the 4th GTO thyristor G4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the anode of a GTO thyristor G1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, another termination power ground of the 5th resistance R 5,
The other end of the 4th resistance R 4 also links to each other with the gate pole of the 3rd GTO thyristor G3 simultaneously,
The anode of the 3rd GTO thyristor G3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the anode of the 5th GTO thyristor G5 simultaneously.
Advantage of the present invention:
1, simple in structure directly perceived, be convenient to study, understand and grasp chopper circuit and inverter circuit principle.
2, help chopper circuit and inverter circuit are compared study and grasp.
3, conveniently build side circuit.
4, do not need special driving signal source.
5, two kinds of circuit functions can be indicated through light and clearly showed intuitively.
Description of drawings
Fig. 1 is embodiment one said manual input ocular demonstration bridge-type copped wave and an inversion experimental circuit;
Fig. 2 is embodiment two said manual input ocular demonstration bridge-type copped wave and inversion experimental circuits;
Fig. 3 is embodiment three said manual input ocular demonstration bridge-type copped wave and inversion experimental circuits;
Fig. 4 is embodiment four said manual input ocular demonstration bridge-type copped wave and inversion experimental circuits;
Fig. 5 is embodiment five said manual input ocular demonstration bridge-type copped wave and inversion experimental circuits;
Fig. 6 is embodiment six said manual input ocular demonstration bridge-type copped wave and inversion experimental circuits.
Embodiment
Embodiment one: this embodiment is described below in conjunction with Fig. 1; Said manual input ocular demonstration bridge-type copped wave of this embodiment and inversion experimental circuit adopt IGBT to realize; This experimental circuit comprises the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance R 1; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one IGBT manages I1; The 2nd IGBT manages I2; The 3rd IGBT manages I3; The 4th IGBT pipe I4 and the 5th IGBT pipe I5
The end of the manual input switch S1 of drive signal connects power Vcc, and the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, another termination power ground of first resistance R 1;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the grid of IGBT pipe I1; The collector of the one IGBT pipe I1 links to each other with an end of the 3rd resistance R 3; The other end of the 3rd resistance R 3 connects power Vcc, and the emitter of IGBT pipe I1 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with the grid of the 2nd IGBT pipe I2 simultaneously; The collector of the 2nd IGBT pipe I2 connects power Vcc; The emitter of the 2nd IGBT pipe I2 links to each other with the collector of the 3rd IGBT pipe I3, and the emitter of the 3rd IGBT pipe I3 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the grid of the 5th IGBT pipe I5; The emitter of the 5th IGBT pipe I5 connects power supply ground; The collector of the 5th IGBT pipe I5 links to each other with the emitter of the 4th IGBT pipe I4; The collector of the 4th IGBT pipe I4 connects power Vcc, and the grid of the 4th IGBT pipe I4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the collector of IGBT pipe I1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, another termination power ground of the 5th resistance R 5,
The other end of the 4th resistance R 4 also links to each other with the grid of the 3rd IGBT pipe I3 simultaneously,
The collector of the 3rd IGBT pipe I3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the collector of the 5th IGBT pipe I5 simultaneously.
Principle of work:
This experimental circuit is in order to demonstrate two kinds of circuit to the student, and a kind of is the bridge-type chopper circuit, and another kind is an inverter circuit.Copped wave or invert function SS S2 are used to select the kind of illustrative circuitry; The manual input switch S1 of drive signal is used for manual input drive signal; The function of the one IGBT pipe I1 is a level conversion; The switching signal that the continuous break-make of the manual input switch S1 of drive signal produces is carried out the conversion of opposite levels; To obtain another road drive signal opposite with the S1 switch, come display circuit state directly perceived through the light on and off of observing the first light emitting diode D1 and the second light emitting diode D2, be convenient to student's study.Detailed process is:
When copped wave or invert function SS S2 disconnection; The bridge-type chopper circuit of this experimental circuit demonstration; At this moment; What the grid of the 3rd IGBT pipe I3 and the 4th IGBT pipe I4 was imported is low level, and promptly the 3rd IGBT pipe I3 and the 4th IGBT pipe I4 are in off state, then the 2nd IGBT pipe I2 and the 5th IGBT pipe I5 formation chopper circuit.When the manual input switch S1 of manual change drive signal is closed; The first light emitting diode D1 is bright; When the manual input switch S1 of manual change drive signal breaks off; The first light emitting diode D1 goes out, and what this experimental circuit can explain clearly that pull-up resistor flows through is unidirectional interrupted current, is in the copped wave state.
When copped wave or invert function SS S2 closure; The inverter circuit of this experimental circuit demonstration; And the grid incoming level of the 3rd IGBT pipe I3 and the 4th IGBT pipe I4 changes along with the change of the on off state of the manual input switch S1 of manual change drive signal; Promptly the 3rd IGBT pipe I3 and the 4th IGBT pipe I4 are switch-on and-off, and the 2nd IGBT pipe I2, the 3rd IGBT pipe I3, the 4th IGBT pipe I4 and the 5th IGBT pipe I5 constitute inverter circuit.
When the state of the manual input switch S1 of manual change drive signal is closure, the 2nd IGBT pipe I2 and the 5th IGBT pipe I5 conducting, the first light emitting diode D1 is bright, and the 3rd IGBT pipe I3 and the 4th IGBT pipe I4 end, and the second light emitting diode D2 goes out;
When the state of the manual input switch S1 of manual change drive signal is disconnection, the 3rd IGBT pipe I3 and the 4th IGBT pipe I4 conducting, the second light emitting diode D2 is bright; The 2nd IGBT pipe I2 and the 5th IGBT pipe I5 end, and the first light emitting diode D1 goes out;
Along with the break-make of the manual input switch S1 of drive signal, the first light emitting diode D1 and the second light emitting diode D2 alternately light, and what explain that pull-up resistor flows through is the two way alternate electric current, is in inverter mode.
Embodiment two: this embodiment is described below in conjunction with Fig. 2; Said manual input ocular demonstration bridge-type copped wave of this embodiment and inversion experimental circuit adopt NMOS to realize; This experimental circuit comprises the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance R 1; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one NMOS manages G1; The 2nd NMOS manages G2; The 3rd NMOS manages G3; The 4th NMOS pipe G4 and the 5th NMOS pipe G5
The end of the manual input switch S1 of drive signal connects power Vcc, and the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, another termination power ground of first resistance R 1;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the grid of NMOS pipe G1; The drain electrode of the one NMOS pipe G1 links to each other with an end of the 3rd resistance R 3; The other end of the 3rd resistance R 3 connects power Vcc, and the source electrode of NMOS pipe G1 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with the grid of the 2nd NMOS pipe G2 simultaneously; The drain electrode of the 2nd NMOS pipe G2 connects power Vcc; The source electrode of the 2nd NMOS pipe G2 links to each other with the drain electrode of the 3rd NMOS pipe G3, and the source electrode of the 3rd NMOS pipe G3 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the grid of the 5th NMOS pipe G5; The source electrode of the 5th NMOS pipe G5 connects power supply ground; The drain electrode of the 5th NMOS pipe G5 links to each other with the source electrode of the 4th NMOS pipe G4; The drain electrode of the 4th NMOS pipe G4 connects power Vcc, and the grid of the 4th NMOS pipe G4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the drain electrode of NMOS pipe G1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, another termination power ground of the 5th resistance R 5,
The other end of the 4th resistance R 4 also links to each other with the grid of the 3rd NMOS pipe G3 simultaneously,
The drain electrode of the 3rd NMOS pipe G3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the drain electrode of the 5th NMOS pipe G5 simultaneously.
Principle of work is identical with embodiment one, repeats no more.
Embodiment three: this embodiment is described below in conjunction with Fig. 3; Said manual input ocular demonstration bridge-type copped wave of this embodiment and inversion experimental circuit adopt PMOS to realize; This experimental circuit comprises the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance R 1; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one PMOS manages G1; The 2nd PMOS manages G2; The 3rd PMOS manages G3; The 4th PMOS pipe G4 and the 5th PMOS pipe G5
The termination power ground of the manual input switch S1 of drive signal, the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, and the other end of first resistance R 1 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the grid of PMOS pipe G1; The drain electrode of the one PMOS pipe G1 links to each other with an end of the 3rd resistance R 3; Another termination power ground of the 3rd resistance R 3, the source electrode of PMOS pipe G1 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with the grid of the 2nd PMOS pipe G2 simultaneously; The drain electrode of the 2nd PMOS pipe G2 connects power supply ground; The source electrode of the 2nd PMOS pipe G2 links to each other with the drain electrode of the 3rd PMOS pipe G3, and the source electrode of the 3rd PMOS pipe G3 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the grid of the 5th PMOS pipe G5; The source electrode of the 5th PMOS pipe G5 connects power Vcc; The drain electrode of the 5th PMOS pipe G5 links to each other with the source electrode of the 4th PMOS pipe G4; The drain electrode of the 4th PMOS pipe G4 connects power supply ground, and the grid of the 4th PMOS pipe G4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the drain electrode of PMOS pipe G1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, and the other end of the 5th resistance R 5 connects power Vcc,
The other end of the 4th resistance R 4 also links to each other with the grid of the 3rd PMOS pipe G3 simultaneously,
The drain electrode of the 3rd PMOS pipe G3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the drain electrode of the 5th PMOS pipe G5 simultaneously.
Principle of work is identical with embodiment one, repeats no more.
Embodiment four: this embodiment is described below in conjunction with Fig. 4; Said manual input ocular demonstration bridge-type copped wave of this embodiment and inversion experimental circuit adopt the NPN triode to realize; This experimental circuit comprises the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance R 1; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one NPN triode T1; The 2nd NPN triode T2; The 3rd NPN triode T3; The 4th NPN triode T4 and the 5th NPN triode T5
The end of the manual input switch S1 of drive signal connects power Vcc, and the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, another termination power ground of first resistance R 1;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the base stage of a NPN triode T1; The collector of the one NPN triode T1 links to each other with an end of the 3rd resistance R 3; The other end of the 3rd resistance R 3 connects power Vcc, and the emitter of a NPN triode T1 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with the base stage of the 2nd NPN triode T2 simultaneously; The collector of the 2nd NPN triode T2 connects power Vcc; The emitter of the 2nd NPN triode T2 links to each other with the collector of the 3rd NPN triode T3, and the emitter of the 3rd NPN triode T3 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the base stage of the 5th NPN triode T5; The emitter of the 5th NPN triode T5 connects power supply ground; The collector of the 5th NPN triode T5 links to each other with the emitter of the 4th NPN triode T4; The collector of the 4th NPN triode T4 connects power Vcc, and the base stage of the 4th NPN triode T4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the collector of a NPN triode R1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, another termination power ground of the 5th resistance R 5,
The other end of the 4th resistance R 4 also links to each other with the base stage of the 3rd NPN triode T3 simultaneously,
The collector of the 3rd NPN triode T3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the collector of the 5th NPN triode T5 simultaneously.
Principle of work is identical with embodiment one, repeats no more.
Embodiment five: this embodiment is described below in conjunction with Fig. 5; Said manual input ocular demonstration bridge-type copped wave of this embodiment and inversion experimental circuit adopt the PNP triode to realize; This experimental circuit comprises the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance R 1; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one PNP triode T1; The 2nd PNP triode T2; The 3rd PNP triode T3; The 4th PNP triode T4 and the 5th PNP triode T5
The termination power ground of the manual input switch S1 of drive signal, the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, and the other end of first resistance R 1 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the base stage of a PNP triode T1; The collector of the one PNP triode T1 links to each other with an end of the 3rd resistance R 3; Another termination power ground of the 3rd resistance R 3, the emitter of a PNP triode T1 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with the base stage of the 2nd PNP triode T2 simultaneously; The collector of the 2nd PNP triode T2 connects power supply ground; The emitter of the 2nd PNP triode T2 links to each other with the collector of the 3rd PNP triode T3, and the emitter of the 3rd PNP triode T3 connects power Vcc;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the base stage of the 5th PNP triode T5; The emitter of the 5th PNP triode T5 connects power Vcc; The collector of the 5th PNP triode T5 links to each other with the emitter of the 4th PNP triode T4; The collector of the 4th PNP triode T4 connects power supply ground, and the base stage of the 4th PNP triode T4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the collector of a PNP triode T1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, and the other end of the 5th resistance R 5 connects power Vcc,
The other end of the 4th resistance R 4 also links to each other with the base stage of the 3rd PNP triode T3 simultaneously,
The collector of the 3rd PNP triode T3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the collector of the 5th PNP triode T5 simultaneously.
Principle of work is identical with embodiment one, repeats no more.
Embodiment six: this embodiment is described below in conjunction with Fig. 6; Said manual input ocular demonstration bridge-type copped wave of this embodiment and inversion experimental circuit adopt GTO to realize; This experimental circuit comprises the manual input switch S1 of drive signal; Copped wave or invert function SS S2; First resistance R 1; Second resistance R 2; The 3rd resistance R 3; The 4th resistance R 4; The 5th resistance R 5; The 6th resistance R 6; The 7th resistance R 7; The first light emitting diode D1; The second light emitting diode D2; The one GTO thyristor G1; The 2nd GTO thyristor G2; The 3rd GTO thyristor G3; The 4th GTO thyristor G4 and the 5th GTO thyristor G5
The end of the manual input switch S1 of drive signal connects power Vcc, and the other end of the manual input switch S1 of drive signal links to each other with an end of first resistance R 1, another termination power ground of first resistance R 1;
The other end of the manual input switch S1 of drive signal also links to each other with an end of second resistance R 2 simultaneously; The other end of second resistance R 2 links to each other with the gate pole of a GTO thyristor G1; The anode of the one GTO thyristor G1 links to each other with an end of the 3rd resistance R 3; The other end of the 3rd resistance R 3 connects power Vcc, and the negative electrode of a GTO thyristor G1 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with the gate pole of the 2nd GTO thyristor G2 simultaneously; The anode of the 2nd GTO thyristor G2 connects power Vcc; The negative electrode of the 2nd GTO thyristor G2 links to each other with the anode of the 3rd GTO thyristor G3, and the negative electrode of the 3rd GTO thyristor G3 connects power supply ground;
The other end of the manual input switch S1 of drive signal also links to each other with an end of the 6th resistance R 6 simultaneously; The other end of the 6th resistance R 6 links to each other with the gate pole of the 5th GTO thyristor G5; The negative electrode of the 5th GTO thyristor G5 connects power supply ground; The anode of the 5th GTO thyristor G5 links to each other with the negative electrode of the 4th GTO thyristor G4; The anode of the 4th GTO thyristor G4 connects power Vcc, and the gate pole of the 4th GTO thyristor G4 links to each other with the end of copped wave or invert function SS S2, and the other end of copped wave or invert function SS S2 links to each other with the anode of a GTO thyristor G1;
The end of copped wave or invert function SS S2 also links to each other with an end of the 4th resistance R 4 simultaneously, and the other end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5, another termination power ground of the 5th resistance R 5,
The other end of the 4th resistance R 4 also links to each other with the gate pole of the 3rd GTO thyristor G3 simultaneously,
The anode of the 3rd GTO thyristor G3 also links to each other with an end of the 7th resistance R 7 simultaneously; The other end of the 7th resistance R 7 connects the anode of the first light emitting diode D1 and the negative electrode of the second light emitting diode D2 simultaneously, and the anode of the negative electrode of the first light emitting diode D1 and the second light emitting diode D2 is connected the anode of the 5th GTO thyristor G5 simultaneously.
Principle of work is identical with embodiment one, repeats no more.
Claims (6)
1. manually import copped wave of ocular demonstration bridge-type and inversion experimental circuit; It is characterized in that; It comprises the manual input switch of drive signal (S1); Copped wave or invert function SS (S2); First resistance (R1); Second resistance (R2); The 3rd resistance (R3); The 4th resistance (R4); The 5th resistance (R5); The 6th resistance (R6); The 7th resistance (R7); First light emitting diode (D1); Second light emitting diode (D2); The one IGBT manages (I1); The 2nd IGBT manages (I2); The 3rd IGBT manages (I3); The 4th IGBT pipe (I4) and the 5th IGBT pipe (I5)
One end of the manual input switch of drive signal (S1) connects power Vcc, and the other end of the manual input switch of drive signal (S1) links to each other with an end of first resistance (R1), another termination power ground of first resistance (R1);
The other end of the manual input switch of drive signal (S1) also links to each other with an end of second resistance (R2) simultaneously; The other end of second resistance (R2) links to each other with the grid that an IGBT manages (I1); The collector of the one IGBT pipe (I1) links to each other with an end of the 3rd resistance (R3); The other end of the 3rd resistance (R3) connects power Vcc, and the emitter of IGBT pipe (I1) connects power supply ground;
The other end of the manual input switch of drive signal (S1) also links to each other with the grid of the 2nd IGBT pipe (I2) simultaneously; The collector of the 2nd IGBT pipe (I2) connects power Vcc; The emitter of the 2nd IGBT pipe (I2) links to each other with the collector that the 3rd IGBT manages (I3), and the emitter of the 3rd IGBT pipe (I3) connects power supply ground;
The other end of the manual input switch of drive signal (S1) also links to each other with an end of the 6th resistance (R6) simultaneously; The other end of the 6th resistance (R6) links to each other with the grid that the 5th IGBT manages (I5); The emitter of the 5th IGBT pipe (I5) connects power supply ground; The collector of the 5th IGBT pipe (I5) links to each other with the emitter that the 4th IGBT manages (I4); The collector of the 4th IGBT pipe (I4) connects power Vcc, and the grid of the 4th IGBT pipe (I4) links to each other with an end of copped wave or invert function SS (S2), and the other end of copped wave or invert function SS (S2) links to each other with the collector that an IGBT manages (I1);
One end of copped wave or invert function SS (S2) also links to each other with an end of the 4th resistance (R4) simultaneously, and the other end of the 4th electricity sun (R4) links to each other with an end of the 5th resistance (R5), another termination power ground of the 5th resistance (R5),
The other end of the 4th resistance (R4) also links to each other with the grid of the 3rd IGBT pipe (I3) simultaneously,
The collector of the 3rd IGBT pipe (I3) also links to each other with an end of the 7th resistance (R7) simultaneously; The other end of the 7th resistance (R7) connects the anode of first light emitting diode (D1) and the negative electrode of second light emitting diode (D2) simultaneously, and the anode of the negative electrode of first light emitting diode (D1) and second light emitting diode (D2) is connected the collector of the 5th IGBT pipe (I5) simultaneously.
2. manually import copped wave of ocular demonstration bridge-type and inversion experimental circuit; It is characterized in that; It comprises the manual input switch of drive signal (S1); Copped wave or invert function SS (S2); First resistance (R1); Second resistance (R2); The 3rd resistance (R3); The 4th resistance (R4); The 5th resistance (R5); The 6th resistance (R6); The 7th resistance (R7); First light emitting diode (D1); Second light emitting diode (D2); The one NMOS manages (G1); The 2nd NMOS manages (G2); The 3rd NMOS manages (G3); The 4th NMOS pipe (G4) and the 5th NMOS pipe (G5)
One end of the manual input switch of drive signal (S1) connects power Vcc, and the other end of the manual input switch of drive signal (S1) links to each other with an end of first resistance (R1), another termination power ground of first resistance (R1);
The other end of the manual input switch of drive signal (S1) also links to each other with an end of second resistance (R2) simultaneously; The other end of second resistance (R2) links to each other with the grid that a NMOS manages (G1); The drain electrode of the one NMOS pipe (G1) links to each other with an end of the 3rd resistance (R3); The other end of the 3rd resistance (R3) connects power Vcc, and the source electrode of NMOS pipe (G1) connects power supply ground;
The other end of the manual input switch of drive signal (S1) also links to each other with the grid of the 2nd NMOS pipe (G2) simultaneously; The drain electrode of the 2nd NMOS pipe (G2) connects power Vcc; The source electrode of the 2nd NMOS pipe (G2) links to each other with the drain electrode that the 3rd NMOS manages (G3), and the source electrode of the 3rd NMOS pipe (G3) connects power supply ground;
The other end of the manual input switch of drive signal (S1) also links to each other with an end of the 6th resistance (R6) simultaneously; The other end of the 6th resistance (R6) links to each other with the grid that the 5th NMOS manages (G5); The source electrode of the 5th NMOS pipe (G5) connects power supply ground; The drain electrode of the 5th NMOS pipe (G5) links to each other with the source electrode that the 4th NMOS manages (G4); The drain electrode of the 4th NMOS pipe (G4) connects power Vcc, and the grid of the 4th NMOS pipe (G4) links to each other with an end of copped wave or invert function SS (S2), and the other end of copped wave or invert function SS (S2) links to each other with the drain electrode that a NMOS manages (G1);
One end of copped wave or invert function SS (S2) also links to each other with an end of the 4th resistance (R4) simultaneously, and the other end of the 4th electricity sun (R4) links to each other with an end of the 5th resistance (R5), another termination power ground of the 5th resistance (R5),
The other end of the 4th resistance (R4) also links to each other with the grid of the 3rd NMOS pipe (G3) simultaneously,
The drain electrode of the 3rd NMOS pipe (G3) also links to each other with an end of the 7th resistance (R7) simultaneously; The other end of the 7th resistance (R7) connects the anode of first light emitting diode (D1) and the negative electrode of second light emitting diode (D2) simultaneously, and the anode of the negative electrode of first light emitting diode (D1) and second light emitting diode (D2) is connected the drain electrode of the 5th NMOS pipe (G5) simultaneously.
3. manually import copped wave of ocular demonstration bridge-type and inversion experimental circuit; It is characterized in that; It comprises the manual input switch of drive signal (S1); Copped wave or invert function SS (S2); First resistance (R1); Second resistance (R2); The 3rd resistance (R3); The 4th resistance (R4); The 5th resistance (R5); The 6th resistance (R6); The 7th resistance (R7); First light emitting diode (D1); Second light emitting diode (D2); The one PMOS manages (G1); The 2nd PMOS manages (G2); The 3rd PMOS manages (G3); The 4th PMOS pipe (G4) and the 5th PMOS pipe (G5)
One termination power ground of the manual input switch of drive signal (S1), the other end of the manual input switch of drive signal (S1) links to each other with an end of first resistance (R1), and the other end of first resistance (R1) connects power Vcc;
The other end of the manual input switch of drive signal (S1) also links to each other with an end of second resistance (R2) simultaneously; The other end of second resistance (R2) links to each other with the grid that a PMOS manages (G1); The drain electrode of the one PMOS pipe (G1) links to each other with an end of the 3rd resistance (R3); Another termination power ground of the 3rd resistance (R3), the source electrode of PMOS pipe (G1) connects power Vcc;
The other end of the manual input switch of drive signal (S1) also links to each other with the grid of the 2nd PMOS pipe (G2) simultaneously; The drain electrode of the 2nd PMOS pipe (G2) connects power supply ground; The source electrode of the 2nd PMOS pipe (G2) links to each other with the drain electrode that the 3rd PMOS manages (G3), and the source electrode of the 3rd PMOS pipe (G3) connects power Vcc;
The other end of the manual input switch of drive signal (S1) also links to each other with an end of the 6th resistance (R6) simultaneously; The other end of the 6th resistance (R6) links to each other with the grid that the 5th PMOS manages (G5); The source electrode of the 5th PMOS pipe (G5) connects power Vcc; The drain electrode of the 5th PMOS pipe (G5) links to each other with the source electrode that the 4th PMOS manages (G4); The drain electrode of the 4th PMOS pipe (G4) connects power supply ground, and the grid of the 4th PMOS pipe (G4) links to each other with an end of copped wave or invert function SS (S2), and the other end of copped wave or invert function SS (S2) links to each other with the drain electrode that a PMOS manages (G1);
One end of copped wave or invert function SS (S2) also links to each other with an end of the 4th resistance (R4) simultaneously, and the other end of the 4th electricity sun (R4) links to each other with an end of the 5th electricity sun (R5), and the other end of the 5th resistance (R5) connects power Vcc,
The other end of the 4th resistance (R4) also links to each other with the grid of the 3rd PMOS pipe (G3) simultaneously,
The drain electrode of the 3rd PMOS pipe (G3) also links to each other with an end of the 7th resistance (R7) simultaneously; The other end of the 7th resistance (R7) connects the anode of first light emitting diode (D1) and the negative electrode of second light emitting diode (D2) simultaneously, and the anode of the negative electrode of first light emitting diode (D1) and second light emitting diode (D2) is connected the drain electrode of the 5th PMOS pipe (G5) simultaneously.
4. manually import copped wave of ocular demonstration bridge-type and inversion experimental circuit; It is characterized in that; It comprises the manual input switch of drive signal (S1); Copped wave or invert function SS (S2); First resistance (R1); Second resistance (R2); The 3rd resistance (R3); The 4th resistance (R4); The 5th resistance (R5); The 6th resistance (R6); The 7th resistance (R7); First light emitting diode (D1); Second light emitting diode (D2); The one NPN triode (T1); The 2nd NPN triode (T2); The 3rd NPN triode (T3); The 4th NPN triode (T4) and the 5th NPN triode (T5)
One end of the manual input switch of drive signal (S1) connects power Vcc, and the other end of the manual input switch of drive signal (S1) links to each other with an end of first resistance (R1), another termination power ground of first resistance (R1);
The other end of the manual input switch of drive signal (S1) also links to each other with an end of second resistance (R2) simultaneously; The other end of second resistance (R2) links to each other with the base stage of a NPN triode (T1); The collector of the one NPN triode (T1) links to each other with an end of the 3rd resistance (R3); The other end of the 3rd resistance (R3) connects power Vcc, and the emitter of a NPN triode (T1) connects power supply ground;
The other end of the manual input switch of drive signal (S1) also links to each other with the base stage of the 2nd NPN triode (T2) simultaneously; The collector of the 2nd NPN triode (T2) connects power Vcc; The emitter of the 2nd NPN triode (T2) links to each other with the collector of the 3rd NPN triode (T3), and the emitter of the 3rd NPN triode (T3) connects power supply ground;
The other end of the manual input switch of drive signal (S1) also links to each other with an end of the 6th resistance (R6) simultaneously; The other end of the 6th resistance (R6) links to each other with the base stage of the 5th NPN triode (T5); The emitter of the 5th NPN triode (T5) connects power supply ground; The collector of the 5th NPN triode (T5) links to each other with the emitter of the 4th NPN triode (T4); The collector of the 4th NPN triode (T4) connects power Vcc, and the base stage of the 4th NPN triode (T4) links to each other with an end of copped wave or invert function SS (S2), and the other end of copped wave or invert function SS (S2) links to each other with the collector of a NPN triode (T1);
One end of copped wave or invert function SS (S2) also links to each other with an end of the 4th resistance (R4) simultaneously, and the other end of the 4th resistance (R4) links to each other with an end of the 5th resistance (R5), another termination power ground of the 5th resistance (R5),
The other end of the 4th resistance (R4) also links to each other with the base stage of the 3rd NPN triode (T3) simultaneously,
The collector of the 3rd NPN triode (T3) also links to each other with an end of the 7th resistance (R7) simultaneously; The other end of the 7th resistance (R7) connects the anode of first light emitting diode (D1) and the negative electrode of second light emitting diode (D2) simultaneously, and the negative electrode of first light emitting diode (D1) and the anode of second light emitting diode (D2) are connected the collector of the 5th NPN triode (T5) simultaneously.
5. manually import copped wave of ocular demonstration bridge-type and inversion experimental circuit; It is characterized in that; It comprises the manual input switch of drive signal (S1); Copped wave or invert function SS (S2); First resistance (R1); Second resistance (R2); The 3rd resistance (R3); The 4th resistance (R4); The 5th resistance (R5); The 6th resistance (R6); The 7th resistance (R7); First light emitting diode (D1); Second light emitting diode (D2); The one PNP triode (T1); The 2nd PNP triode (T2); The 3rd PNP triode (T3); The 4th PNP triode (T4) and the 5th PNP triode (T5)
One termination power ground of the manual input switch of drive signal (S1), the other end of the manual input switch of drive signal (S1) links to each other with an end of first resistance (R1), and the other end of first resistance (R1) connects power Vcc;
The other end of the manual input switch of drive signal (S1) also links to each other with an end of second resistance (R2) simultaneously; The other end of second resistance (R2) links to each other with the base stage of a PNP triode (T1); The collector of the one PNP triode (T1) links to each other with an end of the 3rd resistance (R3); Another termination power ground of the 3rd resistance (R3), the emitter of a PNP triode (T1) connects power Vcc;
The other end of the manual input switch of drive signal (S1) also links to each other with the base stage of the 2nd PNP triode (T2) simultaneously; The collector of the 2nd PNP triode (T2) connects power supply ground; The emitter of the 2nd PNP triode (T2) links to each other with the collector of the 3rd PNP triode (T3), and the emitter of the 3rd PNP triode (T3) connects power Vcc;
The other end of the manual input switch of drive signal (S1) also links to each other with an end of the 6th resistance (R6) simultaneously; The other end of the 6th resistance (R6) links to each other with the base stage of the 5th PNP triode (T5); The emitter of the 5th PNP triode (T5) connects power Vcc; The collector of the 5th PNP triode (T5) links to each other with the emitter of the 4th PNP triode (T4); The collector of the 4th PNP triode (T4) connects power supply ground, and the base stage of the 4th PNP triode (T4) links to each other with an end of copped wave or invert function SS (S2), and the other end of copped wave or invert function SS (S2) links to each other with the collector of a PNP triode (T1);
One end of copped wave or invert function SS (S2) also links to each other with an end of the 4th resistance (R4) simultaneously, and the other end of the 4th resistance (R4) links to each other with an end of the 5th resistance (R5), and the other end of the 5th resistance (R5) connects power Vcc,
The other end of the 4th resistance (R4) also links to each other with the base stage of the 3rd PNP triode (T3) simultaneously,
The collector of the 3rd PNP triode (T3) also links to each other with an end of the 7th resistance (R7) simultaneously; The other end of the 7th resistance (R7) connects the anode of first light emitting diode (D1) and the negative electrode of second light emitting diode (D2) simultaneously, and the negative electrode of first light emitting diode (D1) and the anode of second light emitting diode (D2) are connected the collector of the 5th PNP triode (T5) simultaneously.
6. manually import copped wave of ocular demonstration bridge-type and inversion experimental circuit; It is characterized in that; It comprises the manual input switch of drive signal (S1); Copped wave or invert function SS (S2); First resistance (R1); Second resistance (R2); The 3rd resistance (R3); The 4th resistance (R4); The 5th resistance (R5); The 6th resistance (R6); The 7th resistance (R7); First light emitting diode (D1); Second light emitting diode (D2); The one GTO thyristor (G1); The 2nd GTO thyristor (G2); The 3rd GTO thyristor (G3); The 4th GTO thyristor (G4) and the 5th GTO thyristor (G5)
One end of the manual input switch of drive signal (S1) connects power Vcc, and the other end of the manual input switch of drive signal (S1) links to each other with an end of first resistance (R1), another termination power ground of first resistance (R1);
The other end of the manual input switch of drive signal (S1) also links to each other with an end of second resistance (R2) simultaneously; The other end of the second electricity sun (R2) links to each other with the gate pole of a GTO thyristor (G1); The anode of the one GTO thyristor (G1) links to each other with an end of the 3rd resistance (R3); The other end of the 3rd resistance (R3) connects power Vcc, and the negative electrode of a GTO thyristor (G1) connects power supply ground;
The other end of the manual input switch of drive signal (S1) also links to each other with the gate pole of the 2nd GTO thyristor (G2) simultaneously; The anode of the 2nd GTO thyristor (G2) connects power Vcc; The negative electrode of the 2nd GTO thyristor (G2) links to each other with the anode of the 3rd GTO thyristor (G3), and the negative electrode of the 3rd GTO thyristor (G3) connects power supply ground;
The other end of the manual input switch of drive signal (S1) also links to each other with an end of the 6th resistance (R6) simultaneously; The other end of the 6th resistance (R6) links to each other with the gate pole of the 5th GTO thyristor (G5); The negative electrode of the 5th GTO thyristor (G5) connects power supply ground; The anode of the 5th GTO thyristor (G5) links to each other with the negative electrode of the 4th GTO thyristor (G4); The anode of the 4th GTO thyristor (G4) connects power Vcc, and the gate pole of the 4th GTO thyristor (G4) links to each other with an end of copped wave or invert function SS (S2), and the other end of copped wave or invert function SS (S2) links to each other with the anode of a GTO thyristor (G1);
One end of copped wave or invert function SS (S2) also links to each other with an end of the 4th resistance (R4) simultaneously, and the other end of the 4th resistance (R4) links to each other with an end of the 5th resistance (R5), another termination power ground of the 5th resistance (R5),
The other end of the 4th resistance (R4) also links to each other with the gate pole of the 3rd GTO thyristor (G3) simultaneously,
The anode of the 3rd GTO thyristor (G3) also links to each other with an end of the 7th resistance (R7) simultaneously; The other end of the 7th resistance (R7) connects the anode of first light emitting diode (D1) and the negative electrode of second light emitting diode (D2) simultaneously, and the negative electrode of first light emitting diode (D1) and the anode of second light emitting diode (D2) are connected the anode of the 5th GTO thyristor (G5) simultaneously.
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| CN201210198820.7A CN102708740B (en) | 2012-06-15 | 2012-06-15 | Manual input ocular demonstration bridge chopping and inverting experimental circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210198820.7A CN102708740B (en) | 2012-06-15 | 2012-06-15 | Manual input ocular demonstration bridge chopping and inverting experimental circuit |
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| CN102708740B CN102708740B (en) | 2014-04-02 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102903285A (en) * | 2012-10-16 | 2013-01-30 | 长春工业大学 | Demonstration instrument for addition and subtraction characteristics of electrical bridge |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201655110U (en) * | 2010-02-08 | 2010-11-24 | 西安普能电力电子科技有限公司 | Transparent module type power electronic comprehensive experimental and practical training platform |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201655110U (en) * | 2010-02-08 | 2010-11-24 | 西安普能电力电子科技有限公司 | Transparent module type power electronic comprehensive experimental and practical training platform |
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| 吴晓刚等: "《全控型电力电子器件教学实验平台的开发》", 《电气电子教学学报》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102903285A (en) * | 2012-10-16 | 2013-01-30 | 长春工业大学 | Demonstration instrument for addition and subtraction characteristics of electrical bridge |
| CN102903285B (en) * | 2012-10-16 | 2014-05-07 | 长春工业大学 | Demonstration instrument for addition and subtraction characteristics of electrical bridge |
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| CN102708740B (en) | 2014-04-02 |
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