CN102694960A - Device for synchronously controlling video output signal - Google Patents
Device for synchronously controlling video output signal Download PDFInfo
- Publication number
- CN102694960A CN102694960A CN2012101880974A CN201210188097A CN102694960A CN 102694960 A CN102694960 A CN 102694960A CN 2012101880974 A CN2012101880974 A CN 2012101880974A CN 201210188097 A CN201210188097 A CN 201210188097A CN 102694960 A CN102694960 A CN 102694960A
- Authority
- CN
- China
- Prior art keywords
- signal
- video
- output
- synchronous
- synchronizing signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The invention discloses a device for synchronously controlling a video output signal. The device comprises a plurality of video output devices; one of the video output devices further comprises a video synchronizing signal generator and a synchronizing signal transmitter; each video output device further comprises a synchronizing signal receiver; a clock signal output end and a synchronizing signal output end of the video synchronizing signal generator are respectively connected with a lock signal receiving end and a synchronizing signal receiving end of the synchronizing signal transmitter; a signal output end of the synchronizing signal transmitter is respectively connected with signal receiving end of each synchronizing signal receiver; in each video output device, a clock signal output end of the synchronizing signal receiver is connected with a clock signal input end of a video signal processor, and a synchronizing signal output end of the synchronizing signal receiver is respectively connected with synchronizing signal input ends of the synchronizing signal processor and a video output driver. The device for synchronously controlling the video output signal provided by the invention has no delay; and the video output devices can be completely synchronized.
Description
Technical field
The present invention relates to video output control, particularly relate to a kind of video output signals sync control device.
Background technology
Shown in Figure 1; Be the structure chart of existing video output signals sync control device, comprise a plurality of picture output devices (picture output device 1 is to picture output device N), a plurality of videos include the video synchronization signal generator; Video signal preprocessor and video output driver; In each picture output device, the video synchronization signal generator receives the synchronous locking signal (GENLOCK signal) of outside video signal source, through following the tracks of this GENLOCK signal clocking and synchronizing signal.The video synchronization signal generator exports clock signal to video processor; Export synchronizing signal to video processor and video output driver respectively; Wherein, Video signal preprocessor carries out sampling processing according to clock signal to the vision signal that the video signal source from the outside receives, and according to synchronizing signal the vision signal that the video signal source from the outside receives is carried out signal processing, and output processed video signal is to the video output driver; The video output driver is used for will converting video output signals from the vision signal that video signal preprocessor receives into according to synchronizing signal and drives outside display device.Picture output device 1 drives display device 1 to display device N to picture output device N is corresponding respectively.In the above-mentioned video output signals sync control device; Each sync generator is all followed the tracks of GENLOCK signal clocking and synchronizing signal in the different video output equipment; But because each sync generator has time-delay to some extent in the different video output equipment when work; Cause the multi-channel video output equipment to have signal jitter, a plurality of display device splicings that drive separately can not arrive accurately Synchronization Control when showing, influence display effect.
Summary of the invention
Technical problem to be solved by this invention is: remedy the deficiency of above-mentioned prior art, propose a kind of video output signals sync control device, can more accurately realize the Synchronization Control of multi-channel video output equipment.
Technical problem of the present invention solves through following technical scheme:
A kind of video output signals sync control device comprises a plurality of picture output devices, and each picture output device includes video signal preprocessor and video output driver; A picture output device in said a plurality of picture output device also comprises video synchronization signal generator and synchronization signal transmitter, and each said picture output device all also comprises synchronous signal receiver; The control end of said video synchronization signal generator connects the synchronous locking signal output of outside video signal source; The clock signal output terminal of said video synchronization signal generator and synchronous signal output end are connected the clock signal receiving terminal and the synchronizing signal receiving terminal of said synchronization signal transmitter respectively; The signal output part of said synchronization signal transmitter connects the signal receiving end of each said synchronous signal receiver respectively; Said synchronization signal transmitter is used for clock signal with the output of said video synchronization signal generator and converts transmission signals into synchronizing signal and export each said synchronous signal receiver to, and each said synchronous signal receiver is used for recovering said clock signal of generation and said synchronizing signal from said transmission signals; In each said picture output device; The clock signal output terminal of said synchronous signal receiver connects the clock signal input terminal of said video signal preprocessor, synchronous signal output end connect respectively said video signal preprocessor and video output driver synchronous signal input end.
The beneficial effect of the present invention and prior art contrast is:
Video output signals sync control device of the present invention; Utilize the video synchronization signal generator of one of them picture output device in a plurality of picture output devices and the synchronization signal transmitter of setting up; In a plurality of picture output devices, set up simultaneously synchronous signal receiver respectively; Thereby export each picture output device respectively to after converting same clock signal and synchronizing signal into transmission signals; By the synchronous signal receiver in the picture output device clock signal and synchronizing signal are recovered out; Clock signal of then using in each picture output device and synchronizing signal can realize not having time-delay fully synchronously, so each picture output device can be realized fully synchronously.
Description of drawings
Fig. 1 is the structure chart of video output signals sync control device in the prior art;
Fig. 2 is the structure chart of the video output signals sync control device in the specific embodiment of the invention.
Embodiment
Below in conjunction with embodiment and contrast accompanying drawing the present invention is explained further details.
As shown in Figure 2, be the structure chart of the video output signals sync control device in this embodiment.Video output signals sync control device 1 comprises a plurality of picture output devices (picture output device 1, picture output device 2 are to picture output device N); Wherein, Each picture output device includes synchronous signal receiver 103; Video signal preprocessor 104 and video output driver 105, and one of them picture output device also comprises video synchronization signal generator 101 and synchronization signal transmitter 102.
Wherein, The control end of video synchronization signal generator 101 connects the synchronous locking signal output of outside video signal source 3; The clock signal output terminal of video synchronization signal generator 101 and synchronous signal output end are connected the clock signal receiving terminal and the synchronizing signal receiving terminal of synchronization signal transmitter 102 respectively, and the signal output part of synchronization signal transmitter 102 connects the signal receiving end of each synchronous signal receiver 103 respectively; In each picture output device; The clock signal output terminal of synchronous signal receiver 103 connects the clock signal input terminal of video signal preprocessor 104; Synchronous signal output end connects the synchronous signal input end of video signal preprocessor 104 and video output driver 105 respectively; The video signal source input of video signal preprocessor 104 connects the vision signal source output terminal of outside video signal source 3, and the video output terminals of video signal preprocessor 104 connects the video signal input terminal of video output driver 105.The output of video output driver 105 connects external display device 1 to be driven.
Video synchronization signal generator 101 is used to follow the tracks of the GENLOCK signal that outside video signal source 3 sends, clocking and synchronizing signal, and export clock signal and synchronizing signal to synchronization signal transmitter 102.
Each synchronous signal receiver 103 is used for the transmission signals that receives from synchronization signal transmitter 102 is recovered clocking and synchronizing signal.Synchronous signal receiver 103 recovers signal and can realize through the differential received circuit.
Video output signals sync control device in this embodiment; Because what use when each video signal preprocessor and video output driver processing signals is to recover out clock signal and synchronizing signal from same clock signal and synchronizing signal; Clock signal when therefore each video signal preprocessor is with video output driver signal processing can realize complete synchronous with synchronizing signal; Do not have time-delay, so each picture output device can be realized fully synchronously.
Above content is to combine concrete preferred implementation to the further explain that the present invention did, and can not assert that practical implementation of the present invention is confined to these explanations.For the those of ordinary skill of technical field under the present invention, make some substituting or obvious modification under the prerequisite of the present invention design not breaking away from, and performance or purposes are identical, all should be regarded as belonging to protection scope of the present invention.
Claims (1)
1. a video output signals sync control device comprises a plurality of picture output devices, and each picture output device includes video signal preprocessor (104) and video output driver (105); It is characterized in that: a picture output device in said a plurality of picture output devices also comprises video synchronization signal generator (101) and synchronization signal transmitter (102), and each said picture output device all also comprises synchronous signal receiver (103); The control end of said video synchronization signal generator (101) connects the synchronous locking signal output of outside video signal source (3); The clock signal output terminal of said video synchronization signal generator (101) and synchronous signal output end are connected the clock signal receiving terminal and the synchronizing signal receiving terminal of said synchronization signal transmitter (102) respectively; The signal output part of said synchronization signal transmitter (102) connects the signal receiving end of each said synchronous signal receiver (103) respectively; Said synchronization signal transmitter (102) is used for clock signal with said video synchronization signal generator (101) output and converts transmission signals into synchronizing signal and export each said synchronous signal receiver (103) to, and each said synchronous signal receiver (103) is used for recovering said clock signal of generation and said synchronizing signal from said transmission signals; In each said picture output device; The clock signal output terminal of said synchronous signal receiver (103) connects the clock signal input terminal of said video signal preprocessor (104), synchronous signal output end connect respectively said video signal preprocessor (104) and video output driver (105) synchronous signal input end.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012101880974A CN102694960A (en) | 2012-06-08 | 2012-06-08 | Device for synchronously controlling video output signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012101880974A CN102694960A (en) | 2012-06-08 | 2012-06-08 | Device for synchronously controlling video output signal |
Publications (1)
Publication Number | Publication Date |
---|---|
CN102694960A true CN102694960A (en) | 2012-09-26 |
Family
ID=46860228
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2012101880974A Pending CN102694960A (en) | 2012-06-08 | 2012-06-08 | Device for synchronously controlling video output signal |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102694960A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109862206A (en) * | 2019-02-28 | 2019-06-07 | 深圳市华星光电半导体显示技术有限公司 | Method for transmitting signals |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1384959A (en) * | 2000-08-26 | 2002-12-11 | Rgb系统公司 | Method and apparatus for vertically input and output video signals |
CN1501713A (en) * | 2002-11-12 | 2004-06-02 | 北京中视联数字系统有限公司 | Digital television front end server clock synchronizing method |
CN1993978A (en) * | 2004-07-26 | 2007-07-04 | 三星电子株式会社 | Method of composing video signal, apparatus to compose video signal, display system, display apparatus and control method of display apparatus |
CN101064768A (en) * | 2006-04-29 | 2007-10-31 | 李明 | System and method for playing synchronously dynamic image |
CN101706710A (en) * | 2009-12-17 | 2010-05-12 | 数源科技股份有限公司 | System for controlling synchronous playing of multi-picture signal and control method thereof |
CN102474656A (en) * | 2010-04-09 | 2012-05-23 | 索尼公司 | Signal receiving device and camera system |
-
2012
- 2012-06-08 CN CN2012101880974A patent/CN102694960A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1384959A (en) * | 2000-08-26 | 2002-12-11 | Rgb系统公司 | Method and apparatus for vertically input and output video signals |
CN1501713A (en) * | 2002-11-12 | 2004-06-02 | 北京中视联数字系统有限公司 | Digital television front end server clock synchronizing method |
CN1993978A (en) * | 2004-07-26 | 2007-07-04 | 三星电子株式会社 | Method of composing video signal, apparatus to compose video signal, display system, display apparatus and control method of display apparatus |
CN101064768A (en) * | 2006-04-29 | 2007-10-31 | 李明 | System and method for playing synchronously dynamic image |
CN101706710A (en) * | 2009-12-17 | 2010-05-12 | 数源科技股份有限公司 | System for controlling synchronous playing of multi-picture signal and control method thereof |
CN102474656A (en) * | 2010-04-09 | 2012-05-23 | 索尼公司 | Signal receiving device and camera system |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109862206A (en) * | 2019-02-28 | 2019-06-07 | 深圳市华星光电半导体显示技术有限公司 | Method for transmitting signals |
CN109862206B (en) * | 2019-02-28 | 2020-08-04 | 深圳市华星光电半导体显示技术有限公司 | Signal transmission method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN108134607B (en) | High-speed AD synchronous acquisition circuit and method between boards based on JESD204B | |
TWI521351B (en) | Multi-wire single-ended push-pull link with data symbol transition based clocking | |
JP2013000451A (en) | Electronic endoscope device | |
US11249933B2 (en) | MIPI D-PHY circuit | |
CN103067697B (en) | A kind of method eliminating the VGA signal jitter based on fiber-optic transfer | |
CN202475638U (en) | Converting device of multi-path composite HDMI audio frequency video signal | |
CN102624512B (en) | A kind of method and system realizing clock synchronous | |
CN205179051U (en) | Visible light communication's fast signal restore circuit | |
KR102423645B1 (en) | Apparatus for transmitting and receiving a signal, source driver for receiving a status information signal and display device having the same | |
CN202696738U (en) | Video output signal synchronous control device | |
CN102694960A (en) | Device for synchronously controlling video output signal | |
CN103037222A (en) | Compression transmission device and method of parallel digital video signal | |
CN204578655U (en) | The device of energy augmented video flap output signal ability | |
CN105611113A (en) | Digital video signal synchronization head polarity adaptive method based on FPGA | |
CN104243939A (en) | Temperature control type optical transceiver | |
CN202374368U (en) | Conversion device for serial digital interface (SDI) composite audio and video signal | |
CN102006443B (en) | Port switching and signal processing method and circuit | |
CN202652394U (en) | Data conversion device | |
CN103686170A (en) | Short-distance multi-channel video transmission method and device | |
CN201892937U (en) | Keyboard, video, mouse (KVM) plus audio transmission device based on field programmable gate array (FPGA) | |
CN202979199U (en) | Vehicle-mounted equipment for transmitting digital audio/video signals through twisted pair | |
CN201869304U (en) | Port switching and signal processing circuit | |
CN101860712B (en) | Device and method for transmitting camera signals | |
CN203708231U (en) | Clock data recovery circuit | |
CN201887897U (en) | Circuit for synchronous switching of two-way video signal |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C12 | Rejection of a patent application after its publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20120926 |