CN102693913A - Method for manufacturing semiconductor device chip with resistor - Google Patents

Method for manufacturing semiconductor device chip with resistor Download PDF

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Publication number
CN102693913A
CN102693913A CN2011100721552A CN201110072155A CN102693913A CN 102693913 A CN102693913 A CN 102693913A CN 2011100721552 A CN2011100721552 A CN 2011100721552A CN 201110072155 A CN201110072155 A CN 201110072155A CN 102693913 A CN102693913 A CN 102693913A
Authority
CN
China
Prior art keywords
semiconductor device
device chip
coating machine
titanium
corrosion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2011100721552A
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Chinese (zh)
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CN102693913B (en
Inventor
伍林
潘建英
左亚兵
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YIXING HUANZHOU MICRO-ELECTRONICS Co Ltd
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YIXING HUANZHOU MICRO-ELECTRONICS Co Ltd
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Application filed by YIXING HUANZHOU MICRO-ELECTRONICS Co Ltd filed Critical YIXING HUANZHOU MICRO-ELECTRONICS Co Ltd
Priority to CN201110072155.2A priority Critical patent/CN102693913B/en
Publication of CN102693913A publication Critical patent/CN102693913A/en
Application granted granted Critical
Publication of CN102693913B publication Critical patent/CN102693913B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The invention relates to a method for manufacturing a chip with a resistor between electrodes. The method comprises: placing a semiconductor device chip into a film plating machine to carry out titanium layer evaporation; carrying out photoetching corrosion on the titanium layer; carrying out aluminium plating on the titanium layer and placing the processed semiconductor device chip into the film plating machine; and carrying out photoetching corrosion. According to the invention, a titanium-plated metal layer is employed, thereby substantially improving the highest temperature of a semiconductor silicon-controlled PN junction.

Description

A kind of manufacturing approach of strip resistance semiconductor device chip
Technical field
The present invention relates to a kind of manufacturing method of chip, be specifically related to the manufacturing approach of strip resistance chip between electrode.
Background technology
At present; Semiconductor controllable silicon PN junction maximum temperature is 110 ℃ at home, but along with science and technology development, the application of this temperature in some key areas becomes a kind of restriction; For ability expanding application field, improving PN junction can be urgent problem with maximum temperature.
Summary of the invention
Goal of the invention: the objective of the invention is provides a kind of manufacturing approach of strip resistance semiconductor device chip of higher junction temperature in order to overcome deficiency of the prior art.
Technical scheme: the manufacturing approach of strip resistance semiconductor device chip of the present invention, at first put into coating machine to semiconductor device chip and steam titanium layer, the coating machine parameter is set is: steam titanium power 0.1-0.6kw, time 3-10min, coating chamber vacuum degree 3 * 10 -3Below the Pa; Then said titanium layer is carried out photoetching corrosion, 43 ± 2 ℃ of corrosion temperatures, the corrosive liquid proportioning is a hydrofluoric acid: deionized water: ammonium fluoride=3ml: 10ml: 6g, wherein the component deviation is ± 10%, etching time 10-30sec; Then on said titanium layer, aluminize, put into coating machine to semiconductor device chip, the coating machine parameter is set is: power 0.6-2kw, time 10-30min, coating chamber vacuum degree 6 * 10 -3Below the Pa; Carry out photoetching corrosion at last once more, 85 ± 2 ℃ of corrosion temperatures, the corrosive liquid proportioning is that phosphoric acid adds an amount of absolute ethyl alcohol; It is fixed that phosphoric acid comes according to each corrosion of silicon quantity; The purpose that adds absolute ethyl alcohol is to reduce the steam bubble that corrosion produces, and does not influence corrosion, etching time 5-20min.
The thickness of said layer of titanium metal is confirmed according to the size of required resistance value, generally at the 100-1000 dust.
Said semiconductor device chip is a silicon.
Beneficial effect: the present invention compared with prior art, its remarkable advantage is: adopt the titanizing metal level, improved the maximum temperature of semiconductor controllable silicon PN junction greatly.
Specific embodiment
Embodiment one: the manufacturing approach of strip resistance semiconductor device chip, and at first put into coating machine to semiconductor device chip and steam titanium layer, the coating machine parameter is set is: steam titanium power 0.3kw, time 5min, coating chamber vacuum degree 2.5 * 10 -3Pa; Then said titanium layer is carried out photoetching corrosion, 43 ℃ of corrosion temperatures, etching time 15sec; Then on said titanium layer, aluminize, put into coating machine to semiconductor device chip, the coating machine parameter is set is: power 1kw, time 15min, coating chamber vacuum degree 4.5 * 10 -3Pa; Carry out photoetching corrosion at last once more, 85 ℃ of corrosion temperatures, the corrosive liquid proportioning is that phosphoric acid adds an amount of absolute ethyl alcohol, etching time is 10min.The present invention adopts the titanizing metal level, and the maximum temperature of semiconductor controllable silicon PN junction is brought up to more than 140 ℃.
Embodiment two: the manufacturing approach of strip resistance semiconductor device chip, and at first put into coating machine to semiconductor device chip and steam titanium layer, the coating machine parameter is set is: steam titanium power 0.5kw, time 8min, coating chamber vacuum degree 2.8 * 10 -3Pa; Then said titanium layer is carried out photoetching corrosion, 44 ℃ of corrosion temperatures, etching time 22sec; Then on said titanium layer, aluminize, put into coating machine to semiconductor device chip, the coating machine parameter is set is: power 3kw, time 25min, coating chamber vacuum degree 4.8 * 10 -3Pa; Carry out photoetching corrosion at last once more, 86 ℃ of corrosion temperatures, the corrosive liquid proportioning is that phosphoric acid adds an amount of absolute ethyl alcohol, etching time is 15min.The present invention adopts the titanizing metal level, and the maximum temperature of semiconductor controllable silicon PN junction is brought up to more than 140 ℃.

Claims (3)

1. the manufacturing approach of a strip resistance semiconductor device chip is characterized in that:
(1) at first puts into coating machine to semiconductor device chip and steam titanium layer, the coating machine parameter is set is: steam titanium power 0.1-0.6kw, time 3-10min, coating chamber vacuum degree 3 * 10 -3Below the Pa;
(2) then said titanium layer is carried out photoetching corrosion, 43 ± 2 ℃ of corrosion temperatures, the corrosive liquid proportioning is a hydrofluoric acid: deionized water: ammonium fluoride=3ml: 10ml: 6g, wherein the component deviation is ± 10%, etching time 10-30sec;
(3) then on said titanium layer, aluminize, put into coating machine to semiconductor device chip, the coating machine parameter is set is: power 0.6-2kw, time 10-30min, coating chamber vacuum degree 6 * 10 -3Below the Pa;
(4) carry out photoetching corrosion at last once more, 85 ± 2 ℃ of corrosion temperatures, the corrosive liquid proportioning is that phosphoric acid adds an amount of absolute ethyl alcohol, etching time 5-20min.
2. the manufacturing approach of strip resistance semiconductor device chip according to claim 1 is characterized in that: the thickness of said layer of titanium metal is confirmed according to the size of required resistance value, generally at the 100-1000 dust.
3. the manufacturing approach of strip resistance semiconductor device chip according to claim 1 is characterized in that: said semiconductor device chip is a silicon.
CN201110072155.2A 2011-03-24 2011-03-24 A kind of manufacture method of strip resistance semiconductor device chip Expired - Fee Related CN102693913B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110072155.2A CN102693913B (en) 2011-03-24 2011-03-24 A kind of manufacture method of strip resistance semiconductor device chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110072155.2A CN102693913B (en) 2011-03-24 2011-03-24 A kind of manufacture method of strip resistance semiconductor device chip

Publications (2)

Publication Number Publication Date
CN102693913A true CN102693913A (en) 2012-09-26
CN102693913B CN102693913B (en) 2015-09-09

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CN201110072155.2A Expired - Fee Related CN102693913B (en) 2011-03-24 2011-03-24 A kind of manufacture method of strip resistance semiconductor device chip

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0897406A (en) * 1994-09-26 1996-04-12 Meidensha Corp Gate turn-off thyristor and semiconductor element
JP2003273346A (en) * 2002-03-19 2003-09-26 Matsushita Electric Ind Co Ltd Chip type semiconductor element and method for manufacturing the same
CN101587507A (en) * 2009-06-25 2009-11-25 中国电力科学研究院 Method for setting high-pressure high-power thyristor electrothermic model

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0897406A (en) * 1994-09-26 1996-04-12 Meidensha Corp Gate turn-off thyristor and semiconductor element
JP2003273346A (en) * 2002-03-19 2003-09-26 Matsushita Electric Ind Co Ltd Chip type semiconductor element and method for manufacturing the same
CN101587507A (en) * 2009-06-25 2009-11-25 中国电力科学研究院 Method for setting high-pressure high-power thyristor electrothermic model

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
傅义珠等: "双层金属电极对硅功率晶体管结温的改善", 《固体电子学研究与进展》 *

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