CN102692682B - Grating coupler and manufacturing method thereof - Google Patents
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- CN102692682B CN102692682B CN 201210193178 CN201210193178A CN102692682B CN 102692682 B CN102692682 B CN 102692682B CN 201210193178 CN201210193178 CN 201210193178 CN 201210193178 A CN201210193178 A CN 201210193178A CN 102692682 B CN102692682 B CN 102692682B
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Abstract
The invention provides a grating coupler and a manufacturing method thereof. The manufacturing method comprises the following steps of: providing an SOI (Silicon On Insulator) substrate and etching top-layer silicon of the SOI substrate to form a coupling grating with the period of 500-800 nm; meanwhile, separating a CMOS (Complementary Metal-Oxide-Semiconductor Transistor) active region in the top-layer silicon; manufacturing a grating oxidizing layer covering the coupling grating and the CMOS active region on the coupling grating; forming a conductive layer on the surface of the grating oxidizing layer and etching the conductive layer to form a coating structure which has the same period as the coupling grating; meanwhile, forming a gate structure of a CMOS; and finally, forming a protection layer to finish the preparation. The preparations of the coupling grating, the grating oxidizing layer, the coating structure and the CMOS can be simultaneously finished and a mask can be shared, so that the manufacturing cost is reduced; the coupling efficiency is improved by an upper conductive coating covering the grating oxidizing layer; the coupling efficiency of the grating coupler is obviously improved by optimized structure parameters; and the dependency of the coupling efficiency on the thickness of an SOI buried oxide layer is greatly reduced by a novel grating coupler structure, so that the specification requirements on the SOI substrate are reduced.
Description
Technical field
The invention belongs to semiconductor applications and photoelectricity integration field, particularly relate to a kind of grating coupler and preparation method thereof.
Background technology
Integrated silicon-based optical system because its little device size, and with traditional integrated circuit CMOS technology favorable compatibility, become a focus of present research.Many micro-nano devices are integrated in silica-based realization, as laser instrument, modulator, wave filter, coupling mechanism, buffer etc.And grating be used for to be realized the coupling mechanism function, has that coupling area is little, the coupling efficiency advantages of higher, thereby extensively is used in the planar optical system.
Si and SiO
2Height refraction poor (about 2.0) provide possibility for the integrated optical wave guide device of realizing nano optical wave guide and extra small yardstick, interconnect at optical communication, light, the light sensory field has great application prospect.Yet because there is huge mode mismatch in extra small sectional dimension between nano optical wave guide and the external world (as optical fiber), cause coupling loss huge between nanometer waveguide and the optical fiber.Grating coupler can effectively address this problem as the coupled apparatus between nanometer waveguide and the optical fiber.In the development of grating coupler, how further improving coupling efficiency and reducing the technology cost is an important research content.In scheme in the past, grating coupler is realized by dedicated mask and processing step, has increased the cost of manufacture of device so greatly, is unfavorable for producing.And generally be made in grating coupler on the SOI substrate, to having relatively high expectations of the thickness and precision of SOI oxygen buried layer, be unfavorable for the reduction of cost equally.
Therefore, how to obtain a kind of high coupling efficiency, low technology cost and the grating coupler that can be integrally formed in the CMOS manufacture craft is the emphasis of current exploitation.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of grating coupler and preparation method thereof, be used for to solve that grating coupler coupling efficiency of the prior art is difficult to improve, general grating coupler is unfavorable for being integrated in CMOS technology and strict and cause the cost of manufacture problem of higher to the oxygen buried layer thickness requirement of SOI.
Reach other relevant purposes for achieving the above object, the invention provides a kind of method for making of grating coupler, described method for making comprises step at least: 1) a SOI substrate is provided, at the bottom of described SOI substrate comprises backing, oxygen buried layer and top layer silicon, the described top layer silicon of etching is to described oxygen buried layer, and formation has a plurality of spaced silico briquette structures and the cycle is the coupling grating of 500 ~ 800nm; 2) on described coupling grating, make and be covered in described coupling grating and thickness is the gate oxide of 1 ~ 10nm; 3) forming thickness in described gate oxide surface is the conductive layer of 100 ~ 300nm, the described conductive layer of etching, and formation has the vertical corresponding conduction block structured coat structure of a plurality of and described silico briquette structure; 4) surface of resulting structures forms protective seam after step 3) is finished.
As a preferred version of the method for making of grating coupler of the present invention, in the described step 1), in described top layer silicon, be separated out the CMOS active area that at least one both sides has shallow trench isolation channels when forming described coupling grating; Described step 2) in, forms gate oxide in described CMOS surfaces of active regions simultaneously; In the described step 3), on surperficial and corresponding with the described CMOS active area zone of described gate oxide, form grid structure simultaneously.
In the method for making of grating coupler of the present invention, the width of described silico briquette structure and the ratio in the cycle of described coupling grating are 0.7 ~ 0.99: 1.
In the method for making of grating coupler of the present invention, the cycle of described coat structure is 500 ~ 800nm, and described conduction block structured width is 50 ~ 350nm.
In the method for making of grating coupler of the present invention, the material of described conductive layer is polysilicon, amorphous silicon or metallic conductor.
The present invention also provides a kind of grating coupler, and described grating coupler comprises at least: the SOI substrate, comprise backing at the bottom of, the top layer silicon that is incorporated into the oxygen buried layer of described backing basal surface and is incorporated into described oxygen buried layer surface; Coupling grating is formed at described top layer silicon, comprises a plurality of spaced silico briquette structures, and the cycle of described coupling grating is 500 ~ 800nm; Gate oxide is covered on the described coupling grating, and thickness is 1 ~ 10nm; Coat structure is formed at described gate oxide surface, comprise the vertical corresponding conducting block structure of a plurality of and described silico briquette structure, and the thickness of described coat structure is 100 ~ 300nm.
Further, described grating coupler also comprises the protective seam that is covered in described gate oxide, coat structure, CMOS gate oxide and CMOS grid structure surface.
In grating coupler of the present invention, the width of described silico briquette structure and the ratio in the cycle of described coupling grating are 0.7 ~ 0.99: 1.
In grating coupler of the present invention, the cycle of described coat structure is 500 ~ 800nm, and described conduction block structured width is 50 ~ 350nm.
In grating coupler of the present invention, the material of described coat structure is polysilicon, amorphous silicon or metallic conductor.
As mentioned above, grating coupler of the present invention and preparation method thereof has following beneficial effect: a SOI substrate is provided, and the top layer silicon of the described SOI substrate of etching is to oxygen buried layer, the formation cycle is the coupling grating of 500 ~ 800nm, is separated out the CMOS active area simultaneously in described top layer silicon; On described coupling grating, make the gate oxide that is covered in described coupling grating, form gate oxide in described CMOS surfaces of active regions simultaneously; Form conductive layer in described gate oxide surface, the described conductive layer of etching forms the coat structure identical with the described coupling grating cycle, forms grid structure simultaneously on surperficial and corresponding with the described CMOS active area zone of described gate oxide; Form protective seam to finish preparation in the surface of above-mentioned resulting structures.The etching depth that is made in the coupling grating in the SOI substrate top layer silicon is identical with top layer silicon thickness, shares mask and make simultaneously forming with the CMOS active area, has reduced cost of manufacture; The conduction superstratum that is covered on the gate oxide has improved coupling efficiency, shares mask and make simultaneously forming with the CMOS grid, has reduced cost of manufacture; The structural parameters of optimizing make the coupling efficiency of grating coupler significantly improve; Novel grating coupler structure makes coupling efficiency greatly reduce the dependence of SOI oxygen buried layer thickness, thereby has loosened the specification requirement to the SOI substrate.
Description of drawings
Fig. 1 ~ Fig. 2 is shown as the structural representation that the method for making step 1) of grating coupler in the embodiment of the invention 1 presents.
Fig. 3 is shown as the method for making step 2 of grating coupler in the embodiment of the invention 1) structural representation that presents.
Fig. 4 is shown as the structural representation that the method for making step 3) of grating coupler in the embodiment of the invention 1 presents.
Fig. 5 is shown as the structural representation that the method for making step 4) of grating coupler in the embodiment of the invention 1 presents.
Fig. 6 ~ Fig. 7 is shown as the structural representation that the method for making step 1) of grating coupler in the embodiment of the invention 2 presents.
Fig. 8 is shown as the method for making step 2 of grating coupler in the embodiment of the invention 2) structural representation that presents.
Fig. 9 is shown as the structural representation that the method for making step 3) of grating coupler in the embodiment of the invention 2 presents.
Figure 10 is shown as the structural representation that the method for making step 4) of grating coupler in the embodiment of the invention 2 presents.
Figure 11 is shown as grating coupler of the present invention at the efficient synoptic diagram of different grating coupling grating reflectivity, transmissivity and outside diffraction light under the cycle.
Figure 12 be shown as grating coupler of the present invention under preferred cycle the polysilicon block structured height in coupling grating diffraction direction and the coat structure, width concern synoptic diagram.
Figure 13 is shown as grating coupler of the present invention and concerns synoptic diagram between coupling efficiency between coupling grating and the optical fiber and the wavelength under optimum condition.
Figure 14 is shown as grating coupler of the present invention and concerns synoptic diagram between the optical coupling efficiency of the light of 1550nm wavelength and oxygen buried layer thickness.
The grating coupler that Figure 15 is shown as prior art concerns synoptic diagram between the optical coupling efficiency of the light of 1550nm wavelength and oxygen buried layer thickness.
The element numbers explanation
At the bottom of 101 backings
102 oxygen buried layers
103 top layer silicon
104 coupling gratings
105 gate oxides
106 coat structures
107 protective seams
108 CMOS active areas
109 shallow trench isolation channels
110 grid structures
Embodiment
Below by specific instantiation explanation embodiments of the present invention, those skilled in the art can understand other advantages of the present invention and effect easily by the disclosed content of this instructions.The present invention can also be implemented or be used by other different embodiment, and the every details in this instructions also can be based on different viewpoints and application, carries out various modifications or change under the spirit of the present invention not deviating from.
See also Fig. 1 to Figure 15.Need to prove, the diagram that provides in the present embodiment only illustrates basic conception of the present invention in a schematic way, satisfy only show in graphic with the present invention in relevant assembly but not component count, shape and size drafting when implementing according to reality, kenel, quantity and the ratio of each assembly can be a kind of random change during its actual enforcement, and its assembly layout kenel also may be more complicated.
Embodiment 1
Shown in Fig. 1 ~ 5, present embodiment provides a kind of method for making of grating coupler, and described method for making comprises step at least:
Shown in Fig. 1 ~ 2, at first carry out step 1), one SOI substrate is provided, described SOI substrate comprises at the bottom of the backing 101, oxygen buried layer 102 and top layer silicon 103, the described top layer silicon 103 of etching is to described oxygen buried layer 102, and formation has a plurality of spaced silico briquette structures and the cycle is the coupling grating 104 of 500 ~ 800nm.
The ratio in the cycle of the width of described silico briquette structure and described coupling grating 104 is 0.7 ~ 0.99: 1.In the present embodiment, the ratio in the cycle of the width of described silico briquette structure and described coupling grating 104 is 0.9: 1, and namely the fill factor, curve factor of coupling grating 104 is 0.9.Particularly, if when 104 cycles of coupling grating are chosen as 700nm, shown in the width of silico briquette structure be 630nm, the distance between each silico briquette structure is 70nm.The thickness of described oxygen buried layer 102 is 1 ~ 5 μ m.In the present embodiment, the thickness of described oxygen buried layer 102 can be 1.4 μ m, 1.9 μ m, 2.5 μ m, 3 μ m, 3.6 μ m etc., certainly, also can select oxygen buried layer 102 thickness greater than all expections of 5 μ m.
As shown in Figure 3, carry out step 2 then), on described coupling grating 104, make being covered in described coupling grating 104 and thickness is the gate oxide 105 of 1～10nm.
In the present embodiment, adopt thermal oxidation technology on described coupling grating 104, to make to be covered in described coupling grating 104 and thickness is the gate oxide 105 of 1～10nm.
As shown in Figure 4, then carry out step 3), forming thickness in described gate oxide 105 surfaces is the conductive layer of 100 ~ 300nm, the described conductive layer of etching, and formation has the vertical corresponding conduction block structured coat structure 106 of a plurality of and described silico briquette structure.
In the present embodiment, adopt chemical vapour deposition technique to form conductive layer in described gate oxide 105 surfaces, the material of described conductive layer is polysilicon, amorphous silicon or metallic conductor, is polycrystalline silicon material in the present embodiment.Certainly, in other embodiments, also can form insulating material such as silicon nitride in described gate oxide 105 surfaces.The cycle of described coat structure 106 is 500 ~ 800nm, and described conduction block structured width is 50 ~ 350nm.In the present embodiment, the cycle of described coat structure 106 is identical with the cycle of described coupling grating 104.
As shown in Figure 5, carry out step 4) at last, the surface of resulting structures forms protective seam 107 after step 3) is finished.
In the present embodiment, adopt the surface of chemical vapour deposition technique resulting structures after step 3) is finished to form protective seam 107, in the present embodiment; described protective seam 107 is silicon dioxide layer; certainly, in other embodiments, described protective seam 107 also can be other oxides such as silicon nitride.
See also Fig. 5, as shown in the figure, present embodiment also provides a kind of grating coupler, and described grating coupler comprises at least:
The SOI substrate comprises at the bottom of the backing 101, is incorporated into the oxygen buried layer 102 on 101 surfaces at the bottom of the described backing and the top layer silicon 103 that is incorporated into described oxygen buried layer 102 surfaces;
The cycle of described coat structure 106 is 500 ~ 800nm, and described conduction block structured width is 50 ~ 350nm, and in the present embodiment, the cycle of described coat structure 106 is identical with the cycle of described coupling grating 104.
The material of described coat structure 106 is polysilicon, amorphous silicon or metallic conductor, is polycrystalline silicon material in the present embodiment.
In the present embodiment, described grating coupler surface also has protective seam 107, and described protective seam 107 is silicon dioxide layer, and certainly, in other embodiments, described protective seam 107 also can be other oxides such as silicon nitride.
Embodiment 2
See also Fig. 6 ~ Figure 10, as shown in the figure, present embodiment provides a kind of method for making of grating coupler, and shown in Fig. 1 ~ 5, present embodiment provides a kind of method for making of grating coupler, and described method for making comprises step at least:
Shown in Fig. 6 ~ 7, at first carry out step 1), one SOI substrate is provided, described SOI substrate comprises at the bottom of the backing 101, oxygen buried layer 102 and top layer silicon 103, the described top layer silicon 103 of etching is to described oxygen buried layer 102, formation has a plurality of spaced silico briquette structures and the cycle is the coupling grating 104 of 500 ~ 800nm, and is separated out the CMOS active area 108 that at least one both sides has shallow trench isolation channels 109 simultaneously in described top layer silicon 103.
In the present embodiment, in same mask version, produce and comprise the figure that etches described coupling grating 104 and one or more CMOS active areas 108, can on described top layer silicon 103, form described coupling grating 104 and CMOS active area 108 simultaneously through an etching, reduce the technology cost greatly.The ratio in the cycle of the width of described silico briquette structure and described coupling grating 104 is 0.9: 1, and namely the fill factor, curve factor of coupling grating 104 is 0.9.Specifically, if when 104 cycles of coupling grating are chosen as 700nm, shown in the width of silico briquette structure be 630nm, the distance between each silico briquette structure is 70nm.The thickness of described oxygen buried layer 102 is 1 ~ 5 μ m.In the present embodiment, the thickness of described oxygen buried layer 102 is 1.4 μ m, 1.9 μ m, 2.5 μ m, 3 μ m, 3.6 μ m etc., certainly, also can select oxygen buried layer 102 thickness greater than all expections of 5 μ m.
As shown in Figure 3, carry out step 2 then), on described coupling grating 104, make being covered in described coupling grating 104 and thickness is the gate oxide 105 of 1 ~ 10nm, and form gate oxides 105 in described CMOS active area 108 surfaces simultaneously.
In the present embodiment, only need to form gate oxide 105 simultaneously in described coupling grating 104 and CMOS active area 108 surfaces by once oxidation technology.The thickness of described gate oxide 105 is 1 ~ 10nm.
As shown in Figure 4, then carry out step 3), forming thickness in described gate oxide 105 surfaces is the conductive layer of 100 ~ 300nm, the described conductive layer of etching, formation has the vertical corresponding conduction block structured coat structure 106 of a plurality of and described silico briquette structure, and simultaneously forms grid structure 110 on described gate oxide 105 surfaces and the zone corresponding with described CMOS active area 108.
In the present embodiment, adopt gate oxide 105 surfaces of chemical vapour deposition technique on described coupling grating 104 and CMOS active area 108 depositing conducting layer simultaneously, the material of described conductive layer is polysilicon, amorphous silicon or metallic conductor.Then by preparation one deck mask version, in described conductive layer, etch the coat structure 106 corresponding with described coupling grating 104 simultaneously, and the grid structure 110 corresponding with described CMOS active area 108.The cycle of described coat structure 106 is 500 ~ 800nm, and described conduction block structured width is 50 ~ 350nm.In the present embodiment, the cycle of described coat structure 106 is identical with the cycle of described coupling grating 104.
After having prepared described grid structure 110, described CMOS active area 108 is carried out ion inject, form source region and the drain region of CMOS, prepare source electrode and drain electrode then to finish the preparation of described CMOS.
As shown in Figure 5, carry out step 4) at last, the surface of resulting structures forms protective seam 107 after step 3) is finished.
In the present embodiment, adopt the surface of chemical vapour deposition technique resulting structures after step 3) is finished to form protective seam 107, in the present embodiment; described protective seam 107 is silicon dioxide layer; certainly, in other embodiments, described protective seam 107 also can be other oxides such as silicon nitride.
For design idea and the beneficial effect that further specifies grating coupler of the present invention and preparation method thereof, see also Figure 11 ~ Figure 15, when the inventor designs this device architecture, employing is based on the full vector emulation tool of two dimension of eigenmode extended method, by following research and analysis, the preferable range of key parameter in the device has been proposed:
At first calculated the efficient at different grating coupling grating reflectivity, transmissivity and outside diffraction light under the cycle, as shown in figure 11, wherein the fill factor, curve factor of coupling grating is fixed as 0.9 in this embodiment, but should not be limited to 0.9.Outwards diffraction light, reflected light, transmitted light three addition equal to import the general power of light.Can see the light to the 1550nm wavelength from result of calculation, along with the grating cycle increases gradually, reflected light reduces gradually, and outwards the efficient of diffraction light increases gradually, reaches maximum when the cycle is 0.68 ~ 0.70 μ m, near 90%.For different fill factor, curve factors, all there is optimization cycle, make reflection, transmitted light proportion less, and the outside ratio maximum of diffraction light.This cycle is the preferred cycle under this fill factor, curve factor.
The height of coupling grating diffraction direction and conducting block structure under this preferred cycle (in the design, being polysilicon), the relation of width have been calculated then, as shown in figure 12.Coupling grating is divided into two parts to the light of external diffraction, and part diffraction downwards enters in the oxygen buried layer of SOI substrate, and another diffraction that partly makes progress enters in the silicon dioxide layer of protection, and the part that diffraction direction is defined as the diffraction that makes progress accounts for total outwards ratio of diffraction light.Because optical fiber places silicon dioxide layer of protection top usually, be to improve coupling efficiency, need to strengthen the make progress part of diffraction of light, namely improve the directivity of optical diffraction.As seen from Figure 12, in preferred polysilicon width and altitude range, the directivity of optical grating diffraction is up to 94%.
Then calculated in the coupling efficiency between coupling grating and the optical fiber and the relation between the wavelength under the above optimum condition, i.e. spectral response, as shown in figure 13.This grating coupler under optimum condition in the 1550-1560nm wavelength coverage coupling efficiency reach 67%.
The inventor studies also and to find, except the above-mentioned parameter of grating, the thickness of oxygen buried layer also can influence the upwards diffraction efficiency of light because of the interference of light effect, and and then influences optical coupling efficiency.The optical coupling efficiency of light of 1550nm wavelength and the relation between the oxygen buried layer thickness have been calculated, as shown in figure 14.The result shows that coupling efficiency is changed to 68% with the variation of oxygen buried layer thickness from 55%.When oxygen buried layer thickness was 1.4 μ m, 1.9 μ m, 2.5 μ m, 3 μ m etc., it is maximum that coupling efficiency reaches.And for the traditional grating coupler of not introducing the polysilicon superstratum, its coupling efficiency wants much violent with the variation of oxygen buried layer thickness, from 20% to 50%, as shown in figure 15.This explanation, this new device architecture can greatly loosen the requirement to the SOI substrate specifications, provides bigger degree of freedom thereby choose for starting material.
In sum, grating coupler of the present invention and preparation method thereof at first provides a SOI substrate, and the top layer silicon of the described SOI substrate of etching is to oxygen buried layer, and the formation cycle is the coupling grating of 500 ~ 800nm, can be separated out the CMOS active area simultaneously in described top layer silicon; On described coupling grating, make the gate oxide that is covered in described coupling grating, can form gate oxide in described CMOS surfaces of active regions simultaneously; Form conductive layer in described gate oxide surface, the described conductive layer of etching forms the coat structure identical with the described coupling grating cycle, can form grid structure simultaneously on surperficial and corresponding with the described CMOS active area zone of described gate oxide; Form protective seam to finish preparation in the surface of above-mentioned resulting structures.The etching depth that is made in the coupling grating in the SOI substrate top layer silicon is identical with top layer silicon thickness, shares mask and make simultaneously forming with the CMOS active area, has reduced cost of manufacture; The polysilicon superstratum that is covered on the gate oxide has improved coupling efficiency, shares mask and make simultaneously forming with the CMOS grid, has reduced cost of manufacture; The structural parameters of optimizing make the coupling efficiency of grating coupler significantly improve; Novel grating coupler structure makes coupling efficiency greatly reduce the dependence of SOI oxygen buried layer thickness, thereby has loosened the specification requirement to the SOI substrate.So the present invention has effectively overcome various shortcoming of the prior art and the tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not is used for restriction the present invention.Any person skilled in the art scholar all can be under spirit of the present invention and category, and above-described embodiment is modified or changed.Therefore, have in the technical field under such as and know that usually the knowledgeable modifies or changes not breaking away from all equivalences of finishing under disclosed spirit and the technological thought, must be contained by claim of the present invention.
Claims (8)
1. the method for making of a grating coupler is characterized in that, described method for making comprises step at least:
1) provide a SOI substrate, at the bottom of described SOI substrate comprises backing, oxygen buried layer and top layer silicon, the described top layer silicon of etching is to described oxygen buried layer, forms to have a plurality of spaced silico briquette structures and the cycle is the coupling grating of 500～800nm; The ratio in the width of described silico briquette structure and the cycle of described coupling grating is 0.7～0.99: 1;
2) on described coupling grating, make and be covered in described coupling grating and thickness is the gate oxide of 1～10nm;
3) forming thickness in described gate oxide surface is the conductive layer of 100～300nm, the described conductive layer of etching, and formation has the vertical corresponding conduction block structured coat structure of a plurality of and described silico briquette structure;
4) surface of resulting structures forms protective seam after step 3) is finished.
2. the method for making of grating coupler according to claim 1 is characterized in that: in the described step 1), can be separated out the CMOS active area that at least one both sides has shallow trench isolation channels when forming described coupling grating in described top layer silicon; Described step 2) in, can form gate oxide in described CMOS surfaces of active regions simultaneously; In the described step 3), can on surperficial and corresponding with the described CMOS active area zone of described gate oxide, form grid structure simultaneously.
3. according to the method for making of any described grating coupler of claim 1～2, it is characterized in that: the cycle of described coat structure is 500～800nm, and described conduction block structured width is 50～350nm.
4. according to the method for making of any described grating coupler of claim 1～2, it is characterized in that: the material of described conductive layer is polysilicon, amorphous silicon or metallic conductor.
5. a grating coupler is characterized in that, described grating coupler comprises at least:
The SOI substrate, comprise backing at the bottom of, the top layer silicon that is incorporated into the oxygen buried layer of described backing basal surface and is incorporated into described oxygen buried layer surface;
Coupling grating is formed at described top layer silicon, comprises a plurality of spaced silico briquette structures, and the cycle of described coupling grating is 500～800nm; The ratio in the width of described silico briquette structure and the cycle of described coupling grating is 0.7～0.99: 1;
Gate oxide is covered on the described coupling grating, and thickness is 1～10nm;
Coat structure is formed at described gate oxide surface, comprise the vertical corresponding conducting block structure of a plurality of and described silico briquette structure, and the thickness of described coat structure is 100～300nm.
6. grating coupler according to claim 5, it is characterized in that: described grating coupler also comprises the protective seam that is covered in described gate oxide and coat structure surface.
7. grating coupler according to claim 5, it is characterized in that: the cycle of described coat structure is 500～800nm, described conduction block structured width is 50～350nm.
8. grating coupler according to claim 5, it is characterized in that: the material of described coat structure is polysilicon, amorphous silicon or metallic conductor.
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| CN106501898A (en) * | 2017-01-10 | 2017-03-15 | 中国石油大学(华东) | Metal nanoparticle-insulation composite material grating coupler |
| CN107315223B (en) * | 2017-07-14 | 2019-11-15 | 上海交通大学 | Collect the optical interconnection device of Polarization filter and interlayer equalization coupler |
| CN109541744B (en) * | 2017-09-22 | 2020-08-25 | 北京万集科技股份有限公司 | Silicon-based optical antenna based on reflecting layer and preparation method |
| TWI768794B (en) * | 2020-03-31 | 2022-06-21 | 台灣積體電路製造股份有限公司 | Optical device and method for fabricating the same |
| CN112230339A (en) * | 2020-10-23 | 2021-01-15 | 联合微电子中心有限责任公司 | Grating coupler and preparation method thereof |
| CN117222926A (en) * | 2021-02-24 | 2023-12-12 | 香港中文大学 | Blazed waveguide grating coupler with high coupling efficiency |
| CN115016059B (en) * | 2022-08-09 | 2022-11-08 | 上海羲禾科技有限公司 | Wavelength division multiplexing device, wavelength division demultiplexing device and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101556356B (en) * | 2009-04-17 | 2011-10-19 | 北京大学 | Grating coupler and application thereof in polarization and wave length beam splitting |
| US20110158582A1 (en) * | 2009-12-30 | 2011-06-30 | Tzung-I Su | Structure of a semiconductor device having a waveguide and method of forming the same |
| CN101833138B (en) * | 2010-04-30 | 2012-01-25 | 华中科技大学 | Method for manufacturing polarization-independent grating coupler |
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| US5998289A (en) * | 1997-06-25 | 1999-12-07 | France Telecom | Process for obtaining a transistor having a silicon-germanium gate |
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