CN102683524A - Inversed LED (Light Emitting Diode) chip structure and preparation method of inversed LED chip - Google Patents
Inversed LED (Light Emitting Diode) chip structure and preparation method of inversed LED chip Download PDFInfo
- Publication number
- CN102683524A CN102683524A CN2012101721022A CN201210172102A CN102683524A CN 102683524 A CN102683524 A CN 102683524A CN 2012101721022 A CN2012101721022 A CN 2012101721022A CN 201210172102 A CN201210172102 A CN 201210172102A CN 102683524 A CN102683524 A CN 102683524A
- Authority
- CN
- China
- Prior art keywords
- layer
- substrate
- metal intermediate
- intermediate layer
- gallium nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The invention provides an inversed LED (Light Emitting Diode) chip structure which comprises a silicon alloy substrate, a metal middle layer, a P-type gallium nitride semiconductor layer, an active layer and a N-type gallium nitride semiconductor layer sequentially stacked from bottom to top. According to the inversed LED chip structure, a transfer substrate made of silicon alloy which is approximate to a growth substrate in thermal expansion coefficient is adopted as the substrate of the LED chip to reduce the staggered damage of lattices of an LED chip apparatus layer, therefore, the leakage current is reduced, and the performance of product is improved. The invention further provides a preparation method of the inversed LED chip structure.
Description
Technical field
The present invention relates to flip LED chips structure and preparation method thereof, belong to technical field of manufacturing semiconductors.
Background technology
Along with the frequent generation of global extreme climate, lighting field is also just getting into once big change.LED is just shown great attention to by everybody as the solid-state illumination technology of the third generation; But along with the development of technology, ripe existing technology is being faced with great challenge.At present ripe is with the gallium nitride layer growth on sapphire dielectric substrate, so positive and negative electrode is made in the same side, light shines environment from P surface gallium nitride layer; Electric current can be crossed the n type gallium nitride layer by cross-current in this structure, causes current crowding, and heating is caused in the part, has reduced electro-optical efficiency; The poor thermal conductivity (35W/mK) of Sapphire Substrate directly causes reduce the useful life of chip simultaneously.
At present for overcoming the above problems, employing material that this insulation of Sapphire Substrate and thermal conductivity is bad removes from epitaxial loayer after the epitaxial growth complete lattice; The electrode making is carried out on N face GaN surface after removing again.The underlay substrate that need another conductive and heat-conductive is good before the removal Sapphire Substrate and the extension aspect of epitaxial wafer are bonding; Utilize the light emitting diode (LED) chip with vertical structure that obtains with the chip binding technology at the bottom of the peeling liner to have the long-life; Light decay is few, effectively improves heat conduction and improves current-crowding effect.
The encapsulation of wafer bonding early start MEMS power device before two more than ten years begins to adopt glue that wafer is bonding, is replaced by metal bonding now.Metal bonding has not only improved bonding efficiency, and improves the luminous efficiency of LED.In the optimizing process of LED bonding technology; The heat conduction that the bonded interface of vertical stratification LED had both needed; The conductivity that also needs; And these backing materials also will have the thermal coefficient of expansion that is complementary with LED, because when bonding technology process and substrate laser lift-off, there is bigger variations in temperature.In addition, the thickness of vertical stratification LED bonding metal and depositional mode are also very crucial, adopt adhesion layers such as platinum, aluminium, gold to guarantee that wafer slippage can not occur usually.
Existing translate substrate generally adopts copper substrate, but the thermal coefficient of expansion of copper is more much higher than GaN.This coefficient of thermal expansion mismatch causes very high surface stress, and high current density worsens this situation more.The GaN layer is the hexagonal Wurzite structure with piezoelectric effect, and the interfacial stress that causes thus can distribute by break current.And the expansion of metal substrate can be divided the lower GaN lattice of tensile strength, produces defective at intracell, causes local pyrexia in the epitaxial loayer, the vicious circle that causes optical efficiency to reduce, and such chip reliability can be poor; Bigger coefficient of expansion missionary society causes the wafer upper and lower surface to present certain flexibility simultaneously, makes the subsequent diagram photoetching process can't well make electrode pattern, causes the skew and the distortion of figure easily.
Summary of the invention
In order to address the above problem, the present invention provides a kind of flip LED chips structure and preparation method thereof, adopts the silicon alloy substrate as transfer base substrate, matees the thermal coefficient of expansion of growth substrate with this.
To achieve these goals, the present invention proposes a kind of inverted structure of led chip, comprises the silicon alloy substrate, metal intermediate layer, P type gallium nitride semiconductor layers, active layer, the n type gallium nitride semiconductor layer that stack gradually from the bottom to top.
Further, said metal intermediate layer comprises first metal intermediate layer and second metal intermediate layer.
Further, said first metal intermediate layer comprises and stacking gradually from the bottom to top: contact layer, reflection layer and solder layer.
Further, said second metal intermediate layer comprises: solder layer.
Further, the said n type gallium nitride semiconductor layer exiting surface that is said led chip.
Further, the material of said silicon alloy substrate comprises Si, also comprises a kind of or its combination among Al, Cu, Fe, the Ge.
Further, the Si content of said silicon alloy substrate is that 50wt% to 99wt%, alloy material total content are that 1wt% to 49wt%, impurity content are 0wt% to 1wt%.
Further, the material of said silicon alloy substrate is the binary alusil alloy material that contains 1wt% to 50wt% aluminium content.
The present invention also provides a kind of inverted structure led chip preparation method, comprising:
Growth substrate is provided;
At said growth substrate grown buffer layer successively, n type gallium nitride semiconductor layer, active layer and P type gallium nitride semiconductor layers;
In said P type gallium nitride semiconductor layers exposed surface first metal intermediate layer of growing;
Transfer base substrate is provided, and the material of said transfer base substrate is an aluminosilicate alloy material;
Growth second metal intermediate layer on said transfer base substrate;
Exposed surface bonding with said first metal intermediate layer exposed surface and said second metal intermediate layer;
Remove said growth substrate.
Further, said inverted structure led chip preparation method also comprises:
Remove said resilient coating, said n type gallium nitride semiconductor layer is exposed, and make first electrode at the exposed surface of said n type gallium nitride semiconductor layer;
To said n type gallium nitride semiconductor layer other region growing passivation protection layers except that first electrode;
To certain thickness, make second electrode from the said transfer base substrate of thinning back side at the back side of said transfer base substrate.
Further, said first metal intermediate layer comprises and piling up from the bottom to top: contact layer, reflection layer and solder layer.
Further, said second metal intermediate layer comprises: solder layer.
Further, the material of said silicon alloy substrate comprises Si, also comprises a kind of or its combination among Al, Cu, Fe, the Ge.
Further, the Si content of said silicon alloy substrate is that 50wt% to 99wt%, alloy material total content are that 1wt% to 49wt%, impurity content are 0wt% to 1wt%.
Further, the material of said silicon alloy substrate is the binary alusil alloy material that contains 1wt% to 50wt% aluminium content.
Compared with prior art; The beneficial effect of flip LED chips structure of the present invention mainly shows: adopt the silicon alloy substrate as transfer base substrate, with this thermal expansion technology of mating growth substrate, reduced chip and prepared in the process because the difference of growth substrate and transfer base substrate thermal coefficient of expansion; Alleviated the angularity of led chip; For device layer plays good supporting, effectively improved the saturation current of led chip, improve emitting brightness; Improve performance of products, and increased reliability of products.
Description of drawings
Fig. 1 is the LED epitaxial structure sketch map of on growth substrate, growing of the present invention;
Fig. 2 is the structural representation after growth first metal intermediate layer on the growth substrate of the present invention;
Fig. 3 is the structural representation after growth second metal intermediate layer on the transfer base substrate of the present invention;
Fig. 4 is of the present invention with the structural representation behind growth substrate upside-down mounting to the transfer base substrate;
Fig. 5 is the structural representation behind growth substrate upside-down mounting of the present invention to the transfer base substrate;
Fig. 6 a and Fig. 6 b are the warpage sketch map of chip behind growth substrate upside-down mounting of the prior art to the transfer base substrate;
Fig. 6 c is the warpage sketch map of chip behind growth substrate upside-down mounting of the present invention to the transfer base substrate;
Fig. 7 is the structural representation behind the removal growth substrate of the present invention;
Fig. 8 is the warpage sketch map behind the removal growth substrate of the present invention;
Fig. 9 is the structural representation after the N type semiconductor laminar surface is made first electrode of the present invention;
Figure 10 is of the present invention to the structural representation behind the n type semiconductor layer growth of passivation protective layer;
Figure 11 is the structural representation after transfer base substrate is made second electrode of the present invention.
N type gallium nitride semiconductor layer 22
P type gallium nitride semiconductor layers 24
First metal intermediate layer 31
Second metal intermediate layer 32
Metal intermediate layer 30
Embodiment
Below in conjunction with accompanying drawing, flip LED chips structure preparation method of the present invention is described in detail.
Fig. 1 is a flip LED chips structure preparation method block diagram of the present invention.
Step S101: growth substrate is provided, at said growth substrate grown buffer layer successively, n type gallium nitride semiconductor layer, active layer and P type gallium nitride semiconductor layers;
Please refer to Fig. 2, Fig. 2 is the LED epitaxial structure sketch map of on growth substrate, growing of the present invention.
Step S102: in said P type gallium nitride semiconductor layers exposed surface first metal intermediate layer of growing;
Please refer to Fig. 3, Fig. 3 is the structural representation after growth first metal intermediate layer on the growth substrate of the present invention.
P type gallium nitride semiconductor layers 24 surface depositions first metal intermediate layer 31 of growing, depositional mode is electron beam evaporation, thermal resistance evaporation, magnetron sputtering, pulsed laser deposition or spraying process.The material of the first metal layer 31 comprises a kind of or its combination among Ni, Pt, W, Pd, Ge, In, Be, Ti, Sn, the Au.The first metal layer comprises and piling up from the bottom to top: contact layer 311, reflection layer 312 and solder layer 313.First metal intermediate layer 31 has the multiple action for p type semiconductor layer 24 current expansion, light reflection and welding.
Step S103: transfer base substrate is provided, and the material of said transfer base substrate is an aluminosilicate alloy material, growth second metal intermediate layer on said transfer base substrate;
Please refer to Fig. 4, Fig. 4 is the structural representation after growth second metal intermediate layer on the transfer base substrate of the present invention.
At the surface deposition of transfer base substrate 11 second metal level 32 of growing, depositional mode selectable electronic beam evaporation, thermal resistance evaporation, magnetron sputtering, pulsed laser deposition or spraying process.The material of second metal level 32 comprises a kind of or its combination among Ni, Pt, W, Pd, Ag, Ge, In, Be, Ti, Sn, the Au.The material of second metal level 32 can be identical with the first metal layer 31, also can be different with the first metal layer 31.Second metal level 32 comprises weld layer, only as weld layer.
Step S104: with the exposed surface bonding of said first metal intermediate layer exposed surface and said second metal intermediate layer;
Please refer to Fig. 5, Fig. 5 is the structural representation behind growth substrate upside-down mounting of the present invention to the transfer base substrate.
The first metal layer 31 exposed surfaces (being the weld layer 313 of the first metal layer 31) and the mode bonding of second metal level, 32 exposed surfaces through the vacuum hotpressing bonding diffuse to form common gold.The temperature range of vacuum hotpressing bonding comprises 0 to 600 ℃, is preferably 400 ℃ to 600 ℃.
Please refer to Fig. 6 a and Fig. 6 b, Fig. 6 a and Fig. 6 b are the warpage sketch mapes of chip behind growth substrate upside-down mounting to the transfer base substrate in the prior art.Device layer 20 comprises resilient coating 21, n type gallium nitride semiconductor layer 22, active layer 23 and P type gallium nitride semiconductor layers 24, and metal intermediate layer 30 comprises first metal intermediate layer 31 and second metal intermediate layer 32.
After the mode and second metal level 32 bondings formation metal level 30 of the first metal layer 31 through the vacuum hotpressing bonding, because the thermal coefficient of expansion of led chip layers of material is different, led chip has certain angularity.
When the thermal coefficient of expansion of growth substrate 10 during greater than the thermal coefficient of expansion of transfer base substrate 11 ', the led chip behind the bonding is " epirelief " type warpage; When the thermal coefficient of expansion of growth substrate 10 during greater than the thermal coefficient of expansion of transfer base substrate 11 ', the led chip behind the bonding is " recessed " type warpage.And no matter " epirelief " type warpage still is " recessed " type warpage, all can cause stress influence to device layer 20, forms lattice dislocation damage, causes the generation of leakage current, influences product.
Please refer to Fig. 6 c, Fig. 6 c is the warpage sketch map of chip behind growth substrate upside-down mounting to the transfer base substrate described in the present invention.Device layer 20 comprises resilient coating 21, n type gallium nitride semiconductor layer 22, active layer 23 and P type gallium nitride semiconductor layers 24, and metal intermediate layer 30 comprises first metal intermediate layer 31 and second metal intermediate layer 32.
The transfer base substrate 11 of silicon alloy material is close with the thermal coefficient of expansion of growth substrate 10; Therefore the led chip behind the bonding can not present " epirelief " type or " recessed " type warpage; Thereby alleviated stress influence to device layer 20; Reduce lattice dislocation damage, effectively reduced the generation probability of leakage current.
Step S105: remove said growth substrate;
Please refer to Fig. 7, Fig. 7 is the structural representation behind the removal growth substrate of the present invention.Non-aufwuchsplate to growth substrate 10 polishes, and uses wavelength to peel off as the laser of 355nm to led chip and remove growth substrate 10.The outer surface of resilient coating 21 is exposed.
Please refer to Fig. 8, Fig. 8 is the warpage sketch map behind the removal growth substrate of the present invention.Device layer 20 comprises resilient coating 21, n type gallium nitride semiconductor layer 22, active layer 23 and P type gallium nitride semiconductor layers, and metal intermediate layer 30 comprises first metal intermediate layer 31 and second metal intermediate layer 32.
After removing growth substrate 10, because transfer base substrate 11 is the silicon alloy material, close with the thermal coefficient of expansion of the semiconductor layer of device layer 20, led chip can't produce very big warpage.
Step S106: remove said resilient coating, said n type gallium nitride semiconductor layer is exposed, and make first electrode at the exposed surface of said n type gallium nitride semiconductor layer;
Please with reference to Fig. 9, Fig. 9 is the structural representation after the n type gallium nitride semiconductor layer surface is made first electrode of the present invention.
Use chemical mechanical milling tech, the resilient coating 21 of above-mentioned exposure ground, with resilient coating 21 grind remove after, n type gallium nitride semiconductor layer 22 is exposed, and carries out electrode at the exposed surface of n type gallium nitride semiconductor layer 22 and make, form first electrode 41.Common, first electrode 41 also is referred to as N type contact electrode.
Step S107: to other region growing passivation protection layers of said n type gallium nitride semiconductor layer;
Please with reference to Figure 10, Figure 10 is of the present invention to the structural representation behind the n type gallium nitride semiconductor growth layer passivation protection layer.
All the other exposed surfaces (non-the first region territory) deposition growing one deck passivation protection layer at n type gallium nitride semiconductor layer 22 adopts SiO usually
2As the passivation protection layer.
Step S108: to certain thickness, make second electrode at the back side of said transfer base substrate from the said transfer base substrate of thinning back side;
Please with reference to Figure 11, Figure 11 is the structural representation after transfer base substrate is made second electrode of the present invention.
From the one side relative with second metal level 32, promptly reduction processing is carried out to transfer base substrate 11 in the back side, and the thickness behind the attenuate is 150um to 250um usually, and makes second electrode 42 in non-plated metal one side (being the back side) of transfer base substrate 11.Common, second electrode 41 also is referred to as P type contact electrode.Thereby accomplish the preparation of flip LED chips structure.
In order to understand content of the present invention better, enumerate embodiment below and explain.
Embodiment 1
On the growth substrate of sapphire material, adopt the mode of metal organic chemical vapor deposition to deposit the resilient coating of GaN material, the n type semiconductor layer of GaN material, the active layer of InGaN material and the p type semiconductor layer of GaN material successively;
First metal intermediate layer of forming for the Ni/Ag/Ti/W/Au/Sn element in the p type semiconductor layer surface deposition material of GaN material;
Second metal intermediate layer that the deposition material is formed for the Au/Sn element on the silicon alloy material transfer base substrate of silicone content 80wt%, aluminium content 20wt%.The silicon alloy material of silicone content 80wt%, aluminium content 20wt% has the thermal coefficient of expansion close with the sapphire material;
First metal intermediate layer and second metal intermediate layer with relative direction, are carried out the vacuum hotpressing bonding, make first metal intermediate layer and second metal intermediate layer diffuse to form public gold each other.The parameter of vacuum hotpressing bonding comprises: gas pressure is that 1torr, temperature are 500 ℃, pressure 2.5 * 10
3KG;
After accomplishing growth substrate upside-down mounting and transfer base substrate, the non-aufwuchsplate of growth substrate is polished, and to adopt wavelength be that the laser of 355nm is peeled off sapphire material growth substrate, make the exposure of GaN material resilient coating;
Remaining GaN material resilient coating is carried out cmp handle, remove above-mentioned resilient coating, the n type semiconductor layer of GaN material is exposed, and make first electrode at the n type semiconductor layer exposed surface;
Non-electrode zone deposition growing SiO to the n type semiconductor layer exposed surface
2The passivation protection layer of material;
Silicon alloy material transfer base substrate from the back side to silicone content 80wt%, aluminium content 20wt% carries out reduction processing, makes its reduced thickness to 200um, on the above-mentioned silicon alloy material transfer base substrate back side, makes second electrode.
The flip LED chips structure that present embodiment is corresponding is: the thickness that stacks gradually from the bottom to top is the silicone content 80wt% of 200um, the silicon alloy substrate of aluminium content 20wt%;
Material is the metal intermediate layer of Ni/Ag/Ti/W/Au/Sn;
The p type semiconductor layer of GaN material;
The active layer of InGaN material;
The n type semiconductor layer of GaN material;
And first electrode that is made in the N type semiconductor laminar surface of GaN material;
The N type semiconductor laminar surface that covers the GaN material removes the passivation protection layer of first electrode with exterior domain;
Be positioned at second electrode that silicon alloy substrate bottom makes.
On the growth substrate of sapphire material, adopt the mode of metal organic chemical vapor deposition to deposit the resilient coating of GaN material, the n type semiconductor layer of GaN material, the active layer of InGaN material and the p type semiconductor layer of GaN material successively;
First metal intermediate layer of forming for the Ag/Ti/Au/Sn element in the p type semiconductor layer surface deposition material of GaN material;
Second metal intermediate layer that the deposition material is formed for the Au/Sn element on the silicon alloy material transfer base substrate of silicone content 50wt%, aluminium content 40wt%, copper content 10wt%.
First metal intermediate layer and second metal intermediate layer with relative direction, are carried out the vacuum hotpressing bonding, make first metal intermediate layer and second metal intermediate layer diffuse to form public gold each other.The parameter of vacuum hotpressing bonding comprises: gas pressure is that 1torr, temperature are 600 ℃, pressure 2.5 * 10
3KG;
After accomplishing growth substrate upside-down mounting and transfer base substrate, the non-aufwuchsplate of growth substrate is polished, and to adopt wavelength be that the laser of 355nm is peeled off sapphire material growth substrate, make the exposure of GaN material resilient coating;
Remaining GaN material resilient coating is carried out cmp handle, remove above-mentioned resilient coating, the n type semiconductor layer of GaN material is exposed, and make first electrode at the n type semiconductor layer exposed surface;
Non-electrode zone deposition growing SiO to the n type semiconductor layer exposed surface
2The passivation protection layer of material;
Silicon alloy material transfer base substrate from the back side to silicone content 50wt%, aluminium content 40wt%, copper content 10wt% carries out reduction processing, makes its reduced thickness to 150um, on the above-mentioned silicon alloy material transfer base substrate back side, makes second electrode.
The flip LED chips structure that present embodiment is corresponding is: stack gradually from the bottom to top
Thickness is silicone content 50wt%, the aluminium content 40wt% of 150um, the silicon alloy substrate of copper content 10wt%;
Material is the metal intermediate layer of Ag/Ti/Au/Sn;
The p type semiconductor layer of GaN material;
The active layer of InGaN material;
The n type semiconductor layer of GaN material;
And first electrode that is made in the N type semiconductor laminar surface of GaN material;
The N type semiconductor laminar surface that covers the GaN material removes the passivation protection layer of first electrode with exterior domain;
Be positioned at second electrode that silicon alloy substrate bottom makes.
To sum up, flip LED chips structure of the present invention and preparation method thereof adopts the silicon alloy material transfer base substrate close with the growth substrate thermal coefficient of expansion; In laser lift-off growth substrate process, device layer is played good supporting; Effectively promote the saturation current of led chip, improve emitting brightness, reduce the leakage current generating probability; Thereby promoted the reliability of led chip, improved performance of products.
Be merely the preferred embodiments of the present invention in sum, the present invention do not done any restriction.Any said those skilled in the art; In the scope that does not break away from technical scheme of the present invention; Technical scheme and technology contents to the present invention discloses are made any type of changes such as replacement or modification that are equal to; All belong to the content that does not break away from technical scheme of the present invention, still drop within protection scope of the present invention.
Claims (15)
1. a flip LED chips structure is characterized in that, comprises the silicon alloy substrate, metal intermediate layer, P type gallium nitride semiconductor layers, active layer, the n type gallium nitride semiconductor layer that stack gradually from the bottom to top.
2. flip LED chips structure as claimed in claim 1 is characterized in that: said metal intermediate layer comprises first metal intermediate layer and second metal intermediate layer.
3. flip LED chips structure as claimed in claim 2 is characterized in that: said first metal intermediate layer comprises and stacking gradually from the bottom to top: contact layer, reflection layer and solder layer.
4. flip LED chips structure as claimed in claim 2 is characterized in that: said second metal intermediate layer comprises: solder layer.
5. flip LED chips structure as claimed in claim 1 is characterized in that: said n type gallium nitride semiconductor layer is the exiting surface of said led chip.
6. flip LED chips structure as claimed in claim 1 is characterized in that: the material of said silicon alloy substrate comprises Si, also comprises a kind of or its combination among Al, Cu, Fe, the Ge.
7. flip LED chips structure as claimed in claim 1 is characterized in that: the Si content of said silicon alloy substrate is that 50wt% to 99wt%, alloy material total content are that 1wt% to 49wt%, impurity content are 0wt% to 1wt%.
8. flip LED chips structure as claimed in claim 1 is characterized in that: the material of said silicon alloy substrate is the binary alusil alloy material that contains 1wt% to 50wt% aluminium content.
9. the described inverted structure led chip of claim 1 preparation method is characterized in that, comprising:
Growth substrate is provided;
At said growth substrate grown buffer layer successively, n type gallium nitride semiconductor layer, active layer and P type gallium nitride semiconductor layers;
In said P type gallium nitride semiconductor layers exposed surface first metal intermediate layer of growing;
Transfer base substrate is provided, and the material of said transfer base substrate is an aluminosilicate alloy material;
Growth second metal intermediate layer on said transfer base substrate;
Exposed surface bonding with said first metal intermediate layer exposed surface and said second metal intermediate layer;
Remove said growth substrate.
10. inverted structure led chip preparation method as claimed in claim 9 is characterized in that, said inverted structure led chip preparation method also comprises:
Remove said resilient coating, said n type gallium nitride semiconductor layer is exposed, and make first electrode at the exposed surface of said n type gallium nitride semiconductor layer;
To said n type gallium nitride semiconductor layer other region growing passivation protection layers except that first electrode;
To certain thickness, make second electrode from the said transfer base substrate of thinning back side at the back side of said transfer base substrate.
11. inverted structure led chip preparation method as claimed in claim 9 is characterized in that: said first metal intermediate layer comprises piles up from the bottom to top: contact layer, reflection layer and solder layer.
12. inverted structure led chip preparation method as claimed in claim 9 is characterized in that: said second metal intermediate layer comprises: solder layer.
13. inverted structure led chip preparation method as claimed in claim 9, it is characterized in that: the material of said silicon alloy substrate comprises Si, also comprises a kind of or its combination among Al, Cu, Fe, the Ge.
14. inverted structure led chip preparation method as claimed in claim 9 is characterized in that: the Si content of said silicon alloy substrate is that 50wt% to 99wt%, alloy material total content are that 1wt% to 49wt%, impurity content are 0wt% to 1wt%.
15. flip LED chips structure as claimed in claim 9 is characterized in that: the material of said silicon alloy substrate is the binary alusil alloy material that contains 1wt% to 50wt% aluminium content.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012101721022A CN102683524A (en) | 2012-05-25 | 2012-05-25 | Inversed LED (Light Emitting Diode) chip structure and preparation method of inversed LED chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012101721022A CN102683524A (en) | 2012-05-25 | 2012-05-25 | Inversed LED (Light Emitting Diode) chip structure and preparation method of inversed LED chip |
Publications (1)
Publication Number | Publication Date |
---|---|
CN102683524A true CN102683524A (en) | 2012-09-19 |
Family
ID=46815165
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2012101721022A Pending CN102683524A (en) | 2012-05-25 | 2012-05-25 | Inversed LED (Light Emitting Diode) chip structure and preparation method of inversed LED chip |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102683524A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020093228A1 (en) * | 2018-11-06 | 2020-05-14 | Shenzhen Xpectvision Technology Co., Ltd. | Packaging methods of semiconductor devices |
CN111584538A (en) * | 2020-06-05 | 2020-08-25 | 武汉华星光电技术有限公司 | Micro light emitting diode display device and manufacturing method thereof |
CN113224218A (en) * | 2020-12-30 | 2021-08-06 | 湖北长江新型显示产业创新中心有限公司 | Display panel, manufacturing method and display device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20100109169A (en) * | 2009-03-31 | 2010-10-08 | 서울옵토디바이스주식회사 | Fabrication method of light emitting diode and the light emitting diode fabricated by the method |
CN102157649A (en) * | 2011-01-31 | 2011-08-17 | 杭州士兰明芯科技有限公司 | Gallium nitride light-emitting diode (GaN LED) chip with vertical structure and manufacturing method thereof |
CN102185046A (en) * | 2011-04-08 | 2011-09-14 | 同辉电子科技股份有限公司 | Method for manufacturing gallium nitride-based LED (Light Emitting Diode) with vertical structure |
CN102347411A (en) * | 2010-07-23 | 2012-02-08 | Lg伊诺特有限公司 | Light emitting device, light emitting device package comprising same and lighting system |
-
2012
- 2012-05-25 CN CN2012101721022A patent/CN102683524A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20100109169A (en) * | 2009-03-31 | 2010-10-08 | 서울옵토디바이스주식회사 | Fabrication method of light emitting diode and the light emitting diode fabricated by the method |
CN102347411A (en) * | 2010-07-23 | 2012-02-08 | Lg伊诺特有限公司 | Light emitting device, light emitting device package comprising same and lighting system |
CN102157649A (en) * | 2011-01-31 | 2011-08-17 | 杭州士兰明芯科技有限公司 | Gallium nitride light-emitting diode (GaN LED) chip with vertical structure and manufacturing method thereof |
CN102185046A (en) * | 2011-04-08 | 2011-09-14 | 同辉电子科技股份有限公司 | Method for manufacturing gallium nitride-based LED (Light Emitting Diode) with vertical structure |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020093228A1 (en) * | 2018-11-06 | 2020-05-14 | Shenzhen Xpectvision Technology Co., Ltd. | Packaging methods of semiconductor devices |
US11581361B2 (en) | 2018-11-06 | 2023-02-14 | Shenzhen Xpectvision Technology Co., Ltd. | Packaging methods of semiconductor devices |
CN111584538A (en) * | 2020-06-05 | 2020-08-25 | 武汉华星光电技术有限公司 | Micro light emitting diode display device and manufacturing method thereof |
CN113224218A (en) * | 2020-12-30 | 2021-08-06 | 湖北长江新型显示产业创新中心有限公司 | Display panel, manufacturing method and display device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI455345B (en) | Light emitting diode having vertical topology and method of making the same | |
JP5286045B2 (en) | Manufacturing method of semiconductor light emitting device | |
KR100815225B1 (en) | Vertically structured light emitting diode device and method of manufacturing the same | |
US8766316B2 (en) | Semiconductor device having plurality of bonding layers | |
US8791480B2 (en) | Light emitting device and manufacturing method thereof | |
CN101964385B (en) | Light emitting diode and making method thereof | |
JP2010062493A (en) | Semiconductor light-emitting element and manufacturing method of semiconductor light-emitting element | |
US8120042B2 (en) | Semiconductor light emitting device | |
WO2014045883A1 (en) | Led element, and production method therefor | |
CN102332521A (en) | GaN (gallium nitride)-based LED (light-emitting diode) with N-type electrodes in dotted distribution and manufacturing method thereof | |
JP2013034010A (en) | Vertical light-emitting device | |
JP2012142401A (en) | Semiconductor chip manufacturing method and semiconductor wafer division method | |
CN102779911A (en) | Fabricating method of GaN-based light-emitting component with vertical structure | |
CN108493311A (en) | A kind of deep ultraviolet LED epitaxial chips encapsulating structure and preparation method | |
KR100887758B1 (en) | Flip-chip type vertical light emitting device and method of fabricating the device | |
JP2008172226A (en) | Method of forming light-emitting diode device | |
CN102683524A (en) | Inversed LED (Light Emitting Diode) chip structure and preparation method of inversed LED chip | |
KR20100103962A (en) | Light emitting device and method for fabricating the same | |
KR101499954B1 (en) | fabrication of vertical structured light emitting diodes using group 3 nitride-based semiconductors and its related methods | |
KR20090105462A (en) | Vertical structured group 3 nitride-based light emitting diode and its fabrication methods | |
KR101526566B1 (en) | fabrication of vertical structured light emitting diodes using group 3 nitride-based semiconductors and its related methods | |
US8319227B2 (en) | Light emitting device | |
KR101119009B1 (en) | Method of forming light emitting device with separation by ion implantation | |
CN100369279C (en) | Bridge N-electrode type gallium nitride base large tube core LED and preparation method | |
KR100998007B1 (en) | Nitride semiconductor light emitting device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20120919 |