CN102683399B - Embedded epitaxial external base region bipolar transistor and preparation method thereof - Google Patents
Embedded epitaxial external base region bipolar transistor and preparation method thereof Download PDFInfo
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- CN102683399B CN102683399B CN201210153147.5A CN201210153147A CN102683399B CN 102683399 B CN102683399 B CN 102683399B CN 201210153147 A CN201210153147 A CN 201210153147A CN 102683399 B CN102683399 B CN 102683399B
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Abstract
The present invention discloses a kind of embedded epitaxial external base region bipolar transistor, there is TED effect problem for solving existing structure and designs.The embedded epitaxial external base region bipolar transistor of the present invention at least comprises heavily doped buried regions collector region, collector region, Selective implantation collector region, base, outer base area, emitter and side wall, outer base area adopts in-situ doped selective epitaxial process to grow and forms, and is embedded in collector region.A part for outer base area is positioned at the below of side wall.Outer base area produces stress on base.The invention provides a kind of preparation method of embedded epitaxial external base region bipolar transistor.The embedded epitaxial external base region bipolar transistor of the present invention avoids TED effect, also reduces the external base resistance of device simultaneously, and the performance of device is got a promotion.The preparation method of the embedded epitaxial external base region bipolar transistor of the present invention achieves above-mentioned embedded epitaxial external base region bipolar transistor structure, and step is terse, and cost is low, and operate simple and easy, resulting structures is functional.
Description
Technical field
The present invention relates to a kind of embedded epitaxial external base region bipolar transistor and preparation method thereof.
Background technology
The trend that millimeter wave and THZ application will be future wireless technologies development, as millimetre-wave attenuator, THZ communication, THZ imaging etc.Main three or five family devices that rely on of at present these application complete, and it exists the shortcomings such as low integrated level, high cost, and along with the continuous progress of technology, SiGe device and technology will become the rival of three or five family devices.Germanium silicon technology is widely used in the various aspects such as communication, radar and high speed circuit at present.IBM commercial germanium silicon technology Ft reaches 350GHz, and the SiGe device Fmax of European IHP exploitation reaches 500GHz at normal temperatures.For millimeter wave and the THZ application in future, the performance of SiGe device still needs continuous lifting, and this just needs novel SiGe device structure.
The outer base area of conventional bipolar transistor adopts the mode of injection to process usually, the performance defectiveness of resulting structures, the problems such as such as TED (Transient enhanced diffusion, instantaneous enhanced diffustion) effect can reduce the microwave property of device.Some novel germanium silicon bipolar devices adopt the method for lifting base to be prepared, but the external base resistance in resulting structures under side wall can be comparatively large, thus reduce device microwave property.
Summary of the invention
In order to overcome above-mentioned defect, the invention provides a kind of embedded epitaxial external base region bipolar transistor avoiding TED effect.
For achieving the above object, on the one hand, the invention provides a kind of embedded epitaxial external base region bipolar transistor, at least comprise the emitter on the collector region on heavily doped buried regions collector region, buried regions collector region, the Selective implantation collector region in collector region, the base on collector region and outer base area, base, and the side wall of emitter both sides, described outer base area adopts in-situ doped selective epitaxial process to grow and forms, and is embedded in described collector region.
Particularly, a part for described outer base area is positioned at the below of described side wall.
Particularly, described outer base area produces stress on described base.
On the other hand, the invention provides a kind of preparation method of embedded epitaxial external base region bipolar transistor, at least comprising the steps: of described method
2.1 impurity injecting the first doping type on the substrate of the first doping type, form heavily doped buried regions collector region through advancing;
2.2 collector regions of preparing the first doping type on resulting structures;
2.3 bases preparing the second doping type on resulting structures;
2.4 prepare first medium layer successively on base;
The exposed part that described first medium layer is removed in 2.5 photoetching, etching forms sacrificial emitter;
2.6 etchings are not sacrificed the base that emitter covers, and etch thicknesses is greater than the thickness of base;
2.7 prepare the outer base area of the second doping type in the structure of etching gained;
2.8 deposition of second dielectric layer form flat surfaces, expose the upper surface of sacrificial emitter;
2.9 removal units divide top layer sacrificial emitter, obtain window; Inside wall structure is prepared at the madial wall of described window;
2.10 remove not by sacrificial emitter that inside wall covers;
The impurity of 2.11 injection the first doping types, forms Selective implantation collector region;
2.12 deposit polycrystal layer;
The marginal portion of second dielectric layer in polycrystal layer in 2.13 removal steps 2.12 and step 2.8, forms emitter;
2.14 at outer base area and emitter surface depositing metal, forms metal silicide;
2.15 prepare contact hole on resulting structures, draw emitter electrode and base electrode.
Particularly, the material preparing base in step 2.3 is silicon, germanium silicon or carbon dope germanium silicon.
Particularly, in step 2.4, first medium layer is compound medium layer, and described compound medium layer comprises the silicon oxide layer being deposited on base region surface and the silicon nitride layer being deposited on silicon oxide layer surface.
Particularly, below side wall, undercutting is carried out when etching base in step 2.6.
Particularly, the outer base area in step 2.7 uses epitaxial growth method preparation, and the material of outer base area is silicon, or germanium silicon, or carbon dope germanium silicon; The doping content of impurity is at 1E19 ~ 1E21cm
-3.
Particularly, in step 2.14, the metal of deposit is the one in titanium, cobalt or nickel.
The embedded epitaxial external base region bipolar transistor of the present invention be provided with embedded extension base, avoid TED effect, also reduce the external base resistance of device simultaneously, the performance of device is got a promotion.
The preparation method of the embedded epitaxial external base region bipolar transistor of the present invention adopts autoregistration scheme to achieve above-mentioned embedded epitaxial external base region bipolar transistor structure, and step is terse, and cost is low, and operate simple and easy, resulting structures is functional.
Accompanying drawing explanation
Fig. 1 ~ Figure 15 is preparation method's schematic diagram of the embedded epitaxial external base region bipolar transistor of the present invention.
Embodiment
Below in conjunction with Figure of description and preferred embodiment, the present invention is described in detail.
The embedded epitaxial external base region bipolar transistor of the present invention at least comprises the emitter on base on the collector region on heavily doped buried regions collector region, buried regions collector region, the Selective implantation collector region in collector region, collector region and outer base area, base, and the side wall of emitter both sides, described outer base area adopts in-situ doped selective epitaxial process to grow and forms, and is embedded in described collector region.
Preferred structure is the below that the part of outer base area is positioned at side wall, namely produces certain undercutting when preparing this structure.And outer base area produces stress on base, now device performance more.
The invention is not restricted to silicon bipolar transistor, other material can be germanium silicon, three or five races etc.
The embedded epitaxial external base region bipolar transistor of the present invention be provided with embedded extension base, avoid TED effect, also reduce the external base resistance of device simultaneously, the performance of device is got a promotion.
Preferred embodiment: the preparation method of the embedded epitaxial external base region bipolar transistor of the present invention at least comprises the steps:
As shown in Figure 1 to Figure 3, the substrate 201 of the first doping type injecting the impurity of the first doping type, forming heavily doped buried regions collector region 202 through advancing.Resulting structures is prepared the collector region 101 of the first doping type.
Fig. 4 prepares the collector region 101 of the first doping type.At collector region 101 Epitaxial growth one deck impure base region 102, base is the second doping type.Base 102 can be silicon, also can be germanium silicon.Dielectric layer deposited on base 102, dielectric layer is preferably compound medium layer.Compound medium layer silicon oxide layer 104 and silicon nitride layer 106 successively from top to bottom.Wherein, silica is etching stop layer.
As shown in Figure 5, photoetching, etching are carried out to silicon nitride layer 106 and silicon oxide layer 104, form sacrificial emitter.
As shown in Figure 6, etching 102 to collector region, extension base 101, forms etching structure 110.The main purpose of this scheme is adopted to be reduce TED effect.For reducing external base resistance, etch thicknesses is greater than extension base 102 layer thickness.Preferably there is undercutting to a certain degree, external base resistance can be reduced further like this.
As shown in Figure 7, selective epitaxial one deck outer base area 120, in-situ doped.This epitaxial loayer can be silicon, also can be germanium silicon.For reducing external base resistance, doping content will be tried one's best height, generally should at 1E19 ~ 1E21cm
-3.
As shown in Figure 8, silicon oxide deposition layer 112, adopts CMP or returns the method for carving and carry out planarization, come out by the silicon nitride layer 106 of sacrificial emitter.
As shown in Figure 9, wet etching falls the silicon nitride layer 106 of sacrificial emitter, then deposit one deck silicon nitride, and anisotropic etching becomes inside wall 114.
As shown in Figure 10, selectivity dry etching or wet etching fall emitter-window not by silicon oxide layer 104 that inside wall 114 covers.
As is illustrated by figs. 11 and 12, inject the impurity of the first doping type, form Selective implantation collector region 203.
As shown in figure 13, deposit polycrystal layer 124 on resulting structures.
As shown in figure 14, successively photoetching, etching are carried out to polycrystal layer 124 and silicon oxide layer 112, form emitter.
As shown in figure 15, at outer base area 120 and emitter surface depositing metal, annealed formation metal suicide structure 128.The metal of institute's deposit can be the one in titanium, cobalt or nickel, but is not limited to above metal.
Resulting structures prepares contact hole, draws emitter electrode and base electrode.
The preparation method of the embedded epitaxial external base region bipolar transistor of the present invention achieves above-mentioned embedded epitaxial external base region bipolar transistor structure, and step is terse, and cost is low, and operate simple and easy, resulting structures is functional.
Above; be only preferred embodiment of the present invention, but protection scope of the present invention is not limited thereto, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; the change that can expect easily or replacement, all should be encompassed within protection scope of the present invention.Therefore, the protection range that protection scope of the present invention should define with claim is as the criterion.
Claims (1)
1. a preparation method for embedded epitaxial external base region bipolar transistor, is characterized in that, at least comprising the steps: of described method
2.1 impurity injecting the first doping type on the substrate of the first doping type, form heavily doped buried regions collector region through advancing;
2.2 collector regions of preparing the first doping type on resulting structures;
2.3 bases preparing the second doping type on resulting structures;
2.4 prepare first medium layer successively on base;
The exposed part that described first medium layer is removed in 2.5 photoetching, etching forms sacrificial emitter;
2.6 etchings are not sacrificed the base that emitter covers, and etch thicknesses is greater than the thickness of base;
2.7 prepare the outer base area of the second doping type in the structure of etching gained;
2.8 deposition of second dielectric layer form flat surfaces, expose the upper surface of sacrificial emitter;
2.9 removal units divide top layer sacrificial emitter, obtain window; Inside wall structure is prepared at the madial wall of described window;
2.10 remove not by sacrificial emitter that inside wall covers;
The impurity of 2.11 injection the first doping types, forms Selective implantation collector region;
2.12 deposit polycrystal layer;
The marginal portion of second dielectric layer in polycrystal layer in 2.13 removal steps 2.12 and step 2.8, forms emitter;
2.14 at outer base area and emitter surface depositing metal, forms metal silicide;
2.15 prepare contact hole on resulting structures, draw emitter electrode and base electrode;
The material preparing base in step 2.3 is silicon, germanium silicon or carbon dope germanium silicon;
In step 2.4, first medium layer is compound medium layer, and described compound medium layer comprises the silicon oxide layer being deposited on base region surface and the silicon nitride layer being deposited on silicon oxide layer surface;
Below side wall, undercutting is carried out when etching base in step 2.6;
Outer base area in step 2.7 uses epitaxial growth method preparation, and the material of outer base area is silicon, or germanium silicon, or carbon dope germanium silicon; The doping content of impurity is at 1E19 ~ 1E21cm
-3;
In step 2.14, the metal of deposit is the one in titanium, cobalt or nickel.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101552200A (en) * | 2008-12-30 | 2009-10-07 | 清华大学 | Preparation method of selective buried collector region structure applicable to bipolar transistor |
| CN102054689A (en) * | 2009-11-05 | 2011-05-11 | 上海华虹Nec电子有限公司 | Manufacturing method of SiGe heterojunction bipolar transistor |
| CN102709318B (en) * | 2012-05-16 | 2015-07-15 | 清华大学 | Embedded epitaxial external base region bipolar transistor and preparation method thereof |
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| US7005359B2 (en) * | 2003-11-17 | 2006-02-28 | Intel Corporation | Bipolar junction transistor with improved extrinsic base region and method of fabrication |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101552200A (en) * | 2008-12-30 | 2009-10-07 | 清华大学 | Preparation method of selective buried collector region structure applicable to bipolar transistor |
| CN102054689A (en) * | 2009-11-05 | 2011-05-11 | 上海华虹Nec电子有限公司 | Manufacturing method of SiGe heterojunction bipolar transistor |
| CN102709318B (en) * | 2012-05-16 | 2015-07-15 | 清华大学 | Embedded epitaxial external base region bipolar transistor and preparation method thereof |
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