CN102969242B - Embedded epitaxial external base region bipolar transistor preparation method - Google Patents
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- CN102969242B CN102969242B CN201210431011.6A CN201210431011A CN102969242B CN 102969242 B CN102969242 B CN 102969242B CN 201210431011 A CN201210431011 A CN 201210431011A CN 102969242 B CN102969242 B CN 102969242B
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Abstract
The invention discloses a kind of embedded epitaxial external base region bipolar transistor preparation method, for solving existing preparation method, step is many and loaded down with trivial details, production efficiency is low, problems such as production cost is high and designing, preparation method of the present invention comprises successively: the collector region of preparing the first doping type, collector region is prepared the base of the second doping, dielectric layer is prepared in base, photoetching on dielectric layer, etch emitter-window, deposit in emitter-window planarization polycrystalline, a polycrystalline surface oxide layer is formed on polycrystalline surface, erode dielectric layer, make the side wall of polycrystalline and polycrystalline surface oxide layer, with side wall and described polycrystalline surface oxide layer for blindage, etching base, collector region, base after etching and basis, collector region are being prepared the outer base area of the second doping type by in-situ doped selective epitaxial, said structure prepares contact hole, draws emitter electrode and collection region electrode, the advantage such as have that step is few and simple, production efficiency is high and cost of manufacture is low.
Description
Technical field
The present invention relates to a kind of manufacture method of bipolar transistor, particularly relate to a kind of embedded epitaxial external base region bipolar transistor manufacture method of low cost.
Background technology
Embedded epitaxial external base region bipolar transistor improves a lot in the performance of traditional bipolar transistor owing to well overcoming TED (Transientenhanceddiffusion) instantaneous enhanced diffustion effect.
Embedded epitaxial external base region bipolar transistor, at least comprises collector region, the base be positioned on collector region, outer base area, is positioned at the side wall of emitter on base and described emitter both sides; Outer base area adopts the growth of doping selective epitaxial process to form, and is embedded in described collector region.
Manufacture method comprises the following steps:
1: the collector region of preparing the first doping type;
2: the base preparing the second doping on collector region;
3: on base, prepare first medium successively;
4: the exposed part that described first medium is removed in photoetching, etching forms sacrificial emitter;
5: etching is not sacrificed the base that emitter covers, and etch thicknesses is greater than the thickness of base;
6: the outer base area of preparing the second doping type in the mechanism of etching gained;
7: deposition of second dielectric layer forms flat surfaces, expose the upper surface of sacrificial emitter;
8: removal unit divides top layer sacrificial emitter, obtains window;
9: prepare inside wall structure at the madial wall of described window;
10: remove not by sacrificial emitter that inside wall covers;
11: deposit polycrystal layer;
12: the marginal portion of second dielectric layer in removal step 10 and step 7, forms emitter;
13: at outer base area and emitter surface depositing metal, form metal oxide;
14: on resulting structures, prepare contact hole, draw emitter electrode and base electrode.
Adopt said method can make above-mentioned embedded epitaxial external base region bipolar transistor, but operating procedure is many and comparatively loaded down with trivial details, reduces production efficiency accordingly, improves manufacturing cost.
Summary of the invention
For overcoming the problems referred to above, the invention provides a kind of production efficiency high, the embedded epitaxial external base region bipolar transistor preparation method that manufacturing cost is low.
For reaching above-mentioned purpose, the present invention's embedded epitaxial external base region bipolar transistor preparation method comprises following concrete steps:
1: the collector region of preparing the first doping type;
2: the base preparing the second doping on collector region;
3: on base, prepare dielectric layer;
4: photoetching on described dielectric layer, etch emitter-window;
5: deposit in described emitter-window planarization polycrystalline;
6: form a polycrystalline surface oxide layer on described polycrystalline surface;
7: erode described dielectric layer;
8: the side wall making described polycrystalline and described polycrystalline surface oxide layer;
9: with described side wall and described polycrystalline surface oxide layer for blindage, etching base and collector region;
10: the base after etching and collector region are being prepared the outer base area of the second doping type by in-situ doped selective epitaxial;
11: preparation contact hole, draw emitter electrode and base electrode.
Further, described step 6 adopts high-pressure oxidation process to prepare described polycrystalline surface oxide layer.
Further, the method for described step 5 planarization polycrystalline is CMP chemical mechanical polishing method or etch-back etchback.
Further, described dielectric layer is compound medium layer; Described compound medium layer comprises the silicon nitride layer of silicon oxide layer described in the silicon oxide layer of base region surface described in deposit and deposit.
Further, described side wall is made up of silica or silicon nitride is formed.
Further, the brill described base of etching and described collector region is adopted to be positioned at described emitter inferior portion in described step 9;
Wherein, base and described collector region described in reserve part below described emitter.
The beneficial effect of the embedded epitaxial external base region bipolar transistor preparation method of the present invention:
The embedded epitaxial external base region bipolar transistor preparation method of the present invention, have adjusted the order of making step, preferential preparation emitter-window, in emitter-window, pass through deposit polycrystalline again, make polycrystalline surface oxide layer, instead of in previous methods and adopt sacrificial emitter progressively to form emitter, decrease step (step such as deposit and corrosion as second medium in conventional method), and the loaded down with trivial details degree of step also reduces (as prepared inside wall structure at the madial wall of window) relatively, thus improve generation benefit, save production cost simultaneously.
Accompanying drawing explanation
Fig. 1-Fig. 7 is preparation side's schematic diagram of the embedded epitaxial external base region bipolar transistor described in the embodiment of the present invention one;
Fig. 8-Fig. 9 is preparation method's schematic diagram of the embedded epitaxial external base region bipolar transistor described in embodiment of the present invention example four;
Figure 10 is the flow chart of the preparation method of embedded epitaxial external base region bipolar transistor described in the embodiment of the present invention one.
Embodiment
Below in conjunction with Figure of description, the present invention will be further described.
Embodiment one:
As Figure 1-Figure 8, the present embodiment embedded epitaxial external base region bipolar transistor preparation method comprises following concrete steps:
1: the collector region 1 of preparing the first doping type;
2: the base 2 preparing the second doping on collector region;
3: on base, prepare dielectric layer; The preferred complex media of described dielectric layer comprises the silicon nitride layer 32 being positioned at silicon oxide layer 31 described in silicon oxide layer 31 on described base and deposit in the present embodiment; Described in concrete manufacturing process, oxide layer 31 is thinner, facilitates follow-up corrosion step;
4: photoetching on described dielectric layer, etch emitter-window 4;
5: deposit in described emitter-window 4 planarization polycrystalline 5;
6: form a polycrystalline surface oxide layer 6 on described polycrystalline 5 surface;
7: erode described dielectric layer;
8: the side wall 7 making described polycrystalline 5 and described polycrystalline surface oxide layer 6;
9: with described side wall 7 and described polycrystalline surface oxide layer 6 for blindage, etching base 2 and collector region 1;
10: the base 2 after etching and basis, collector region 1 are prepared the outer base area 8 of the second doping type by in-situ doped selective epitaxial;
11: preparation contact hole, draw emitter electrode and base electrode.
Described in concrete preparation process, silicon is preferentially selected in collector region 1, and described base 2 preferentially selects germanium silicon to form.Embedded epitaxial external base region bipolar transistor preparation method described in the present embodiment by with the comparing of traditional manufacturing technique, step is lacked and making step is easier, thus improves productivity effect, reduces manufacturing cost.
Embodiment two:
In embodiment one, the formation of the polycrystalline surface oxide layer described in step 6, ordinary oxygen metallization processes can be taked just can to realize, and the present embodiment is on the basis of embodiment one, preferred employing high-pressure oxidation process prepares described polycrystalline surface oxide layer.Adopt high pressure oxidation, because oxidation atmosphere is in high pressure conditions, the quality of the oxide layer of formation is good, and oxidation rate is high and greatly reduce oxidizing temperature, shorten oxidization time, reduces manufacturing cost while further increasing productivity effect.
Embodiment three:
The present embodiment is on the basis of above-mentioned any embodiment one, and the implementation method of the planarization of described polycrystalline has many, provides two kinds of technology maturations, method that throughput rate is high in the present embodiment.
The first: adopt CMP (ChemicalMechanicalPolishing) chemical mechanical polishing method, the technique that comprehensive utilization mechanical friction and chemical corrosion combine, the planarization realizing polycrystalline that can be easy, ensures the quality of planarization simultaneously;
The second: adopt etch-back etchback, recess process is simply ripe.
In addition described outer base area be formed by in-situ doped selective epitaxial process, the material of this epitaxy technique can be silicon, also can be germanium silicon, can also be the germanium silicon of carbon dope, need to participate in impurity in above-mentioned material, described impurity is that the second doping type and doping type are identical with the doping type of base; In order to reduce the resistance of outer base area, the preferred 1E19 ~ 1E21cm of doping content
-3.For the embedded epitaxial external base region bipolar transistor of NPN type, the impurity of doping is generally element boron.
Embodiment four:
The present embodiment is embedded epitaxial external base region bipolar transistor preparation method specifically comprise the following steps
1: the collector region of preparing the first doping type;
2: the base preparing the second doping on collector region;
3: on base, prepare dielectric layer; ;
4: in described dielectric layer centre position photoetching, etch emitter-window;
5: deposit polycrystalline in described emitter-window also adopts CMP planarization polycrystalline;
6: form a polycrystalline surface oxide layer on described polycrystalline surface with high-pressure oxidation process; Polycrystalline surface oxide layer can be thicker relative to the oxide layer in step 3 dielectric layer, convenient like this corrosion in step 7, at the part of polycrystalline surface reserve part polycrystalline surface oxide layer as emitter;
7: erode described dielectric layer;
8: make described polycrystalline and described polycrystalline surface oxide layer side wall; The material of side wall can be silica also can be silicon nitride;
9: with described side wall and described polycrystalline surface oxide layer for blindage, etching base and collector region;
10: the base after etching and basis, collector region are prepared the outer base area of the second doping type by in-situ doped selective epitaxial;
11: preparation contact hole, draw emitter electrode and base electrode.
In step 9, etch in the process of described base and collector region and conventional method etching base and collector region can be adopted all not to be positioned at described emitter inferior portion; As illustrated in figs. 8-9, also can be positioned at described emitter and collector region by undercutting etching to be positioned at described emitter inferior portion and to form the groove described in Fig. 8, the width of the part that base is etched below described emitter is less than the width that base is positioned at the part below emitter; The part that collector region is etched below described emitter is less than described collector region and is positioned at part below described emitter.
Embedded epitaxial external base region bipolar transistor preparation method described in comprehensive the invention described above, the few and step of step is relatively simple, the realizing technical maturity and control easy of employing, thus improves productivity effect greatly, reduces production cost.
Above; be only preferred embodiment of the present invention, but protection scope of the present invention is not limited thereto, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; the change that can expect easily or replacement, all should be encompassed within protection scope of the present invention.Therefore, the protection range that protection scope of the present invention should define with claim is as the criterion.
Claims (1)
1. an embedded epitaxial external base region bipolar transistor preparation method, is characterized in that, described embedded epitaxial external base region bipolar transistor preparation method comprises following concrete steps:
1: the collector region of preparing the first doping type;
2: the base preparing the second doping on collector region;
3: on base, prepare dielectric layer;
4: photoetching on described dielectric layer, etch emitter-window;
5: deposit in described emitter-window planarization polycrystalline;
6: form a polycrystalline surface oxide layer on described polycrystalline surface;
7: erode described dielectric layer;
8: the side wall making described polycrystalline and described polycrystalline surface oxide layer;
9: with described side wall and described polycrystalline surface oxide layer for blindage, etching base and collector region;
10: the base after etching and collector region are being prepared the outer base area of the second doping type by in-situ doped selective epitaxial;
11: preparation contact hole, draw emitter electrode and base electrode;
Described step 6 adopts high-pressure oxidation process to prepare described polycrystalline surface oxide layer;
The method of described step 5 planarization polycrystalline is CMP chemical mechanical polishing method or etch-back etchback;
Described dielectric layer is compound medium layer; Described compound medium layer comprises the silicon nitride layer of silicon oxide layer described in the silicon oxide layer of base region surface described in deposit and deposit;
Described side wall is made up of silica or silicon nitride is formed;
The brill described base of etching and described collector region is adopted to be positioned at described emitter inferior portion in described step 9;
Wherein, base and described collector region described in reserve part below described emitter.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102651384A (en) * | 2012-05-16 | 2012-08-29 | 清华大学 | Bipolar transistor with embedded epitaxial outer base region and fabrication method of bipolar transistor |
| CN102651390A (en) * | 2012-05-16 | 2012-08-29 | 清华大学 | Bipolar transistor with embedded epitaxial outer base region and fabrication method of bipolar transistor |
| CN102664190A (en) * | 2012-05-16 | 2012-09-12 | 清华大学 | Embedded epitaxial external base region bipolar transistor and manufacturing method thereof |
| CN102664191A (en) * | 2012-05-16 | 2012-09-12 | 清华大学 | Bipolar transistor with embedded extension outer base region, and manufacturing method thereof |
| CN102683399A (en) * | 2012-05-16 | 2012-09-19 | 清华大学 | Embedded type epitaxial outer base region bipolar transistor and preparation method thereof |
| CN102709318A (en) * | 2012-05-16 | 2012-10-03 | 清华大学 | Embedded epitaxial external base region bipolar transistor and preparation method thereof |
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102651384A (en) * | 2012-05-16 | 2012-08-29 | 清华大学 | Bipolar transistor with embedded epitaxial outer base region and fabrication method of bipolar transistor |
| CN102651390A (en) * | 2012-05-16 | 2012-08-29 | 清华大学 | Bipolar transistor with embedded epitaxial outer base region and fabrication method of bipolar transistor |
| CN102664190A (en) * | 2012-05-16 | 2012-09-12 | 清华大学 | Embedded epitaxial external base region bipolar transistor and manufacturing method thereof |
| CN102664191A (en) * | 2012-05-16 | 2012-09-12 | 清华大学 | Bipolar transistor with embedded extension outer base region, and manufacturing method thereof |
| CN102683399A (en) * | 2012-05-16 | 2012-09-19 | 清华大学 | Embedded type epitaxial outer base region bipolar transistor and preparation method thereof |
| CN102709318A (en) * | 2012-05-16 | 2012-10-03 | 清华大学 | Embedded epitaxial external base region bipolar transistor and preparation method thereof |
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